Lab 7 Decoders and Multiplexers Objectives To design logic circuits using decoders and multiplexers. To implement Boolean functions using decoders and multiplexers. Decoders E1 E2 E3 16 15 14 13 12 11 10 9 7 1 2 3 4 5 6 A0 A1 A2 E1 E2 E3 VCC O0 O1 O2 O3 O4 O5 O6 O7 GND 4 5 6 A0 A1 A2 GND 1 2 3 VCC 16 The 74138 IC is 3-to-8 decoder. The circuit has 3 inputs (A2, A1, and A0) and 8 active-low outputs (O7 – O0). The pin-out for the 74138 is shown in Figure 7.1, (a) 15 14 13 12 11 10 9 7 8 74AC138 8 74AC138 O0 O1 O2 O3 O4 O5 O6 O7 (b) Figure 7.1 74138 3-to-8 Decoder with Active Low Outputs The 74138 also has 3 enable inputs labeled E1, E2, and E3. As indicated in the figure, E1 and E2 are active-low inputs and E3 is active-high. For proper operation, E1 and E2 must be grounded and E3 must be tied high (connected to +5). The LSB of the inputs is A0; the MSB is A2. A ball (small circle) at the pin in Figure 7.1(a) indicates an active-low input or output. An alternate way to indicate active-low inputs/outputs is shown in Figure 7.1(b) where the pin name is shown with a complement bar. In this lab, we will use decoders and multiplexers to implement functions given in minterm notation. Part 1 Implement F1(C,B,A) = m(0,3,5,6) and F2(C,B,A) = m(1,2,4,7), where C is the MSB and A is the LSB. Use the 74AC138 and the 7420. Use a switch module for the inputs. Either use a scope to indicate the output states or include an LED with a 910 ohm current-limiting resistor for each output. Draft the circuit in ORCAD Capture. Construct the circuit and generate the truth table from the circuit function. Demonstrate the circuit to the lab instructor. Page 51 of 106 Part 2 Implement F(C,B,A) = m(1,2,4,7) using the 74151. Draft the schematic in ORCAD Capture with SPDT switches as inputs. Either use a scope to indicate the output states or include an LED with a 910 ohm current-limiting resistor for each output. Construct the circuit and generate the truth table from the circuit function. Demonstrate the circuit to the lab instructor. 11 10 9 7 VCC D0 D1 D2 D3 D4 D5 D6 D7 A B C Y Y 5 6 GND The 74151 has two outputs, one is active high (Pin 5), the other is active-low (Pin 6). Use the active-high output for this lab. The MSB of the select lines is C; the LSB is A. Be sure to ground the G’ input to enable the output. 4 3 2 1 15 14 13 12 G 74151 8 The 74151 is an 8x1 multiplexer: It has 3 select lines (C, B, A), 8 inputs (D7 – D0), and one active-low enable (Pin 7). The pin-out of the IC is shown in Figure 7.2 16 Multiplexers Figure 7.2 74151 8x1 Multiplexer Part 3 Implement F(D,C,B,A) = m(0,5,7,8,9,11,12,13) using the 74151 and an external gate. Connect variables D, B, and A to the select lines. Draft the schematic in ORCAD Capture with SPDT switches as inputs. Either use a scope to indicate the output states or include an LED with a 910 ohm current-limiting resistor for each output. Construct the circuit and generate the truth table from the circuit function. Demonstrate the circuit to the lab instructor. Part 4 Implement F(E,D,C,B,A) = m(3,6,7,10,11,12,13,14,16,17,19,21,22,26,27,30) using the 74151 and the 7400. Connect variables D, C, & B to the select lines. Draft the schematic in ORCAD. Either use a scope to indicate the output states or include an LED with a 910 ohm current-limiting resistor for each output. Construct the circuit and generate a truth table from the circuit function. To generate the signal E, either: Use a wire, connect input E to ground and sequence D, C, B, & A through all possible combinations, then connect E to +5 and repeat the D, C, B, & A sequence. Add a second switch module to the circuit. Demonstrate the circuit to the lab instructor. Part 5 Extract a set of minimal equations for the function of part 4. There are two means of doing this: a 5 variable Karnaugh Map or the Quine–McCluskey method. Do not implement the circuit. Lab Summary Include the following from Parts 1 – 4: Circuit schematics. Truth tables - as recorded during tests Equations - in minimal SOP (use Karnaugh maps or algebra to reduce the equations). LogicAid screen captures proving the equations are correct. Include the logic reduction work and results from part 5. Questions and Exercises 1. Why are the literal values listed in gray code order along each axis of a Karnaugh map? 2. Karnaugh maps can be used to map expressions for the 1's or for the 0's. Which is best used to obtain minimal POS or SOP expressions? 3. For functions of more than 4 variables, we could list all combinations of three (or more) variables along one Karnaugh map axis (e.g. 3 variables would require 8 rows or columns). Why is this not a useful approach? Page 52 of 106