CS 2160
Spring, 2011
Addressing Modes
Processor Addressing modes
• Primarily a recap and review of topics from chapter 2
of the text
• Review of addressing techniques
• Comparison of Pointers and Arrays
• How other Architectures do things Differently
•
Register
•
Base/Displacement
–
–
–
–
Immediate
•
PC Relative
•
Pseudo-direct
–
–
–
–
–
CS 2160 - Addressing
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add offset/displacement in instruction to address value in base register to get memory
address where the operand is located
used for memory storage of variables and arrays
•
–
–
Spring, 2011
operand value is found in the register
used for variables and temps
operand value is found in the instruction
used for small constants
operand value is value in PC plus the 16-bit word-value(±) found in the instruction
used as branch destinations
operand value is top 4 bits of PC concatenated with 26-bit word-value found in the
instruction, and 002 at the low end
Result: can only jump to the same 1/16 of memory.
Word boundary
Spring, 2011
CS 2160 - Addressing
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Picture of addressing Modes
(page 133 of 4th edition)
Memory Addressing Mode
1 . Im m e d ia t e a d d r e s s in g
op
rs
rt
Im m e d ia te
• Base/Displacement
2 . R e g is te r a d d r e s s in g
– the operand is in memory
– the ADDRESS of the operand is found by adding the
16 bits found in the instruction to the thirty two bits
found in the register
– normally the register contains an address and the
instruction contains a small integer known as a
displacement or offset
– historically, the register could contain an offset or
subscript and the instruction could contain the base
address, and this mode was called indexed mode
Spring, 2011
CS 2160 - Addressing
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op
rs
rt
rd
. . .
fu n c t
R e g is te rs
R e g is te r
3 . B a s e a d d r e s s in g
op
rs
rt
Memory
A ddress
+
R e g is t e r
B y te
H a lfw o r d
W o rd
4 . P C -r e la ti v e a d d re s s in g
op
rs
rt
Memory
A ddress
PC
+
W o rd
5 . P s e u d o d ir e c t a d d r e s s in g
op
Memory
A d d re ss
W o rd
PC
Spring, 2011
Reverse Engineering
CS 2160 - Addressing
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Comparison
• Decoding machine language is described on pages
151-154 (100-104 in 3rd edition) (134-135 in 4th )
• this will not be discussed in class
– Given 32 bits
– 1st 6 bits identifies instruction and format
– Then decode the rest of the bits per format
• With pointer we can move the multiply by 4 code out of the loop
because we only need to calculate the test value (address past
the end of the array) one time
• with index, we must convert index to offset each time (or we
could introduce a second variable and increment it by 4
• why i like C
• 5, 5, 16 (immediate instructions)
• 5, 5, 5, 5, 6 (register instructions)
• 26 (pseudo direct instructions)
• you will be responsible for the concepts on the tests
Spring, 2011
Addressing
CS 2160 - Addressing
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Spring, 2011
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CS 2160
Spring, 2011
Power PC
Other Architectures
•
• Design alternative:
– provide more powerful operations
– goal is to reduce number of instructions executed
•
– danger
d
iis a slower
l
cycle
l ti
time and/or
d/ a hi
higher
h CPI
• Sometimes referred to as “RISC vs. CISC”
– virtually all new instruction sets since 1982 have been RISC
– VAX: minimize code size, make assembly language easy
instructions from 1 to 54 bytes long!
• Text looks at ARM (Advanced Risk Machine) and 80x86
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CS 2160 - Addressing
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•
Indexed addressing
– example: lw $t1,$a0+$s3
– What do we have to do in MIPS?
Others:
– load multiple/store multiple
– a special counter register “bc Loop”
decrement counter, if not 0 goto loop
Spring, 2011
80x86
•
•
•
•
•
•
“This history illustrates the impact of the “golden handcuffs” of compatibility
“adding new features as someone might add clothing to a packed bag”
• Complexity:
– Instructions from 1 to 17 bytes long
– one operand must act as both a source and destination
– one operand can come from memory
– complex
l addressing
dd
i modes
d
e.g., “base or scaled index with 8 or 32 bit displacement”
• Saving grace:
– the most frequently used instructions are not too difficult to
build
– compilers avoid the portions of the architecture that are slow
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Spring, 2011
• Instruction complexity is only one variable
– lower instruction count vs. higher CPI / lower clock rate
• Design Principles:
simplicit favors
simplicity
fa ors reg
regularity
larit
smaller is faster
good design demands compromise
make the common case fast
• Instruction set architecture
– a very important abstraction indeed!
Spring, 2011
Addressing
CS 2160 - Addressing
CS 2160 - Addressing
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Concluding Remarks
Fallacies and Pitfalls
–
–
–
–
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“what the 80x86 lacks in style is made up in quantity,
making it beautiful from the right perspective”
“an architecture that is difficult to explain and impossible to love”
CS 2160 - Addressing
CS 2160 - Addressing
What is Dominant
1978: The Intel 8086 is announced (16 bit architecture)
1980: The 8087 floating point coprocessor is added
1982: The 80286 increases address space to 24 bits, +instructions
1985: The 80386 extends to 32 bits, new addressing modes
1989 1995 Th
1989-1995:
The 80486
80486, P
Pentium,
ti
P
Pentium
ti
P
Pro add
dd a ffew iinstructions
t ti
(mostly designed for higher performance)
1997: MMX is added
Spring, 2011
$t1=Memory[$a0+$s3]
– What do we have to do in MIPS?
Update addressing
– update
d t a register
i t as partt off load
l d (f
(for marching
hi th
through
h arrays))
– example: lwu $t0,7($s3)
#implements $t0=Memory[$s3+7];$s3=$s3+4
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• Simplicity Favors Regularity
– 1 instruction size
– fields in same place
• Smaller is Faster
– 32 registers is enough for most stuff
• Make the common case fast
– PC relative addressing
– Immediate addressing
• Good compromises
– Fixed instruction length means
– Can not have 32 bit addresses in instruction
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CS 2160
Spring, 2011
Status
• Where we've been:
• Abstractions:
– Performance (seconds, cycles, instructions)
– Instruction
Instr ction Set Architecture
Architect re
– Assembly Language and Machine Language
• What's up ahead:
– Arithmetic (multiply divide floating)
– Implementing the Architecture
Spring, 2011
Addressing
CS 2160 - Addressing
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