AVIONICS SYSTEM ARCHITECTURE
 Establishing the basic architecture is the first and the most fundamental challenge faced by the
designer
 The architecture must conform to the overall aircraft mission and design while ensuring that the
avionics system meets its performance requirements
 These architectures rely on the data buses for intra and intersystem communications
 The optimum architecture can only be selected after a series of exhaustive design tradeoffs that
address the evaluation factors
AVIONICS ARCHITECTURE
First Generation Architecture ( 1940’s –1950’s)
 Disjoint or Independent Architecture ( MiG-21)
 Centralized Architecture (F-111)
Second Generation Architecture ( 1960’s –1970’s)
 Federated Architecture (F-16 A/B)
 Distributed Architecture (DAIS)
 Hierarchical Architecture (F-16 C/D, EAP)
Third Generation Architecture ( 1980’s –1990’s)
 Pave Pillar Architecture ( F-22)
Fourth Generation Architecture (Post 2005)
 Pave Pace Architecture- JSF
 Open System Architecture
FGA - DISJOINT ARCHITECTURE
 The early avionics systems were stand alone black boxes where each functional area had
separate, dedicated sensors, processors and displays and the interconnect media is point to point
wiring
 The system was integrated by the air-crew who had to look at various dials and displays
connected to disjoint sensors correlate the data provided by them, apply error corrections,
orchestrate the functions of the sensors and perform mode and failure management in addition to
flying the aircraft
 This was feasible due to the simple nature of tasks to be performed and due to the availability of
time
FGA - CENTRALIZED ARCHITECTURE
 As the digital technology evolved,a central computer was added to integrate the information from
the sensors and subsystems
 The central computing complex is connected to other subsystems and sensors through
analog,digital, synchro and other interfaces
 When interfacing with computer a variety of different transmission methods , some of which
required signal conversion (A/D) when interfacing with computer
 Signal conditioning and computation take place in one or more computers in a LRU located in an
avionics bay , with signals transmitted over one way data bus Data are transmitted from the
systems to the central computer and the DATA CONVERSION TAKES PLACE AT THE
CENTRAL COMPUTER
ADVANTAGES
 Simple Design
 Software can be written easily
 Computers are located in readily accessible bay
DISADVANTAGES
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Requirement of long data buses
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Low flexibility in software
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Increased vulnerability to change
Different conversion techniques needed at Central Computer
SGA – FEDERATED ARCHITECTURE
Federated : Join together, Become partners
Each system acts independently but united (Loosely Coupled)
 Unlike FGA – CA , Data conversion occurs at the system level and the datas are send as digital
form – called Digital Avionics Information Systems(DAIS)
 Several standard data processors are often used to perform a variety of Low – Bandwidth
functions such as navigation, weapon delivery , stores management and flight control

Systems are connected in a Time – Shared Multiplex Highway

Resource sharing occurs at the last link in the information chain – via controls and displays

Programmability and versatility of the data processors
ADVANTAGES
 Contrast to analog avionics – DDP provide precise solutions over long range of flight , weapon
and sensor conditions
 Sharing of Resources
 Use of TDMA saves hundreds of pounds of wiring
 Standardization of protocol makes the interchangeability of equipments easier
 Allows Independent system design and optimization of major systems
 Changes in system software and hardware are easy to make
 Fault containment – Failure is not propagated
DISADVANTAGES : Profligate of resources
SGA - DISTRIBUTED ARCHITECTURE
 It has multiple processors throughout the aircraft that are designed for computing takes on a
real-time basis as a function of mission phase and/or system status
 Processing is performed in the sensors and actuators
ADVANTAGES
 Fewer,Shorter buses
 Faster program execution
 Intrinsic Partitioning
DISADVANTAGES
 Potentially greater diversity in processor types which aggravates software generation and
validation
SGA – HIERARCHICAL ARCHITECTURE
 This architecture is derived from the federated architecture
 It is based on the TREE Topology
ADVANTAGES
 Critical functions are placed in a separate bus and Non-Critical functions are placed in
another bus
 Failure in non – critical parts of networks do not generate hazards to the critical parts of
network
 The communication between the subsystems of a particular group are confined to their
particular group
 The overload of data in the main bus is reduced
TGA - WHY PAVE PILLAR
Pave Pillar is a USAF program to define the requirements and avionics architecture for fighter
aircraft of the 1990s
The Program Emphasizes
 Increased Information Fusion
 Higher levels and complexity of software
 Standardization for maintenance simplification
 Lower costs
 Backward and growth capability while making use of emerging technology –
VHSIC, Voice Recognition /synthesis and Artificial Intelligence
 Provides capability for rapid flow of data in, through and from the system as well as between
and within the system
 Higher levels of avionics integration and resource sharing of sensor and computational
capabilities
 Pilot plays the role of a WEAPON SYSTEM MANAGER as opposed to subsystem
operator/information integrator
 Able to sustain operations with minimal support, fly successful mission day and night in any
type of weather
 Face a numerically and technologically advanced enemy aircraft and defensive systems
TGA - PAVE PILLAR
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Component reliability gains
Use of redundancy and resource sharing
Application of fault tolerance
Reduction of maintenance test and repair time
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Increasing crew station automation
Enhancing stealth operation
Wide use of common modules (HW & SW))
Ability to perform in-aircraft test and maintenance of avionics
Use of VHSIC technology and
Capability to operate over extended periods of time at austere, deployed locations and be
maintainable without the Avionics Intermediate Shop
FTGA - WHY PAVE PACE
 Modularity concepts cuts down the cost of the avionics related to VMS, Mission Processing, PVI
and SMS
 The sensor costs accounts for 70% of the avionics cost
 USAF initiated a study project to cut down the cost of sensors used in the fighter aircraft
 In 1990, Wright Laboratory – McDonnell Aircraft, Boeing aircraft company and Lockheed
launched the Pave Pace Program
 Come with the Concept of Integrated Sensor System(IS2)
 Pave Pace takes Pave Pillar as a base line standard
 The integration concept extends to the skin of the aircraft – Integration of the RF & EO sensors

Originally designed for Joint Strike Fighter (JSF)
Key features of avionics architectural evolution
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Increased Digitization of Functions
Increased sharing and modularization of functions
Integration/ sharing concepts increased to the skin of the
aircraft
Functionality has increasingly obtained through software
Complex hardware architecture modules
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Complex software modules
Increased network complexity and speed
The Advent of the Data Bus
A data transmission medium, which would allow all systems and subsystems to share a single and
common set of wires, was needed (see figure 1b). By sharing the use of this interconnect, the various
subsystems could send data between themselves and to other systems and subsystems, one at a time, and in a
defined sequence, hence a data bus.
The primary purpose of the data bus is to move data between black boxes. How these boxes are
connected and the methodology with which the communication is accomplished is central to the operation of
the data bus. However, before we delve into to the protocol, it is necessary to understand a little of the data
bus hardware.
In recent years, the use of digital techniques in aircraft equipment has greatly increased, as have the
number of avionics subsystems and the volume of data processed by them.
Because analog point-to-point wire bundles are inefficient and cumbersome means of interconnecting
the sensors, computers, actuators, indicators, and other equipment onboard the modern military vehicle, a
serial digital multiplex data bus was developed. MIL-STD-1553 defines all aspects of the bus, therefore, many
groups working with the military tri-services have chosen to adopt it.
MIL-STD-1553B
MIL-STD-1553B defines the term Time Division Multiplexing (TDM) as “the transmission of
information from several signal sources through one communications system with different signal samples
staggered in time to form a composite pulse train.
The 1553 multiplex data bus provides integrated, centralized system control and a standard interface
for all equipment connected to the bus. The bus concept provides a means by which all bus traffic is available
to be accessed with a single connection for testing and interfacing with the system. The standard defines
operation of a serial data bus that interconnects multiple devices via a twisted, shielded pair of wires. The
system implements a command-response format.
Hardware Elements
The 1553 standard defines certain aspects regarding the design of the data bus system and the black
boxes to which the data bus is connected.
The standard defines four hardware elements:
 transmission media,
 remote terminals,
 bus controllers,
 bus monitors
Transmission Media
The transmission media, or data bus, is defined as a twisted shielded pair transmission line consisting
of the main bus and a number of stubs. There is one stub for each terminal (system) connected to the bus. The
main data bus is terminated at each end with a resistance equal to the cable’s characteristic impedance. This
termination makes the data bus behave electrically like an infinite transmission line. Stubs, which are added to
the main bus in order to connect the terminals, provide “local” loads, and produce an impedance mismatch
where added. This mismatch, if not properly controlled, produces electrical reflections and degrades the
performance of the main bus. Therefore, the characteristics of both the main bus and the stubs are specified
within the standard. Summary of the transmission media characteristics as follows.
Cable Type
Capacitance
Characteristic Impedance
Cable Attenuation
Cable Twists
Shield Coverage
Cable Termination
Direct Coupled Stub
Transformer Coupled Stub Length
Twisted Shielded Pair
30.0 pF/ft max — wire to wire
70.0 to 85.0 ohms at 1 MHz
1.5 dbm/100 ft at 1 MHz
4 twists per foot maximum
90% minimum
Cable impedance (_2%)
Length Maximum of 1 ft
Maximum of 20 ft
The standard specifies two stub methods: direct and transformer coupled. This refers to the method in
which a terminal is connected to the main bus. Following Figure shows the two methods, the primary
difference between the two being that the transformer coupled method utilizes an isolation transformer for
connecting the stub cable to the main bus cable.
FIGURE:Terminal connection methods.
In both methods, two isolation resistors are placed in series with the bus. In the direct coupled
method, the resistors are typically located within the terminal, whereas in the transformer coupled method, the
resistors are typically located with the coupling transformer in boxes called data bus couplers. A variety of
couplers are available, providing single or multiple stub connections.
Another difference between the two coupling methods is the length of the stub. For the direct coupled
method, the stub length is limited to a maximum of 1 ft. For the transformer coupled method, the stub can be
up to a maximum length of 20 ft. Therefore for direct coupled systems, the data bus must be routed in close
proximity to each of the terminals, whereas for a transformer coupled system, the data bus may be up to 20 ft
away from each terminal.
Bus Controller
The bus controller is responsible for directing the flow of data on the data bus. While several terminals may be
capable of performing as the bus controller, only one bus controller may be active at a time. The bus controller
is the only one allowed to issue commands onto the data bus. The commands may be for the transfer of data or
the control and management of the bus (referred to as mode commands). Typically, the bus controller is a
function that is contained within some other computer, such as a mission computer, a display processor, or a
fire control computer. The complexity of the electronics associated with the bus controller is a function of the
subsystem interface (the interface to the computer), the amount of error management and processing to be
performed, and the architecture of the bus controller.
There are three types of bus controller architectures:
 A word controller.
 A message controller.
 A frame controller.
There is no requirement within the standard as to the internal workings of a bus controller, only that it issue
commands on to the bus.
Word Controller
A word controller is the oldest and simplest type of controller. Few word controllers are built today. For a
word controller, the terminal electronics transfers one word at a time to the subsystem. Message buffering and
validation must be performed by the subsystem. This places quite a burden on the subsystem due to the timing
requirements of the bus.
Message Controller
Today, many of the “fielded” bus controllers are message controllers. These controllers output a single
message at a time, interfacing with the computer only at the end of the message or perhaps when an error
occurs. Some message controllers are capable of performing minor error processing, such as transmitting once
on the alternate data bus, before interrupting the computer. The computer informs the interface electronics
where the message exists in memory and provides a control word. For each message, the control
word typically informs the electronics of the message type (e.g., a RT-BC or RT-RT command), on which bus
to transfer the message, where to read or write the data words in memory, and what to do if an error occurs.
The control words are a function of the hardware design of the electronics and aren’t standardized among bus
controllers.
Frame Controller
A frame controller is the latest concept in bus controllers. With the advent of microprocessors and Application
Specific Integrated Circuits (ASIC's), this type of controller is rapidly becoming the norm. A frame controller
is capable of processing multiple messages in a sequence defined by the host computer. The frame controller
is typically capable of performing some error processing as defined by the message control word. Frame
processors are used to “off load” the subsystem or host computer as much as possible, interrupting only at the
end of a series of messages or when an error that it cannot handle is detected.
Bus Monitor
A bus monitor is a terminal that listens (monitors) to the exchange of information on the data bus. The
standard strictly defines how bus monitors may be used, stating that the information obtained by a bus
monitor be used “for off-line applications (e.g., flight test recording, maintenance recording or mission
analysis) or to provide the back-up bus controller sufficient information to take over as the bus controller.” A
monitor may collect all the data from the bus or may collect selected data. The reason for restricting its use is
that while a monitor may collect data, it deviates from the command-response protocol of the standard, in that
a monitor is a passive device that doesn’t transmit a status word and therefore cannot report on the status of
the information transferred. Bus monitors fall into two categories:
 recorder for testing.
 A terminal functioning as a back-up bus controller.
In collecting data, a monitor must perform the same message validation functions as the remote terminal and
if an error is detected, inform the subsystem of the error (the subsystem may still record the data, but the error
should be noted). For monitors, which function as recorders for testing, the subsystem is typically a recording
device such as a magnetic tape or disk, or a telemetry transmitter. For monitors, which function as back-up
bus controllers, the subsystem is the computer. Today it is common for bus monitors to contain a remote
terminal. When the monitor receives a command addressed to its terminal address, it responds as a remote
terminal. For all other commands, it functions as a monitor. The remote terminal portion can be used to
provide feedback to the bus controller, which monitors status and the amount of memory or time (i.e.
recording tape) left. The remote terminal portion also can be used to reprogram a selective monitor as to what
messages to capture.
Terminal Hardware
The electronic hardware between a remote terminal, bus controller, and bus monitor doesn’t differ
much. Both the remote terminal and bus controller (and bus monitor if it is also a remote terminal) must have
the transmitters/receivers and encoders/decoders to format and transfer data.
The requirements upon the transceivers and the encoders/decoders don’t vary between the hardware
elements. Table 3 and Table 4 list the electrical characteristics of the terminals. All three elements have some
level of subsystem interface and data buffering. The primary difference lays in the protocol control logic and
often this just a different series of microcoded instructions. For this reason, it is common to find 1553
hardware circuitry that is also capable of functioning as all three devices. There is an abundance of “off-theshelf” components available today from which to design a terminal. These vary from discrete transceivers,
encoders/decoders, and protocol logic devices to a single dual redundant hybrid containing everything but the
transformers.
The Department of Defense chose multiplexing because of the following advantages:
 Weight reduction
 Simplicity
 Standardization
 Flexibility
Some 1553 applications utilize more than one data bus on a vehicle. This is often done, for example, to isolate
a Stores bus from a Communications bus or to construct a bus system capable of interconnecting more
terminals than a single bus could accommodate. When multiple buses are used, some terminals may connect
to both buses, allowing for communication between them.
MULTIPLEXING
Multiplexing facilitates the transmission of information along the data flow. It permits the transmission of
several signal sources through one communications system.
BUS
The bus is made up of twisted-shielded pairs of wires to maintain message integrity. MIL-STD-1553 specifies
that all devices in the system will connect to a redundant pair of buses. This provides a second path for bus
traffic should one of the buses be damaged. Signals are only allowed to appear on one of the two buses at a
time. If a message cannot be completed on one bus, the bus controller may switch to the other bus. In some
applications more than one 1553 bus may be implemented on a given vehicle. Some terminals on the bus may
actually connect to both buses.
BUS COMPONENTS
There are only three functional modes of terminals allowed on the data bus: the bus controller, the bus
monitor, and the remote terminal. Devices may be capable of more than one function. Figure 1 illustrates a
typical bus configuration.
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Bus Controller - The bus controller (BC) is the terminal that initiates information transfers on the data
bus. It sends commands to the remote terminals which reply with a response. The bus will support
multiple controllers, but only one may be active at a time. Other requirements, according to 1553, are:
(1) it is "the key part of the data bus system," and (2) "the sole control of information transmission on
the bus shall reside with the bus controller."
Bus Monitor - 1553 defines the bus monitor as "the terminal assigned the task of receiving bus traffic
and extracting selected information to be used at a later time." Bus monitors are frequently used for
instrumentation.
Remote Terminal - Any terminal not operating in either the bus controller or bus monitor mode is
operating in the remote terminal (RT) mode. Remote terminals are the largest group of bus
components.
MODULATION
The signal is transferred over the data bus using serial digital pulse code modulation.
DATA ENCODING
The type of data encoding used by 1553 is Manchester II biphase.
 A logic one (1) is transmitted as a bipolar coded signal 1/0 (in other words, a positive pulse followed
by a negative pulse).
 A logic zero (0) is a bipolar coded signal 0/1 (i.e., a negative pulse followed by a positive pulse).
A transition through zero occurs at the midpoint of each bit, whether the rate is a logic one or a logic zero.
Figure 2 compares a commonly used Non Return to Zero (NRZ) code with the Manchester II biphase level
code, in conjunction with a 1 MHz clock.
BIT TRANSMISSION RATE
The bit transmission rate on the bus is 1.0 megabit per second with a combined accuracy and long-term
stability of +/- 0.1%. The short-term stability is less than 0.01%.
There are 20 1.0-microsecond bit times allocated for each word. All words include a 3 bit-time sync pattern, a
16-bit data field that is specified differently for each word type, and 1 parity check bit.
WORD FORMATS
Bus traffic or communications travels along the bus in words. A word in MIL-STD-1553 is a sequence of 20
bit times consisting of a 3 bit-time sync wave form, 16 bits of data, and 1 parity check bit. This is the word as
it is transmitted on the bus; 1553 terminals add the sync and parity before transmission and remove them
during reception. Therefore, the nominal word size is 16 bits, with the most significant bit (MSB) first.
There are three types of words: command, status, and data. A packet is defined to have no intermessage gaps.
The time between the last word of a controller message and the return of the terminal status byte is 4-12
microseconds. The time between status byte and the next controller message is undefined. Figure 3 illustrates
these three formats.
COMMAND WORD
Command words are transmitted only by the bus controller and always consist of:
 3 bit-time sync pattern
 5 bit RT address field
 1 Transmit/Receive (T/R) field
 5 bit subaddress/mode field
 5 bit word count/mode code field
 1 parity check bit.
DATA WORD
Data words are transmitted either by the BC or by the RT in response to a BC request. The standard allows a
maximum of 32 data words to be sent in a packet with a command word before a status response must be
returned. Data words always consist of:
 3 bit-time sync pattern (opposite in polarity from command and status words)
 16 bit data field
 1 parity check bit.
STATUS WORD
Status words are transmitted by the RT in response to command messages from the BC and consist of:
 3 bit-time sync pattern (same as for a command word)
 5 bit address of the responding RT
 11 bit status field
 1 parity check bit.
The 11 bits in the status field are used to notify the BC of the operating condition of the RT and subsystem.
INFORMATION TRANSFER
Three basic types of information transfers are defined by 1553:
1. Bus Controller to Remote Terminal transfers
2. Remote Terminal to Bus Controller transfers
3. Remote Terminal to Remote Terminal transfers
These transfers are related to the data flow and are referred to as messages. The basic formats of these
messages are shown in Figure 4.
The normal command/response operation involves the transmission of a command from the BC to a selected
RT address. The RT either accepts or transmits data depending on the type (receive/transmit) of command
issued by the BC. A status word is transmitted by the RT in response to the BC command if the transmission
is received without error and is not illegal.
Figure 5 illustrates the 1553B Bus Architecture in a typical aircraft.
MIL-STD-1773
MIL-STD-1773 contains the requirements for utilizing a fiber optic "cabling" system as a
transmission medium for the MIL-STD-1553B bus protocol. As such, the standard repeats MIL-STD-1553
nearly word-for-word. The standard does not specify power levels, noise levels, spectral characteristics,
optical wavelength, electrical/optical isolation or means of distributing optical power. These must be
contained in separate specifications for each intended use. Data encoding and word format are identical to
MIL-STD-1553, with the exception that pulses are defined as transitions between 0 (off) and 1 (on) rather
than between + and - voltage transitions since light cannot have a negative value.Since the standard applies to
cabling only, the bus operates at the same speed as it would utilizing wire. Additionally, data error rate
requirements are unchanged. Different environmental considerations must be given to fiber optic systems.
Altitude, humidity, temperature, and age affects fiber optics differently than wire conductors. Power is divided
evenly at junctions which branch and connectors have losses just as wire connectors do.
ARINC 429
Aeronautical Radio, Incorporated (ARINC) is a major company that develops and operates systems and
services to ensure the efficiency, operation, and performance of the aviation and travel industries. ARINC 429 is
the most commonly used data bus for commercial and transport aircraft. ARINC 429 employs unidirectional
transmission of 32 bit words over two wire twisted pairs using bipolar RZ format.
Protocol
ARINC 429 is a very simple, point-to-point protocol. There can be only one transmitter on a wire pair. The
transmitter is always transmitting either 32-bit data words or the NULL state. There is at least one receiver on
a wire pair; there may be up to 20. In most cases, an ARINC message consists of a single data word. The label
field of the word defines the type of data that is contained in the rest of the word.
Bit Timing and Slew Rate
The slew rate refers to the rise and fall time of the ARINC waveform. Specifically, it refers to the amount of time it
takes the ARINC signal to rise from the 10% to the 90% voltage amplitude points on the leading and trailing edges
of the pulse.
ARINC 429 Word Format
ARINC data words are always 32 bits and typically use the format shown in Figure 3 which includes five primary
fields, namely Parity, SSM, Data, SDI, and Label. ARINC convention numbers the bits from 1 (LSB) to 32 (MSB).
Parity
The MSB is always the parity bit for ARINC 429. Parity is normally set to odd except for certain tests. Odd parity
means that there must be an odd number of “1” bits in the 32-bit word that is insured by either setting or clearing the
parity bit. For example if bits 1-31 contain an even number of “1” bits, bit 32 must be set to create ODD parity. On
the other hand, if bits 1-31 contain an odd number of “1” bits, the parity bit must be clear.
SSM
Bits 31 and 30 contain the Sign/Status Matrix or SSM. This field contains hardware equipment condition,
operational mode, or validity of data content. Applicable codes are shown in Table
Data
Bits 29 through 11 contain the data, which may be in a number of different formats. Some examples are provided
later in the tutorial. There are also many non-standard formats that have been implemented by various
manufacturers. In some cases, the data field overlaps down into the SDI bits. In this case, the SDI field is not used.
SDI
Bits 10 and 9 provide a Source/Destination Identifier or SDI. This is used for multiple receivers to identify the
receiver for which the data is destined. It can also be used in the case of multiple systems to identify the source of the
transmission. In some cases, these bits are used for data. ARINC 429 can have only one transmitter on a pair of
wires, but up to 20 receivers.
Label
Bits 8 through 1 contain a label identifying the data type and the parameters associated with it. The label is an
important part of the message and is described in more detail below. It is used to determine the data type of the
remainder of the word and, therefore, the method of data translation to use. The various data types are described in
detail below. Labels are typically represented as octal numbers.
Transmission Order
The least significant bit of each byte except the label is transmitted first, and the label is transmitted ahead of the data
in each case. The order of the bits transmitted on the ARINC bus is as follows:
8, 7, 6, 5, 4, 3, 2, 1, 9, 10, 11, 12, 13 … 32.
When a 32-bit ARINC word is transmitted on the bus, in the case of the label, the most significant bit is transmitted
first. This reverse order is in contrast to the transmission order of the other bits in the ARINC word.
ARINC 429 Data Types
All ARINC data is transmitted in 32 bit words. The data type may be Binary Coded Decimal (BCD), two’s
complement binary notation (BNR), Discrete Data, Maintenance Data and Acknowledgment, and ISO Alphabet #5
character data. In the newest versions, bit oriented packets of messages can be used to transmit files.
BCD Data Encoding
BCD, or binary-coded-decimal, is a common data format found in ARINC 429 and many other engineering
applications. In this format, four bits are allocated to each decimal digit. A generalized BCD message is shown in
below Figure. Its data fields contain up to five sub-fields. The most significant sub-field contains only the bits, so
that its maximum decimal value can be 7. If the maximum decimal value is greater than 7, bits 29 through 27 are
padded with zeros and the second sub-field becomes the most significant. The example message in Figure 5 conveys
the data that the DME distance is 25786 and has a positive sign. The specific equipment, numeric scale, and location
of the decimal point are a function of the label and are discussed later.
BNR Data Encoding
BNR or “binary” encoding is also a very common ARINC data format. This type of encoding simply stores the data
as a binary number, much in the same format that is used on virtually every modern-day computer. Following
Figure shows the general BNR format. Bit 29 is the sign bit and bit 28 is the most significant bit of the data field,
which represents one half of the maximum value of the parameter being defined. Successive bits represent the
increments of a binary fraction series.
Negative numbers are encoded as the two’s complement of positive values. If bit 29 is a ‘1’ then the number is
negative (or South, West, Left, From, or Below). Otherwise, it is positive (or North, East, Right, To, or Above).
Figure 7 shows an example of BNR encoding. The particular message uses label 103, which is Selected Airspeed.
By referencing the ARINC 429 specification, we know that the scale is 512, and 11 bits are used (29 through 19). A
zero in bit 29 shows that this is a positive value. The numeric value is obtained by multiplying the scale factor,
determined from data type associated with the label, by the ratio indicated by each successive bit and adding them
together. Bit 28 is ½ of the scale factor (256 in this case), bit 27 is ¼ of the scale factor, bit 26 is 1/8 of the scale
factor, bit 23 is 1/64, bit 22 is 1/128, etc. Thus, in this example, Selected Airspeed = 268 Knots (256 + 8 + 4).
This may appear to be more complex than it really is. The underlying principle is conventional binary
mathematics as performed by any modern day computer. A computer programmer can shift the BNR data and sign
bits into a program variable and manipulate them directly with any standard mathematical manipulation.
The ARINC 429 Specification
The ARINC 429 Specification establishes how avionics equipment and systems communicate on
commercial aircraft. The specification defines electrical characteristics, word structures and protocol necessary to
establish bus communication. ARINC 429 utilizes the simplex, twisted shielded pair data bus standard Mark 33
Digital Information Transfer System bus. ARINC 429 defines both the hardware and data formats required for bus
transmission.
Hardware consists of a single transmitter – or source – connected to from 1-20 receivers – or sinks – on one
twisted wire pair. Data can be transmitted in one direction only – simplex communication – with bi-directional
transmission requiring two channels or buses. The devices, line replaceable units or LRUs, are most commonly
configured in a star or bus-drop topology. Each LRU may contain multiple transmitters and receivers
communicating on different buses. This simple architecture, almost point-to-point wiring, provides a highly reliable
transfer of data.
A transmitter may ‘talk only’ to a number of receivers on the bus, up to 20 on one wire pair, with each
receiver continually monitoring for its applicable data, but does not acknowledge receipt of the data. A transmitter
may require acknowledgement from a receiver when large amounts of data have been transferred. This handshaking
is performed using a particular word style, as opposed to a hard wired handshake. When this two way
communication format is required, two twisted pairs constituting two channels are necessary to carry information
back and forth, one for each direction. Transmission from the source LRU is comprised of 32 bit words containing a
24 bit data portion containing the actual information, and an 8 bit label describing the data itself. LRUs have no
address assigned through ARINC 429, but rather have Equipment ID numbers which allow grouping equipment into
systems, which facilitates system management and file transfers. Sequential words are separated by at least 4 bit
times of null or zero voltage. By utilizing this null gap between words, a separate clock signal is unnecessary.
Transmission rates may be at either a low speed – 12.5 kHz – or a high speed – 100kHz.
Cable Characteristics
The transmission bus media uses a 78 Ω shielded twisted pair cable. The shield must be grounded at each end and at
all junctions along the bus.
The transmitting source output impedance should be 75 Ω ± 5 Ω divided equally between Line A and Line B.
This balanced output should closely match the impedance of the cable. The receiving sink must have an
effective input impedance of 8k Ω minimum. Maximum length is not specified, as it is dependent on the
number of sink receivers, sink drain and source power. Most systems are designed for under 150 feet, but
conditions permitting, can extend to 300 feet and beyond.
Transmission Characteristics
ARINC 429 specifies two speeds for data transmission. Low speed operation is stated at 12.5 kHz, with an
actual allowable range of 12 to 14.5 kHz. High speed operation is 100 kHz ± 1% allowed. These two data rates can
not be used on the same transmission bus. Data is transmitted in a bipolar, Return-to-Zero format. This is a tri-state
modulation consisting of HIGH, NULL and LOW states.
Transmission voltages are measured across the output terminals of the source. Voltages presented across the
receiver input will be dependent on line length, stub configuration and the number of receivers connected.
ARINC 629 data bus
ARINC 629 (A629), like MIL-STD-1553B, is a true data bus in that the bus operates as a multiple-source, multiplesink system – see Fig. 12.12. That is, each terminal can transmit data to, and receive data from every other terminal
on the data bus. This allows much more freedom in the exchange of data between units in the avionics system than
the single-source, multiple-sink A429 topology. Furthermore the data rates are much higher than for A429 where the
highest data rate is 100 kbits/sec. The A629 data bus operates at 2 Mbytes/sec or twenty times that of A429. The true
data bus topology is much more flexible in that additional units can be fairly readily accepted physically on the data
bus. A further attractive feature is the ability to accommodate up to a total of 131 terminals on a data bus, though in a
realistic implementation data bus traffic would probably preclude the use of this large number of terminals. The
protocol utilized by A629 is a time-based, collision-avoidance concept in which each terminal is allocated a
particular time slot access to transmit data on to the bus. Each terminal autonomously decides when the appropriate
time slot is available and transmits the necessary data. This protocol was the civil aircraft industry’s response to the
military MIL-STD-1553B data bus that utilizes a dedicated controller to decide what traffic passes down the data
bus.
ARINC 629
ARINC is a major company that develops and operates systems and services to ensure the efficiency,
operation, and performance of the aviation and travel industries. It was organized in 1929 by four major
airlines to provide a single licensee and coordinator of radio communications outside the government [7]. It is
now a large international company with headquarters in Annapolis, Maryland and over 50 operating locations
worldwide. ARINC has two regional headquarters: London to serve the Europe, middle East, and Africa
region and Singapore for the Asia Pacific region. The company has two major thrusts:
s and
information processing services for the aviation and travel industry. System engineering, development and
integration for government and industry [4,8]. ARINC 629 was introduced in May 1995 and is currently used
on the Boeing 777, Airbus A330 and A340 aircraft. The ARINC 629 bus is a true data bus in that the bus
operates as a multiple-source, multiple sink system as shown in Figure 2. That is, each terminal can transmit
data to, and receive data from, every other terminal on the data bus. This allows much more freedom in the
exchange of data between units in the avionics system. The true data bus topology is much more flexible in
that additional units can be fairly readily accepted physically on the data bus. A further attractive feature of
ARINC 629 is the ability to accommodate up to a total of 128 terminals on a data bus shown in Figure 3,
though in a realistic implementation the high amount of data bus traffic would probably preclude the use of
this large number of terminals. It supports a data rate of 2 Mbps.
The protocol utilized by ARINC 629 is a timebased, collision-avoidance concept in which each
terminal is allocated a particular time slot to access the bus and transmit data on to the bus. Each terminal will
autonomously decide when the appropriate time slot is available through the use of several control timers
embedded in the bus interfaces and transmit the necessary data. Figure 4 shows the typical ARINC 629 20 bit
data word format which is very similar to MILSTD- 1553B.
The first three bits are related to word time synchronization. The next 16 bits are the data contents,
and the final bit is a parity bit. The data words may have a variety of formats depending on the word function;
there is provision for general formats, systems status, function status, parameter validity, and binary and
discrete data words. The ARINC 629 data bus cable consists of an unshielded twisted pair of wires. The wires
are #20 AWG and are bonded together continuously along their length. The cables can be up to 100 meters
long and have no provisions for field splicing. ARINC 629 is defined for both voltage and current modes of
operation. One attractive feature of ARINC 629 is that it will be defined for a fiber optic interface ARINC 629
data transmitted in groups called messages. Messages are comprised of word strings, up to 31 word strings can
be in a message. Word strings begin with a label followed by up to 256 data words. Each label word and data
word is 20 bits [4,9,10,11,12,13].
COMPARISON OF DIGITAL DATA BUSES
Sl.No.
Characteristics/
Data-Bus
Mil-STD-1553b
ARINC 429
01.
application
military avionics
civil avionics
10.
stub length
limited to 20ft
02.
types of digital
transmission
multiple
single
multiple
sources/multiple sink sources/multiple sink sources/multiple sink
bus controller
one/two bus
controllers
no bus controller
bus monitor
one bus monitor
(optional)
no bus monitor (but no bus monitor
one transmitter)
remote terminal
as many as 31 remote no remote terminals number of terminals
terminals
(but receivers up to a 120
number of 20)
code
bi-phase Manchester rtz (return to zero)
code
code
03.
04.
05.
06.
ARINC 629
civil avionics
bus control function
distributed among all
terminals
participating
bi-phase Manchester
code
32 data words
128 words
256 words
07.
maximum number of
words in a message
format
08.
word length
16 bit/20 bits
32 bits
16 bits/32 bits
bit rate
1 mhz i.e. 1 micro
sec bit
12 to 4.5 kb/s.
1mhz i.e. 1 micro
i.e. 70 to 88 micro
sec bit.
sec bit
100 kb/s i.e. 10 micro
sec bit
09.