Homework #1

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ECE3724 Spring 2003
Homework #1
Due Wednesday, January 24th, 10am
Give a short sequence of machine instructions for the task:
“Given that data is stored in byte format in memory locations A-E, add the
contents of all five memory locations, and place the answer in memory location F.”
Instructions
Mov
Mov
Add
Ri, LOCa
LOCa, Ri
Ri, LOCa
are the only instructions available to transfer data between the memory and general
purpose register Ri. Do not destroy the contents of either location A-E.
Note that in the instructions, the destination operand is listed first, followed by the source
operand.
Uffenbeck Book Homework #1
Chapter 1 - Self test 1-8,11, 13 -17, 19-21
Analysis and Design 1.2 -1.4, 1.9-1.11
1. The three main parts of a stored program computer are__________, _________,
and __________.
2. Stored program computers repeatedly follow the sequence ___________ and
____________.
3. When data flows from memory into the processor, a _________ ________ cycle
is said to occur.
4. Under what conditions can the fetch and execute cycles of a computer overlap?
5. Under what conditions can the instruction decode and execute cycles of a
computer overlap?
6. List the three buses of a stored program computer. _________, _____________,
and ___________
7. 80x86 processors organize their memory into banks, with each bank _________
bits wide.
8. An 80x86 processor with a 20-bit address bus could access __________ bytes of
memory.
11. A microprocessor with built-in I/O and memory is called a
____________________.
13. Which of the following are characteristic of a CISC? List all that apply.
a) All instructions execute in a single clock cycle.
b) A small number of general purpose processor registers.
c) A large number of instructions with many different addressing modes.
d) Each instruction has the same length
14. A DSP is:
a) an analog microprocessor
b) a microprocessor optimized to perform repetitive math operations
c) a microprocessor designed to process analog signals that have been
converted to digital
form.
d) both (b) and (c)
15.
Does the 8086 microprocessor have an internal data bus width that matches the
external data bus widths? _________ If not what are the two bus widths?
Internal _________, External ________
**
16. When operated in Real Mode, an 80x86 microprocessor appears to be an
________ processor.
17. **How wide are the 8086 microprocessor internal data registers? _____________
18. When using a cache memory, the processor first searches the cache for necessary
data or the next program instruction, if found a _________ is said to occur.
19. Does the 8086 have cache memory? (Yes/No) _______________
20. Which of the following 80x86 microprocessors have more than one instruction
decoder?
21. The external data bus of the processor is also known as the ____________
__________ _______.
Analysis and Design Questions
1.2) The 8086 microprocessor has a 16-bit data bus. Its memory is organized into
______banks, each ______-bits wide.
1.3)
A microprocessor with a 24-bit address bus could access ___________ of
memory.
1.4)
Explain the difference between a memory read cycle and an I/O read
cycle. In which direction does data flow for these cycles?
1.9)
Intel microprocessors organize their memory into 8-bit wide banks. The
16-bit 80286, for example, requires 2 such banks. Typically these banks are built
using 4MB or 8MB SIMMs (single in-line memory modules). For each of the
following processors determine the minimum number or 4MB SIMMs required,
the resulting amount of memory and the maximum amount of memory possible.
The 80286 case is given as an example (assume byte w
Minimum number of
Microprocessor
SIMMs
80286
80386DX
80386SX
80486DX
Pentium
2
Total memory
capacity for these
SIMMs (at 4MB
each)
8MB
maximum memory
capacity for this
processor
16MB
1.10)Explain why each of the following microprocessor features affect (or do not
affect) the processing rate of the chip.
a) clock frequency
b) data bus width
c) address bus width
d) internal cache memory
e) coprocessor (internal or external)
1.11)Beginning with the 386, the 80x86 processors supported three different
operating modes. Give a brief explanation of each.
Real Mode
Protected Mode
Virtual 8086 Mode
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