Test 2_c_answers

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1
ECE371 Test 2
ECT
1. Assume that Channel 0 of the Enhanced Capture Timer System of the MC9S12DPS56B
microcontroller is being used to measure the ON duty cycle of a 1 KHz pulse width modulated signal.
(13 points) a) What is the duty cycle percentage if the following conditions are present (can be left as a
mathematical expression)?
• The input clock to the Timer/Control Unit has a frequency of 2 MHz
• Timer System Control Register 2 was initialized to 00000010
• When a rising edge is detected, a value of 1000 hex is read from register TC0.
• When the next falling edge is detected, a value of 1032 hex is detected.
Prescale is 2, divider is 4, each count is 2 µs
1 KHz, T = 1ms = 500 counts
0x1032 – 0x1000 = 0x32 counts = 50 counts
Duty Cycle = 50/500 = 10%
(13 points) b) Assuming that channel 0 is already initialized to perform input capture, write an ISR to
continually perform the required measurements recorded in part a (read the positive edge count into a
variable pcount and read the negative edge timer into ncount, and change the edge detection as needed,
you don’t need to compute the duty cycle or do anything else to pcount and ncount).
theISR()
{
if (TCTL4 & 1)//rising edge captured
{
TCTL4 = (TCTL4 & 0xFC) | 2;
pcount = TC0;
} else
{
TCTL4 = (TCTL4 & 0xFC) | 1;
ncount = TC0;
}
TFLG1=1;
(16 points) 2. The following registers are used to generate a PWM signal using the MC9S12DPS56B
microcontroller, what values should be set in the following statements to set the PWM signal to a
frequency of 5 KHz, with a duty cycle of 90% on the channel 4 output. Assume that the timer is using the
Bus Clock with a frequency of 2 MHz, that you will divide this by 2 using an appropriate prescale option.
each time count is 1 µs
PWM period should be 1/5KHz = 200 µs
//Turn on the timer and set prescale
TSCR1 = TSCR1 | 0x80; // Enable Timer
TSCR2=0x09; // 0b00001001 – TCRE=1, Prescale=1
TIOS = TIOS | 0x90 ;//Select Channel 4, 7 as Outputs
2
TCTL1= (TCTL1&0xFD) | 1; //xxxx xx01 - toggle Ch 4
OC7M = 0x10; // Select Channel 4
OC7D = 0; // Clear Channel 4
TC7 = 200;
TC4 = 20; //(TC7-TC4)/TC7 = 90%
Or
OC7D = 0x10; // Clear Channel 4
TC4 = 180 //(TC7-TC4)/TC7 = 90%
SCI
(10 points) 3. The following data stream is received by a serial SCI device, what data value (in hex) is
received, assuming that the sender is using 9-bit mode (8 data bits per character and 1 parity bit).
Assuming no errors in transmission and that the signal starts in “idle”, what is the binary value of the
character sent?
…101010011111111…
Data = 11100101 parity = 1
(5 points) (b) Assuming there are no errors in the transmission, is even parity or odd parity being used?
even
(5) c) The bus clock that drives the SCI serial I/O system on the MC9S12DP256B microcontroller is a 2
MHz clock, and the SCI baud rate registers are set as follows: SCIOBDH = 0; SCIOBDL = 1000
/*decimal*/;. What actual serial data rate will result from using these values (leave in fractional form if
necessary)?
Baud rate = 2MHz/(16*divisor) = 2e6/(16*(100)) = 2e6 / 0xA000 [= 1250 bps]
4.
(5 points) a) On the MC9S12DP256B SCI module, what can cause an "overrun error" (OR), and how can
this be prevented?
Not reading the received data register before the next incoming value is received
When the RDRF flag (SCI0SR1, bit 5) is set, the data register (SCI0) must be read immediately
using an interrupt service routine or a loop
(5 points) (b) On the MC9S12DP256B SCI module, what causes a "framing error" (FE), and how can this
be prevented?
Cause 1: Errors in the transmission
Remedies: Reduce data rate, shield cable, use shorter cable, reroute cable, provide better power
filtering
Cause 2: Configuration error
Remedy: Ensure that sender and receiver are using the same data size, parity configuration, and
bit rate
3
SPI
(15 points) 5. Assume that the SPI1 device of the microcontroller is to be used to send serial data to a
peripheral device. List the initialization values that should be put in all the registers that affect this
process. Below are the conditions that should be set up:





SPI Channel 1 is to be used as a Master SPI device and it should use the pins from the default
port.
The bit rate should be as close as possible to 100,000 bits per second. (Assume that the Bus
Clock Frequency is 2 MHz)
Interrupts requests should be generated each time a new byte is ready to be read from the receive
register.
The SS* signal is to be sent under manual control
The first data bit should start with the first rising edge of SCK
MODRR = xx0xxxxx
DDRP = xxxx1110
Baud Rate Divisor = Module Clock Rate/Desired Baud Rate
Baud Rate Divisor = 2 MHz/0.1 MHz = 20 = 4*5, 2(SPR+1) * (SPPR + 1), for SPPR = 4, SPR = 1
SPIBR = 01000001
SPICR1 = 11x1010x (SPIE=1, SPE=1, SPTIE=x, MSTR=1, CPOL=0, CPHA=1, SSOE=0, LSBFE=x)
SPICR2 = = xxx0xxxx (MODF = 0)
6. Assume that the SPI system of the microcontroller is to be used to send serial data to several output
peripheral devices.
(8 points) a) If the SPI Baud Rate Register (SPIBR) has been loaded with the value 0x53, what will be the
resulting baud rate, assume that the input clock is a 2 MHZ clock signal (leave in fractional form if
necessary)?
SPPR = 5, SPR = 3
Clock divisor = 2(3+1) * (5 + 1) = 96
Baud Rate = Module Clock Rate/Baud Rate Divisor = 2MHz/96 = 20,833.3… bps
(5 points) b) If an SPI master sends 1000 characters to a slave SPI device, what is the minimum time it
would take to do this, if the actual baud rate is 2 Kbps?
1000 char * 8bits/character * 0.5 millisecond = 4 seconds
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