MT221 - Vignan University

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VFSTR UNIVERSITY
II Year I - Semester
MT 221
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DIGITAL ELECTRONICS
Course Description & objectives:
With this course, students will learn different number systems, and their
applications. Also, Students will learn to appreciate the design of the basic
logic circuits, components used inside the computer.
Course Outcome:
1. Students will be able to represent numerical values in various number
systems and perform number conversions between different number
systems.
2. Able to analyze and design digital combinational circuits like decoders,
encoders, multiplexers, and de-multiplexers including arithmetic
circuits (half adder, full adder, multiplier).
3. Able to analyze sequential digital circuits like flip-flops, registers,
counters.
4. Knowledge of the nomenclature and technology in the area of memory
devices: ROM, RAM, PROM, PLD, FPGAs, etc.
5. Understand the importance and need for verification, testing of digital
logic and design for testability.
UNIT – I: Number System:
Decim al, Binary, O c tal an d Hexad ecimal numb er system s an d their
c onversio n. Ad ditio n , Su btrac tion usin g different numb er systems.
Representation of Binary numbers in sign magnitude, 1’s compliment and
2’s compliment form, Subtraction with compliment representation.
Binary Codes : BCD codes, 8421 code, Excess-3 code, Gray code, Error
detection using Hamming code.
UNIT – II: Boolean Algebra:
Fundamental concepts of Boolean algebra, Boolean functions, De morgan
laws, simplification of Boolean expressions, Canonical and standard forms
of Boolean functions, SOP and POS forms.
Combinational Logic Design : Logic gates, realization of Boolean functions
using Basic and Universal gates. Simplification of Logical functions using
Karnaugh map method (Two, Three and Four variable), Don’t-Care conditions.
UNIT – III: Combinational Logic Circuits Using Discrete Logic Gates:
Half Adder, Full dder, Half Subtractor, Full Subtractor, Carry Look-Ahead carry
adder, Decoders, Multiplexers, Demultiplexers, Parity Generator, Code
Converters, 7-Segment display decoder, PLA design, ALU, ROM.
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UNIT – IV: Sequential Logic Design:
Flip-Flops – SR flip-flop using NAND and NOR gates, Clocked SR, D, T and
JK flip-flops, Level triggering, Edge triggering – Truth tables, Excitation tables
of flip-flops, Master Slave JK flip-flop, Flip-flops with Preset and Clear.
UNIT – V: Counters:
Modulus of a Counter, Binary Counter, BCD Counter, Up-Down counter,
Asynchronous counters, Synchronous counters, Design of Synchronous
counters using State diagrams and Excitation tables, Johnson counter, Ring
counter.
Registers: Shift Left, Shift Right, SISO, SIPO, PISO, PIPO registers.
TEXT BOOKS:
1. Morris Mano, “Digital Design”, PHI, 3rd ed., 2006.
2. Zvi Kohavi, “Switching and Finite Automata Theory”, 2nd ed., TMH,1978
3. Charles H. Roth, “Fundamentals of Logic Design”, 5th ed., Thomson
Publications, 2004.
REFERENCES:
1. Fletcher, “An Engineering Approach To Digital Design”, 1st ed., PHI,
2009.
2. Taub & Schilling, “Digital integrated electronics”, 1st ed., TMH, 2008.
3. John M. Yarbrough, “Digital Logic Applications and Design”, Thomson
Publications, 2006.
4. R P Jain, “Digital Electronics”, 1st ed., TMH, 2010.
5. http://nptel.ac.in/courses/W ebcourse-contents/IIT-%20Guwahati/
digital_circuit/frame/
II Year I - Semester
ME 219
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THERMODYNAMICS
Course Description & Objectives:
To understand the nature of the thermodynamic properties of matter. Students
will learn to recognize and understand the different forms of energy and
restrictions imposed by the First Law of Thermodynamics on conversion from
one form to another.
Course Outcome:
On completion of the course, the student would be able to:
1. distinguish thermodynamic properties with their S.I units and
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