EGR 278
Digital Logic Lab
COURSE INFORMATION
Instructor: Paul Gordy
Spring 2004
Table of Contents
Topic
Syllabus
Electrical Components and Tools List
Retail Electronics Stores
Lab Policies
Lab Report Format
Sample Lab Guide
Sample Lab Report
Page(s)
1-3
4
5
6
7
8
9 - 15
SYLLABUS
EGR 278
Digital Logic Lab
Pre-requisites: EGR 271
Credits: 2
Co-requisite: EGR 277
Lecture Hours: 1
Lab Hours: 2
Instructor: Paul Gordy
Phone: 822-7175
Office: H-115 (Advanced Technology Center)
E-mail: PGordy@tcc.edu
Office Hours: as posted (will also be announced in class)
Fax (24 hour): 427-0327
Paul Gordy's Home Page - http://onlinelearning.tcc.edu/faculty/tcgordp/
TCC Engineering Club Page - http://www.tcc.edu/academics/divisions/eit/engineer/club/index.htm
Course Material:
1.
2.
3.
4.
5.
Lecture Notes - This is the primary source of information for this course. Material is presented
each week related to the lab topics for that week and the following week. Material covered in
lecture may not be found in the reference textbook. If any lectures are missed, the student should
try to copy the notes from another student.
Reference Digital Logic Textbook - No textbook is required for this course, however, the text
used for EGR 277 (Digital Logic) will serve as a reference for this course. The textbook currently
used for EGR 277 is M. Moris Mano, Digital Design, 3rd Edition, (ISBN: 0-13-062121-8),
Englewood Cliffs, NJ, Prentice-Hall, 2002.
Reference PSPICE Textbook - PSPICE will be used in some of the lab assignments in this
course. Students unfamiliar with PSPICE might want to obtain a reference PSPICE text. The
PSPICE text currently used in EGR 277 is Schematic Capture with Cadence PSPICE, 2nd
Edition, by Marc Herniter (ISBN: 0-13-04800-8).
Electrical components and tools - Students will be required to purchase some electrical supplies
for this course. A detailed parts list is shown on page 4.
Lab guides - Detailed guides will be provided by the instructor for each experiment.
Grading:
Course grades will be computed based on the following percentages:
Lab Reports
80 %
Preliminary Work
20 %
Grades will be assigned according to a standard 10 point scale as follows:
90 - 100
80 - 89
70 - 79
60 - 69
0 - 59
A
B
C
D
F
Page 2
Preliminary Work:
Many of the digital circuits to be constructed and tested each week must first be designed. The design
problems will be given out the week before the experiment. The student should complete all
Preliminary Work before the class begins in which the experiment is to be performed. The instructor
will check the Preliminary Work at the beginning of the class and assign a grade based on the work
performed.
Course Description:
EGR 278, Digital Logic Lab, is a lab course intended to be taken simultaneous to or after EGR 277,
Digital Logic. EGR 278 will utilize design and modeling techniques learned in EGR 277 as well as
expose the student to many practical issues concerning the constructing and testing digital circuits.
Detailed experience on the use of programmable logic devices (PLDs) is an important part of the lab,
including the use of PLD programmers and designing circuits using the software PLDShell. EGR 277
also covers the use of test equipment, report-writing techniques, and lab safety.
Course Objectives:
The general objectives of EGR 278 are to be able to:
1.
utilize design and modeling techniques for digital circuits
2.
gain exposure to different logic families and types of commercial devices
3.
gain practical knowledge in the construction and testing of digital circuits
4.
develop report-writing techniques
5.
gain exposure to the use of PLD programming software and hardware
Tentative Schedule:
Week
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Topic
Introduction to lab equipment, course procedures, etc.
Lab #1: Introduction to Logic Circuits
Lab #2: Characteristics of TTL Gates (Week 1 of 2-week lab)
Lab #2: Characteristics of TTL Gates (Week 2 of 2-week lab)
Lab #3: Open-collector and Driver Gates
Lab #4: Implementing Combinational Logic Circuits
Lab #5: Designing Combinational Logic Circuits
Lab #6: Soldering and 7-Segment Displays
Lab #7: Implementing Combinational Logic Circuits using PLDs
Lab #8: Decoders and Multiplexers
Lab #9: Multivibrators
Lab #10: Synchronous Counters
Lab #11: Sequential Circuit Design using PLDs
Lab #12: Traffic Light Controller using PLDs
Make-up lab week if needed
Page 3
Cheating:
College rules state that a student may be subjected to disciplinary action for academic cheating, plagiarism, or
assisting in cheating or plagiarism. Disciplinary penalties include college dismissal or suspension. In
addition, cheating, plagiarism, or assisting such activity is a most serious form of academic misconduct, and
will in the sole discretion of the faculty member result in a grade of 0 on the work or for the course. A single
act of cheating may subject a student to both a failing grade in the course, and student disciplinary action
perhaps involving suspension or dismissal from TCC.
Last Day to Withdraw Without Academic Penalty:
A grade of W is awarded to students who withdraw or are withdrawn from a course after the Add/Drop
period but prior to the completion of sixty-percent of the session (March 19, 2004 for the Spring 2004
semester). After that time, the student will receive a grade of F except under mitigating circumstances that
must be documented. A copy of the documentation must be placed in the student’s academic file.
Students are advised to discuss attendance irregularities with the instructor. Do not simply stop your
attendance. You may have mitigating circumstances that would preclude you from receiving a
withdrawal grade of F.
Page 4
Electrical Components and Tools List
Quantity
5
1
1
3
1
3
3
1
3
2
1
1
1
1
10
5
30’
1
5
1
1
1
1
1
Part Number
Description
7400
Quad 2-input NAND
74HC00
Quad 2-input NAND (CMOS)
7401
Quad open-collector 2-input NAND
7402
Quad 2-input NOR
7404
Hex Inverter
7408
Quad 2-input AND
7432
Quad 2-input OR
7447
BCD-to-7-segment decoder/driver (common anode)
7476
Dual JK Flip-flop
7486
Quad 2-input Exclusive-OR (XOR)
74151
8 x 1 Data Selector (multiplexer)
74155
Dual 2 x 4 Decoder/Demultiplexer
555
Timer
DIP switch (with at least 4 sliding switches)
220 or 270 Ω
Resistors (1/4 W)
2.2 kΩ
Resistors (1/4 W)
#22 wire
At least 3 colors (10’ each) - must be SOLID wire or a kit
containing a variety of pre-stripped wires of various lengths
MAN72 or other
common-anode 7-segment display (must be common-anode)
Red LED
Light-emitting diodes (T-1 ¾ or other)
1
1
breadboard
(6
x 2 or larger) Note: It is best if power strips are
2
8
located on both the top and bottom of the breadboard.
Wire strippers
(Any type is OK, but Radio Shack Cat. No. 64-1922 are good)
5V Voltage Regulator (7805 or similar device) - Radio Shack Cat. No. 276-1770A
9V battery
9V battery clip
Optional items (recommended):
Small needle-nose pliers
Chip extractor
Notes:
• Students are required to purchase the list of items shown above.
• If any of the items cannot be easily found, a limited supply of most of the items are available to be
borrowed from the instructor (breadboards and testing equipment cannot be borrowed since they are used
by other classes).
• Keep in mind that many of the circuits can be built before the lab if the student has the required parts.
This becomes a very important factor as the circuits get more complex.
Page 5
Retail Electronics Stores (unofficial):
Priest Electronics
(look for the special display for TCC students and tell them that you are a TCC
student in order to receive a discount)
1525 Technology Drive
Chesapeake, VA 23320
436-2466
Directions: take I-64 Exit 290A to N. Battlefield Blvd
take the 1st left turn on DeBaum Ave
proceed to Greenbrier West Business Park
turn left on Technology Drive
Cain Electronics (they probably only carry some of the parts)
1520 Ingleside Road
Norfolk, VA
855-3394
(a block or so north of Princess Anne Rd in Industrial Park)
Radio Shack
Numerous locations
(they stopped carrying most of the TTL devices, but this is a good choice for wire,
breadboards, wire strippers, etc)
Page 6
Lab Policies:
Absence:
Attendance is mandatory for all labs. Students will only be allowed to make up missed labs under
extreme circumstances. No credit will be given for a lab report unless the student attended the lab and
demonstrated the proper operation of the designed circuit(s). In case of emergency, notify the instructor
prior by phone, Email, or leave a message in the instructor’s mailbox in Building A (Princess Anne
building).
Groups:
Students may work alone or with a single partner on most of the labs, although some experiments
require that students design and their own circuits.. If two students work together as partners, only
one copy of the Preliminary Work and one lab report is required. Students may also work together
and turn in separate reports. If one student in a team misses a lab for some reason, he/she must
perform the lab on his/her own. Lab reports will not be accepted from students who do not perform
the required experiment.
Preliminary Work:
As stated previously, Preliminary Work is assigned with most experiments. This work is crucial since
you often must design the circuits that you are to build in lab. The instructor will check the Preliminary
Work at the beginning of the class and assign a grade based on the work performed. The instructor will
particularly check to see if all circuit documentation has been produced, including a detailed circuit
diagram with IC pin numbers labeled, and IC diagram showing IC labeling, and a wiring list.
Demonstration of Proper Circuit Operation:
Students will not receive credit for lab reports unless they demonstrate proper operation of their circuits
constructed in lab. If students have all of the required components needed for a circuit design, they can
often construct the circuits ahead of time at home and then bring in the circuits to lab to be verified by
the instructor. Also note that circuits should be neatly wired, using a reasonable wire color scheme
according to a wire table. The instructor may ask to see the wire table when the circuit is demonstrated.
Lab Safety:
Students should follow good safety procedures in labs at all times and should carefully handle all test
equipment. A portion of each lab grade relates to proper use of lab equipment and the proper use of
safety procedures.
Late Lab Reports:
Lab reports are due at the beginning of the class period following the class where the experiment was
performed. Late labs will be penalized 10 points per week (or any fraction of a week).
Grading of Lab Reports:
Lab reports must be presented in a professional manner. Lab reports will be grades both on technical
accuracy and on the presentation of the material. Use good writing style and correct grammar. Be sure
to include all required sections of the lab report as described on the following page. Closely examine
the Sample Lab Report as you prepare your first lab report.
Page 7
Lab Report Format
Each lab report submitted should contain the following sections:
Title Page
The Title Page should contain the following items as a minimum: Lab Number, Lab Title, your name,
the course number and name, and the semester.
Preliminary Work
Even though the Preliminary Work is checked at the beginning of each class, it must also be included in
the lab report where it will be graded in detail. Be sure to make the Preliminary Work as readable as
possible by including all given information or instructions and by explaining your steps.
Preliminary Work will always include a documented circuit layout. This layout must include the
following information:
A. Pinouts - Include pinouts for all IC’s to be used in the experiment
B. Detailed Circuit Diagram - The circuit diagram should include
- IC numbers (U1, U2, …)
- pin numbers
- labeling for all input signals, output signals, and intermediate signals
- all input and output devices, such as switches, clocks, LEDs, 7-segment displays, etc.
C. IC Diagram - Show each IC to be used, arranged as they will appear on the circuit board. Label
each IC (U1, U2, ….). Show the connections for Vcc and ground for each IC.
D. Wiring List - Form a list of all wire connections. See the example in the Sample Lab Report.
Laboratory Work
Clearly present the results of all testing performed in lab. List any changes to the design.
Discussion/Conclusion
Clearly and specifically state whether the objectives of the lab were accomplished. Did the circuits
tested produce the expected results and what design principles were verified by these results? What did
you prove or verify in the lab? Discuss any significant design changes.
Refer to the Sample Lab and the Sample Lab Report on the following pages. Include all sections
indicated in each report. Reports should be presented neatly and professionally. Use proper grammar,
employ good writing style, and make the reports as readable as possible. Readability of reports is
greatly enhanced by simple techniques such as:
• stating what you are about to show or adding comments at various points when you display your
results
• adding titles or headings before equations, graphs, tables, etc.
Page 8
EGR 278
Digital Logic Lab
File: SAMPLE_LAB.DOC
Lab # ?? (Sample Lab)
2-bit Adder/Subtractor with Carry-in/Borrow-in
A.
Objectives
The objective of this laboratory is the design and realization of adding and subtracting circuits
using combinational switching circuits.
B.
Introduction
It is expected that the student reviews those topics relating to modeling switching functions using
Karnaugh Maps and Boolean algebra. The student should also review the function definitions of
NAND and XOR (exclusive-OR) gates.
C.
Preliminary Work
1.
Construct the truth table for a 2-bit (logic variables B and A) binary adder/subtractor with a
carry-in/borrow-in input. An input logic signal called X is to control the circuit to perform
either addition or subtraction as follows:
if X = 0, perform the addition B + A
if X = 1, perform the subtraction B - A
Inputs to the circuit include B, A, and X as described above, as well as Cin/Bin, the carryin/borrow-in bit. The circuit should compute the result, referred to as SUM/DIF and the
carry-out/borrow-out, referred to as Cout/Bout.
2.
Use K-maps and Boolean algebra to simplify the equations for each output signal.
3.
Design a reasonably simplified or minimal multilevel realization using only 2-input NAND
gates (7400), XOR gates (7486), and inverters (7404). Draw a logic diagram.
4.
Explain any minimization techniques used.
5.
Present a documented circuit layout for your design including pinouts for all IC’s used, a
detailed circuit diagram with pin numbers labeled, a diagram showing the ordering of the
IC’s on the breadboard and the numbering (U1, U2, … ) of each IC, and a wiring list.
D.
Laboratory Work
1.
Construct your circuit from the wiring list. Note any changes.
2.
Test your circuit, filling in a truth table prepared for recording the circuit response for all
possible input combinations.
Page 9
Lab # ?? (Sample Lab)
2-bit Adder/Subtractor with Carry-in/Borrow-in
By: John Doe
Partner: Joe Smith
EGR 278
Digital Logic Lab
Spring 2010
Page 10
Preliminary Work
1.
The truth table shown below is for a 2-bit binary adder/subtractor with a carry-in/borrow-in
input. The inputs and outputs are described as follows:
Inputs:
B, A
Cin/Bin
X
Outputs:
SUM/DIFF
Cout/Bout
X
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
binary inputs
carry input or borrow input
input to indicate whether the circuit is
to perform addition or subtraction
= B + A if X = 0
= B - A if X = 1
carry output or borrow output
Inputs
Cin/Bin B
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
A
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Outputs
SUM/DIF Cout/Bout
F
0
0
1
1
1
0
0
0
1
1
0
1
0
0
1
1
0
0
1
0
1
0
0
1
1
0
0
1
0
1
1
1
Page 11
2.
Shown below are the K-maps and logic equations for the two output signals: SUM/DIFF and
Cout/Bout.
XCin/ Bin
BA 00 01
1
00 0
11
1
10
0
XCin/ Bin
BA 00 01
1
00 0
11
0
10
0
01 1
0
0
1
01 1
1
1
0
11 0
1
1
0
11 0
1
1
1
10 1
0
0
1
10 0
0
1
0
K-m ap for
K-m ap for
Logic equations are generated for each output in Sum-Of-Products (SOP) form using the
groupings indicated on the K-Maps above.
SUM / DIFF = Cin / Bin • B • A + Cin / Bin • B • A + Cin / Bin • B • A + Cin / Bin • B • A
Cout / Bout = Cin / Bin • A + X • Cin / Bin • B + X • B • A + X • B • A + X • Cin / Bin • B
3,4. The logic equations generated above are in minimal SOP form (with ANDs, ORs, and inverters
only), but they can be further minimized using XOR gates as follows.
SUM / DIFF = Cin / Bin • (B • A + B • A) + Cin / Bin • (B • A + B • A )
SUM / DIFF = Cin / Bin • ( B ⊕ A ) + Cin / Bin • ( B ⊕ A )
SUM / DIFF = Cin / Bin ⊕ ( B ⊕ A )
(final minimized result)
Cout / Bout = A • (X • B + X • B) + Cin / Bin(X • B + X • B) + Cin / Bin • A
Cout / Bout = ( A + Cin / Bin) • (X ⊕ B) + Cin / Bin • A
(
)
Cout / Bout = ( A + Cin / Bin) • X ⊕ B + Cin / Bin • A
(final minimized result)
The two output equations generated above could be implemented using 8 gates (4 IC’s) as shown
below.
A
B
SUM/DIFF
Cin/Bin
X
Cout/Bout
Page 12
The AND gates and OR gates can easily be replaced by NAND gates in the previous circuit.
Shown below are the two ways of drawing a NAND gate:
A
B
A B
A
B
A+B=A B
If “bubbles” are added to the circuit on the previous page to change the AND gates and OR gates
into NAND gates and then the circuit is “balanced” using inverters, the following circuit is
generated.
A
B
7486
SUM/DIFF
7486
Cin/Bin
7486
X
'04
7400
'04
7400
7400
Cout/Bout
'04
7400
The circuit above meets the design requirement of using only 2-input NAND gates, XOR gates,
and inverters. The total number of gates required is 10, but only 3 IC’s are needed.
Page 13
5.
Circuit documentation:
Pinouts for the required IC’s:
14
13
12
11
10
9
8
Vcc
7400 Quad 2-input NAND
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
Vcc
7404 Hex Inverter
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
Vcc
7486 Quad Exclusive-OR
GND
1
2
3
4
5
6
7
Page 14
Adder/Subtractor Circuit Diagram:
1
(Sw_ 1) A
U1
(Sw_ 2) B
D
3
4
U1
2
Cin/ Bin
(Sw_ 3)
E
U1
10
1
U2
5
8
G
2
4
U2
U2
6
F
10
U3
U3
3
SUM/DIFF
(LED_ 1)
5
9
(Sw_ 4) X
6
8
K
9
6
13
J
5
4 H
11
U3
12
1
U3
3
Cout/Bout
(LED_ 2)
L
2
IC Diagram:
Vcc
14
Vcc
U1
7486
14
7
Vcc = 5V
Vcc
U2
7404
14
7
U3
7400
7
Wiring List:
A
E
Sw_1 - U1_1
U1_1 - U2_1
U2_1 - U3_1
B
Sw_2 - U1_2
U1_2 - U1_9
Cin/Bin
Sw_3 - U1_5
U1_5 - U2_3
U2_3 - U3_2
X
Sw_4 - U1_10
D
U1_3 - U1_4
K
U1_8 - U2_5
F
U3_8 - U3_13
L
U2_6 - U3_10
G
U3_3 - U3_12
U2_2 - U3_4
SUM/DIFF
U1_6 - LED_1
U2_4 - U3_5
Cout/Bout
U3_11 - LED_2
H
J
U3_6 - U3_9
Page 15
Laboratory Work
1.
The adder/subtractor circuit was constructed according to the wiring list shown previously. No
changes were needed.
2.
The circuit was tested for all 16 input switch combinations. An output of 1 (HIGH) was
indicated by the corresponding LED being lit and a 0 (LOW) was indicated by the LED not
being lit.
X
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Inputs
Cin/Bin B
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
A
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Outputs
SUM/DIF Cout/Bout
F
0
0
1
1
1
0
0
0
1
1
0
1
0
0
1
1
0
0
1
0
1
0
0
1
1
0
0
1
0
1
1
1
Discussion/Conclusion
The truth table generated from testing the adder/subtractor circuit is identical to the truth table
generated in the Preliminary Work, therefore the design presented has been validated. No
problems occurred and no design modifications were required.