CURRICULUM VITAE
B1-503, Swarganga,
Near Kalasagar Hotel, Pimpri
Pune – 411018
email: philipv@rediffmail.com
Contact No: 9881152957
VINEETA PHILIP
Contact #
Marital Status
Sex
Date of birth
E-mail address
:
:
:
:
:
9881152957
Married
Female
10th Feb 1983.
philipv@rediffmail.com
Academic Background:

June 2008 – June 2011:M.E.Electronics (Digital Systems)
JSPM’s Rajashri Shahu College of Engineering, Tathawade.
University of Pune.

June 2002 - May 2005: Bachelor of Engineering (Electronics & Telecommunications),
Vidyavardhini’s College of Engg. & Technology, Vasai
University of Mumbai, 62.9% - Ist class.

June 1999 - May 2002: Diploma in Industrial Electronics,
Bhausaheb Vartak Polytechnic, Vasai.
Board of Tech Education, M.S., 78.10 % - Distinction

June 1989 - Mar 1999: Secondary School Certificate.
Carmelite Convent High School,
Maharashtra Board, 83.73% - Distinction
Elective Subjects ( for ME):
Sem I: 1. Advanced Digital System Design
2. Memory Technologies
Sem II:1. Digital System using PLD’s
2. Digital Signal Compression
Elective Subject (for BE):
1. Data Compression and Encryption ( Sem.VII )
2. Wireless Network (Sem.VIII)
Skill Set:
Operating Systems:
Programming Languages:
MS- DOS , WINDOWS 98/XP
VHDL, MATLAB, C.
Teaching Experience:
3 yrs. 8 months experience as lecturer in ASM group’s C.S.I.T’s Electronics Dept.
6 months experience as lecturer in Electronics Dept. in N.M.V.P,Talegoan.
1 year, 1 month as lecturer in Electronics Dept. in AISSMS,IOIT,Pune.
1st March 2011 till date as Assistant Professor in Electronics Dept. in AISSMS,IOIT,Pune.
Subjects taught:
1.
Digital Signal Processing
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2. Integrated Circuit & Applications
3. Signals & Systems
4. Basic Electronics Engineering
5. Digital Electronics
6. Linear Electronics
7. Microprocessor Programming & Architecture
8. Computer Architecture
9. Microcontroller architecture & Embedded Systems ( in current semester)
Projects being developed as part of the PG Curriculum:
 Project Title: Modulo(2p±1) multiplier using a three operand modular signed digit addition
algorithm.
Description:
Two operand modular SD addition is implemented by performing an end around carry SD
addition. Three operand modular SD addition is implemented by performing two operand
modular SD addition twice. A faster modular addition can be implemented by using SD carrysave addition with p SD number counter. When a serial modular multiplier is constructed
using the three-operand modular SD adder, two modular partial products can be added to the
sum at the same time. Thus high speed modular multiplier can be obtained. Also the speed of
modular multiplication is faster than that without using the three-operand modular SD adder.
Projects Developed:

Final year major project as part of the Engineering Curriculum:
 Project Title: Microcontroller based DLC simulator (from Reliance Infocomm).
Description:
DIGITAL LOOP CARRIER (DLC) is an equipment that bundles a number of individual
phone line signals into a single multiplexed digital signal for local traffic between a telephone
company central office & business complex or other outline services area. For, the purpose of
demonstration, the working of a telephone exchange that provides interconnectivity to 4
different telephone users was shown as the hardware part of our project.
 Final year major project as part of the Diploma Curriculum:
 Project Title: Inverter
Description:
Inverter is a circuit, which converts d.c. power into a.c. power at the desired voltage &
frequency. In most of the inverters both these quantities namely voltage & current are required
to be controlled. The inverter developed by us provided uninterrupted power supplies in
computers & domestic uses. It provided over current protection & controlled output.

Final year minor project – 1 as part of the Diploma Curriculum:
 Project Title: Voltage regulator using IC 723
Description:
This project builds into a versatile power supply capable of delivering 1A up to 10V & ½ A up
to 15V. The control circuit of this supply is formed by the integrated circuit precision voltage
regulator – IC 723. The integrated circuit is a monolithic voltage regulator constructed on a
single Silicon chip using planar epitaxial process. Provision is made for adjustable current
limiting & remote shut down. Other features are low current drain, low temperature drift, &
high ripple rejection.
 Final year minor project – 2 as part of the Diploma Curriculum:
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 Project Title: Overflow Liquid Level Sensor
Description:
Here we used IC CD 4096. It indicated the overflow level as the name itself suggests. The
output of the IC provided I/P to a pnp transistor, whose output energized a relay, which in turn
produces an alarm when the liquid level reaches it overflow level. This project developed by
us finds its use for domestic use. It can also be used for industrial purpose.
Achievements & Awards:
Academics:
Received Merit Scholarship for securing distinction in 3rd year of diploma from JRD Tata Trust
in the year 2003.
Co-curricular Activities:
Bagged 2nd prize in the project showcase “Tech Trix” conducted by IEEE VCET – Anveshan 2004.
Member of the Institute of Electronics & Telecommunication Engineers (IETE)
International Journal, Conferences, Seminars & Workshops attended:
- Paper published in International Journal on “Nanotechnology & its Applications” by RIP.
-Attended International Conference on ‘Ongoing Research in Management & IT’ and presented
paper titled “Image Fusion” conducted by ASM group of institutes in the year 2009.
-Attended International Conference on ‘Ongoing Research in Management & IT’ and presented
paper titled “Modulo (2p±1) multiplier using a three operand modulo signed digit addition
algorithm” conducted by ASM group of institutes in the year 2010.
-Attended International Conference on ‘ Future Trends inElectronics Engineering
“and presented paper titled “Efficient Modulo (2p±1) multiplier using a three operand modulo
signed digit addition algorithm” conducted by Guru Nanak College of Engineering, Hyderabad.
-Attended National Conference on “Signal Processing” and presented paper titled “Image Fusion”
conducted by MIT , Aurangabad in the year 2009.
- Attended National Conference on “Futuristic Applications in Electronics Engineering
” and presented paper titled “Modulo (2p±1) multiplier using a three operand modulo signed digit
addition algorithm”conducted by AISSMS, IOIT, Pune, in the year 2010.
- Attended National Conference on “Nanotechnology & its applications in Electronics Engineering
” and presented paper titled “Nanoelectronic Devices” conducted by AISSMS, IOIT, Pune, in the
year 2011.
- Attended National Conference on “New Approaches in Computing Technology
” and presented paper titled “ Nanocomputing” conducted by Indira College of Engineering &
Management, Pune, in the year 2012.
-Participated in a Conference for PG Electronics Engineering students conducted by University of
Pune, in the year 2009.
- Presented paper in Conference for PG Electronics Engineering students conducted by University of
Pune, in the year 2010.
-Participated in ISTE approved workshop on “DSP Experiments with MATLAB” conducted by
JSPM’s Rajashri Shahu College of Engineering, in the year 2009.
- Participated in two days workshop on “ADSP & its Applications” conducted by JSPM’s
BSIOTR, in the year 2011.
- Participated in five days Mission 10X workshop, conducted by COE, Pune, in the year 2012.
-Participated in one day workshop on syllabus exploration for TE(Elex.) under UoP, conducted by
SITS,Pune, in the year 2011.
- Participated in one day workshop on syllabus detailing of BE(Elex.) under BOS, UoP, conducted
by GHRCOE&M ,Pune, in the year 2011.
I hereby declare that the above written particulars are true to the best of my knowledge and
belief.
-Vineeta Philip.
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