EE2304
Implementation of an 8-bit Adder
Fall 2004
Implementation of 8-bit Adder
1. Objective
Design an 8-bit adder which will be capable of:
 Taking two 8-bit numbers from the DIP switches (already present on the UP2 board);
 Display the result of the addition on the seven-segment display (already present on
the UP2 board);
 Provide the user with a visual feedback when overflow occurs;
2. Parts & Equipment
Part description

Part number
Quantity
Equipment:
o Altera UP2 Development Board
o MAX-plus-II Integrated Design Environment (Software)
3. Introduction
One of the most basic components of every computing device is the adder. In this laboratory you
will design an adder that takes two 8-bit hexadecimal numbers as input. When adding the two 8bit numbers the result can be a 9-bit number in which case an overflow occurred. Your design
should visually indicate when an overflow occurred. Your design should use the seven-segment
display to convey the result of the summation back to the user. The two 8-bit numbers should be
entered by the user using the two DIP switches which are located right below the EPM7128S
chip on the UP2 board. Figure 3.1 shows the UP2 board and the two DIP switches that you
should use.
Department of Electrical and Computer Engineering
Michigan Technological University
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EE2304
Implementation of an 8-bit Adder
Fall 2004
<- DIP SWITCHES
Figure 3.1: Altera UP2 board; Showing the DIP switches 1 & 2.
This design should be implemented using combinational logic. This means that your design will
not generate or rely on a clock signal. The result of the summation will be displayed as soon as
the user inputs the two 8-bit numbers.
Besides the constraints and requirements stated above you are free to explore your own design
path. There is more than one way to do this lab, so there is no right or wrong way.
4. Useful Information on the UP2 Board
The most important thing you have to know about the UP2 board is that all of its
peripherals (I/O’s) are driven by active-low signals. For more information on how to drive the
LED’s and the seven-segment display refer to the “University Program Design Laboratory
Package User Guide” pdf file. In that document you will find all the information you need to
know about the UP2 board and how to use it. In the aforementioned document you will also find
information on how to setup the JTAG jumpers in order to program a specific device on the
board. Remember that the UP2 board has two FPGA chips on it, and for this design we
recommend that you use the EPM7128S device.
5. Simulating your Design
We recommend that you simulate your hardware design before you download it to the
EPM7128S device. This way you will be able to ensure that the design works before you
Department of Electrical and Computer Engineering
Michigan Technological University
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EE2304
Implementation of an 8-bit Adder
Fall 2004
program the device. You should be familiar with how to use the “Waveform Editor” after doing
the tutorial last week.
6. Helpful Hints
Here are some helpful tips on what your design should have:
 Adder block. You might want to consider writing the adder circuit in Verilog and
creating a symbol that you can use in your graphical editor.
 Hexadecimal-to-seven-segment-display converter circuit. Again, you might find it helpful
to design the converter using Verilog and then create a symbol which can be used in the
graphical editor.
 Your top level design can be a graphical editor file in which all the components are
connected, and input and output pins are added.
 Keep in mind that the seven-segment display is hard-wired to the EPM7128S chip, which
means that you will have to find which pins on the FPGA are used to drive the LEDs on
the seven segment display.
7. Testing Your Circuit
Before you power on your circuit have your T.A. inspect the circuit and sign the signoff sheet.
When your T.A OKs your circuit, power it on! You should see the seven-segment display light
up. If your circuit is not functioning start debugging. Here are some helpful tips for debugging
your circuit.
 Make sure that the UP2 board is turned on;
 Make sure that the JTAG jumpers are set to program the device that you want to use;
 Make sure you accounted for the active-low signaling used by all I/O devices on this board;
If all else fails, get your T.A to help you with your design.
8. Consideration Questions
When writing your lab report, answer these questions:
1. What was the hardest part of this lab? Please elaborate
2. Assuming you used Verilog to implement this design, how hard would it be to implement
this design using purely combinational logic? (In example, using Karnaghu maps and
doing the layout using nand or xor gates)
3. What kind of adder does you design implement? Carry-lookahead, ripple-carry or
something else? Why did you choose the one that you used?
4. Explain what is meant by active-low signaling. Why do you think active-low signaling is
used?
9. References
University Program Design Laboratory Package User Guide
Department of Electrical and Computer Engineering
Michigan Technological University
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EE2304
Implementation of an 8-bit Adder
Department of Electrical and Computer Engineering
Michigan Technological University
Fall 2004
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EE2304
Implementation of an 8-bit Adder
Fall 2004
T.A. Sign-off Sheet; Week - 1 -
Group Members:
________________________________________
________________________________________
________________________________________
1. The adder design and the display works properly;
________________________________________
2. The circuit informs the user when an overflow has occurred;
________________________________________
Department of Electrical and Computer Engineering
Michigan Technological University
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EE2304
Implementation of an 8-bit Adder
Fall 2004
Pre-lab Questions
Student Name:
________________________________________
1. What pins are assigned to the seven-segment-display on the EPM7128S? Draw the two digit
display and label each segment with the corresponding pin.
2. Draw the JTAG jumper configuration for programming the EMP7128S device onthe UP2
board.
3. Explain, in few sentences or using a diagram, what is an active-low signaling.
Note: You might find it useful to look at the User Guide for the Altera UP2 board..
Department of Electrical and Computer Engineering
Michigan Technological University
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