Decoupling-Offset Pulse Width Modulation for Multilevel Inverters
ABSTRACT
Abstract: In the paper, Decoupling Offset Pulse Width
Modulation (PWM) technique will be presented. The
method is simple and flexible for controlling a multilevel
inverter. The PWM method can be simplified with the
help of the virtual two-level inverter. Its corresponding
nominal switching time diagram is deduced based on the
nominal modulating signals. The PWM algorithm will be
analyzed for any level inverter on the condition of variable
dc-voltage sources. The ability of separated control of the
offset would help to set up various PWM modes and
reduce dc voltage imbalance. Furthermore, the deduced
modulating signals enable balancing the ac voltages on the
condition of the abnormal dc sources. From the nominal
switching time diagram, the correlation between space
vector PWM and carrier based PWM methods can be
established. The validity of the algorithms will be
demonstrated by simulation and experimental results.
Keywords: PWM technique, Decoupling
Unbalance dc sources, Multilevel Inverter.
offset,
III.
SIMULATION
AND
EXPERIMENTAL
RESULTS
Simulations have been developed for 3-level NPC inverter
with the following variable dc voltage sources (Fig.6) as:
three phase load R-L in series, R=10  , L=60[mH].
Other parameters are selected as the modulation index
m=0.8 and output frequency f 0  50 Hz . The reference
medium common mode voltage is selected. For the
uncompensated algorithm, the diagrams of the 3f currents
and the A-phase voltage, are drawn in Fig.6a and b.
Experimental hardware of 3-level NPC
inverter, which used FGL60N100BNTD and Control kit
eZdsp TMS320F2812, was built to validate the theory.
Two DC voltages were measured with the Hall sensors
LEM LV25 NP, and filtered through a low pass filter
with the cut off frequency setting of 1kHz. The frequency
of the triangle carrier waveform was selected as 3kHz.
Experimental parameters were
vC1  50V ; vC 2  70V ,
f 0  50 Hz , R 10 and L  60mH .
Figure 1
The PWM algorithms were attained gradually
without compensating for the AC load voltages for m=0.3,
0.6 and 0.8. Their corresponding diagrams of phase load
voltage, currents and FFT of current were drawn for
m=0.3 without using compensating algorithm as shown in
Fig. 8,9,10 and using compensating algorithm as shown in
Fig.11,12, and 13. Further results for m=0.6 and 0.8 were
demonstrated in Fig. 14-19 and Fig.20-25, respectively. In
the end, the algorithm was verified with a variable dc
voltage by using two different dc capacitors. The obtained
diagrams were shown in Fig. 26-29. From the FFT
diagrams of the load voltages and currents, the
compensating algorithm had reduced significantly the
second harmonic content compared with the
uncompensated case. As the result, the outputs would
regain their balancing.
IV.
CONCLUSIONS
In this paper, the decoupling offset PWM scheme for a
multilevel inverter has been presented. The independent
control of two off-set components can help to utilize fully
and efficiently the offset voltage for regulating the
multilevel inverter performance. The computing problem
of space vector modulation can be solved simply in the
proposed PWM scheme. The ideas of PWM methods in
conventional two-level inverter can be efficiently applied
to the virtual two-level inverter. Furthermore, the method
has overcome the computing problem of space vector
PWM in multilevel inverter PWM on the condition of the
unbalanced dc sources. The introduction of the nominal
modulating signals helps to understand the relationship
between space vector PWM method and carrier PWM
method in multilevel inverter for any dc voltage condition.
This correlation can simplify implementing a modified
PWM method. The principle of the decoupling offset
PWM by separated control of
common mode
components and other obtained results can be applied to
any-level inverters. The simulation and experimental
results have confirmed the validity of the proposed PWM
method.
Figure 3,9,10: m=0.3. Diagrams using PWM algorithm without
the compensation . Diagram of the phase load voltage, currents
and the FFT of the load current.
Figure 4
Figure 2: 3-level inverter with compensation- Diagrams of the
imbalanced dc voltage sources; reference modulating signal;
local offset; three phase currents and phase load voltage. M=0.8
and DPWM with the minimum common mode voltage.
Figure 5:
2
Figure 6,12,13: m=0.3. Diagrams using PWM algorithm with the
compensation . Diagram of the phase load voltage, currents and
the FFT of the load current.
Figure 9,15,16: m=0.6. Diagrams using PWM algorithm without
the compensation . Diagram of the phase load voltage, currents
and the FFT of the load current.
Figure 7
Figure 10
Figure 8
Figure 11
M=0,6
3
Figure 12,18,19: m=0.6. Diagrams using PWM algorithm with
the compensation . Diagram of the phase load voltage, currents
and the FFT of the load current
Figure 15,21,22: m=0.8. Diagrams using PWM algorithm
without the compensation . Diagram of the phase load voltage,
currents and the FFT of the load current
Figure 13
Figure 16
Figure 14
Figure 17
4
Figure 18,24,25: m=0.8. Diagrams using PWM algorithm with
the compensation . Diagram of the phase load voltage, currents
and the FFT of the load current
Figure 21,27: Algorithm without compensation for
variable dc voltage- C2=4700 uF; C1=220uF, R=10 Ohm,
L=60mH, vc2=70Vdc; Vc1=variable (35-65Vdc).
Diagrams of dc sources and output current.
Figure 19
Figure 22: Algorithm without compensation for variable
dc voltage- C2=4700 uF; C1=220uF, R=10 Ohm,
L=60mH, vc2=70Vdc; Vc1=variable (35-65Vdc).
Diagrams of FFT analysis of output current
Figure 20
5
Figure 23: Algorithm with compensation for variable dc
voltage- C2=4700 uF; C1=220uF, R=10 Ohm, L=60mH,
vc2=70Vdc; Vc1=variable (35-65Vdc)
Figure 24: Algorithm with compensation for variable dc
voltage- C2=4700 uF; C1=220uF, R=10 Ohm, L=60mH,
vc2=70Vdc; Vc1=variable (35-65Vdc). Diagrams of
FFT analysis of output current
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