School of Electronics, Electrical Engineering and
Computer Science
Final Year Project 2006/2007
Title: Room Temperature Bonding of Silicon Chip to
Heat Sink
Supervisor: Prof HS Gamble
Moderator: Dr SJN Mitchell
Consultants:-
Dr P Rainey, Dr R Dickie
Indexing terms:-
Microelectronics
Silicon devices for several different applications need to be kept cool.
However, the dissipated power density, which can be quite high and is
continually increasing as devices complexity grows. The high power chips are
normally attached to packages by either thermal compression bonding or by
epoxy. The former can be uneven and requires quite a high temperature,
while the latter provides poor conductivity to the heat sink. The
Microelectronics research group is engaged in a collaborative research project
on SiGe quantum cascade lasers. These consist of multiple thin layers of
silicon and silicon germanium and the structure is very sensitive to
temperature. Thus they need to be provided with a heat sink preferably at a
temperature below 400C. One method being investigated is to join the laser
chip to the heat sink by copper electrolytic plating. This is a room temperature
process and if successful could be used for heat sinking in many applications.
The aim of the project is to investigate various techniques of copper plating
silicon chips to copper heat sinks and to determine the thermal conductivity of
the bond. The student will be required to:
Carry out the copper plating
Use Scanning Microscopy to view cross sections of the copper bonding
Design and fabricate aluminium resistors on silicon
Calibrate the resistance value as a function of temperature
Calculate thermal resistance for the copper bonds