Product Assurance Testing

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PRODUCT ASSURRANCE TESTING TO CORRELATE QUALITY DATA WITH PRODUCT PERFORMANCE
By:
Stanley L Bentley, P.E
Senior Technical Advisor, Divsys International
David Fissell MBB
Principal, Global Lean Consulting
How can a user of Printed Circuit Boards know they received what they specified? Recently, a field
failure called into question some of the traditional means of insuring product performance when the
failure was traced back to a printed circuit board. The product failure resulted in damage to an
expensive piece of equipment. During analysis of the product failure, an inconsistency was found
between the quality report supplied by the fabricator and the root cause revealed by laboratory
analysis. The copper in the plated through holes was not what was expected.
Factoid:
“Cross section analysis of a plated hole is the most accurate way to measure the copper
thickness. However, the derived measurement is only valid if the cross section is precisely in the
center of the plated hole. As the cross section location moves from the geometric center, the
copper measurement will increase, leading to a false prediction of the actual copper thickness.”
The PCB in question was produced to meet the IPC-6012C-2010 Class 2 performance specification. The
fabricator had supplied a quality report and mounted cross sections (“pucks”) with the lot. The quality
report indicated that the minimum copper thickness for Class 2 had been met (Table 3-3 Surface and
Hole Copper Plating Minimum). The supplied puck, when measured with an inverted stage
metallurgical microscope, yielded a measurement that was 21 micro inches above the required
minimum thickness of 709 micro inches.
Why is this measurement of copper plating significant, and does 21 micro inches make a difference?
During the 1970’s, the US auto industry devoted many research hours in search of definitive rules that
could be used to predict the performance of printed circuit boards in the unforgiving environment of an
automobile engine compartment. Much of that work has evolved to become industry guidelines even
though the origins are becoming lost in history. The one element that was determined to be absolutely
essential to product performance was the thickness of the through-hole copper plating. The reason is
that in all epoxy-glass base printed circuit boards, there is a significant mismatch between the
coefficient of thermal expansion (CTE) of the epoxy resin and the copper through-hole plating. For this
reason, wide changes in the ambient temperature (without consideration of the I2R heating within the
PCB) create stress in the plated barrel as the epoxy-glass expands at a higher rate than the through-hole
copper.
Extensive testing with .062” thick FR4 (Flame retardant epoxy resin) has evolved an industry expectation
that a plated hole, with an aspect ratio of less than 6:1, is able to withstand 1000 temperature cycles
from -55C to + 125C. (See IPC-TM-650 section 2.6.7.2B and IPC 4101C/26) Without oversimplifying a
complex set of interrelated factors, it needs to be understood that the thickness of the copper plating is
one of several variables in achieving 1000 thermal cycles. However experimentation has proven this one
variable to be the most significant.
Factiod:
“As the aspect ratio (board thickness: finished hole size) increases, plating throwing power ([hole
copper plating/surface plating] x 100) decreases. When the throwing power drops below 85% it
results in the through hole plating resembling a “dog-bone” (copper plating in the hole is thick at
the upper and lower surface and thin in the center). As the dog-bone plating becomes more
pronounced, the opportunity for brittle fracture and early mortality fatigue failure along the
centerline area of thin copper plating increases.”
Simple Rule of Thumb for Performance vs Copper thickness
Experts will have significant disagreement as to the degradation in expected thermal cycles that one
could expect as the copper thickness is reduced from 1 mil (1000 micro inches) to the IPC Class 2 copper
average minimum of 709 micro inches. They will cite resin composition, support system, aspect ratio,
surface plating, and etch back to name a few. Excluding other factors, a reasonable rule of thumb for a
designer is to assume a linear relationship for this non-linear effect and to reduce the expected number
of thermal cycles by an equivalent percentage (approximately 30%) to 700 thermal cycles at the IPC
Class 2 minimum. This rule of thumb is intended to give the designer some basic guidelines for product
performance. If the desired product performance is impacted by this rule of thumb, then far more
exhaustive analysis is required.
Mismatch between mounted cross section and failed PCB
In the case of the product failure analysis, two questions were raised. First, was copper plating at the
IPC Class 2 minimum a factor in the failure, and second, did the design require a higher number of
thermal cycles than the rule of thumb was predicting? The root cause analysis determined that the
copper plating was a factor, but that the design expectations did not violate the rule of thumb for
thermal cycles. How could this be? The reason was that the copper plating in the thru-holes when
measured on the failed PCB fell significantly below 709 micro inches, not the 730 micro inches predicted
by the supplier “puck”.
This revelation called into question the ability of the supplied quality data to predict the performance of
the manufacturing lot. One obvious explanation is that the lot was mixed (two or more manufacturing
lots interweaved and shipped as one). This explanation while plausible is far too “convenient”, and
plays to a bias about the ethics of the vendor. The mixed lot explanation was set aside as there was no
way to prove or disprove the assertion.
A DOE to test Correlation
A correlation experiment was devised to look at the product performance by a number of PCB vendors,
including the vendor of the failed unit. By using multiple vendors, with no knowledge of the test, one
could exclude a mixed lot theory if the data from multiple vendors exhibited a lack of correlation
between quality data and actual boards within the lot.
The test parameters and resulting data are listed at the end of the article. Anyone interested in
statistics will find the test data both interesting and useful. However for the purposes of the evaluation
results, the test concept was to use ten (10) vendors and evaluate the supplied quality data. The only
item compared between the vendors was the through-hole copper plating. Of the ten vendors, two
failed the 709 micro inches minimum when pucks were actually measured, and the vendor” in question”
was over by 11 micro inches. The two failures were not “radical”. Both failed by 19 micro inches. A
very interesting statistic evolved from the quality data. Of the ten vendors, the largest margin of “excess
copper” over the 709 micro inches was only 121 micro inches. None of the vendors approached the
automotive standard of 1000 micro inches.
DOE Test Method
Five (5) PC boards from each vendor were examined, with three cross sections from each board. When
this data was evaluated (test methodology described in the test report), three of the 10 vendors failed
the minimum of 709 micro inches, and the vendor in question was exactly 700 micro inches. Only one
vendor failed both the puck measurements and the sample product measurements.
If the results were taken at face value, then we would conclude that in the case of 5 out of 10 vendors,
their quality data did not correlate with their product performance in this very simple test. A far more
extensive test would need to be conducted to make definitive predictions about the vendors, but the
results present a tantalizing prospect that calls into question a very established practice.
Failed Product Conclusion
In the case of the failed product, it was concluded that the vendor in question consistently performed to
the absolute minimum of the specification and that any small process variance would yield product that
was below the Class 2 minimum. It did not rule out the possibility of a mixed lot as the vendor quality
data during the test correlated closer than their quality data did with the failed unit.
The test results infer that there is vendor to vendor variation in their correlation of quality data and
actual product performance. This leads the examiners to conclude that without other corroborating
information or data that is compiled from multiple lots with differing designs, it is not prudent to rely
solely on supplier quality data to determine the performance of critical products. Lot to lot performance
data is not routinely provided by the fabricator or the distribution chain, making it very difficult to
achieve confidence in relying solely on the vendor-supplied quality data.
Product Assurance Testing
An emerging model in the PCB industry is to provide Product Assurance Testing (Individual Lot
Validation) to enhance the reliability of product quality while reducing the risk of a field failure and the
resultant impact on the end user or customer. This model is a natural evolution of the venerable PPAP
(Production Part Approval Process) for the auto industry or the FPAP (First Piece Approval Process) for
general industry. The model allows the higher mix/lower volume consumer of Printed Circuit Boards to
use quality data to predict product performance. This predictive capability has long been the domain of
only the high end users or high volume users of Printed Circuit Boards.
CORRELATION TEST METHOD
A simple mean correlation study was designed to test consistency of hole copper plating cross-sectional data from
an IPC-2221 “B” coupon and its associated printed circuit board (PCB) plated through hole (via). The experimental
test unit (ETU) “B” coupon and associated PCB via hole was set at 10 mils finished, 93 mils thick, with immersion
silver final finish.
Ten PCB fabricators fabricating product equivalent to the ETU were selected. Each fabricator provided a crosssection puck and a quality report stating the product received met IPC-6012C-2010 Class 2 Hole Copper Plating
(Table 3) specification. Five lots were tested from each PCB fabricator; and within each lot three ETUs: coupon and
its associated PCB were randomly selected. Each selected 10 mil “B” coupon and PCB per lot was cross-sectioned
in both the x and y direction. The data tables (fig. 1 and 2) reports mean value by lot for average hole copper
plating and lowest value found by lot for thin area known as minimum (min.).
COUPON (units mils)
IPC Class 2 Specification: AVG. => .787 MIN. => .709
LOT 1
LOT 2
LOT 3
LOT 4
LOT 5
Vendor
AVG.
MIN.
AVG.
MIN.
AVG.
MIN.
AVG.
MIN.
AVG.
MIN.
AVGT
MINT
A
0.85
0.74
0.83
0.67
0.87
0.69
0.88
0.75
0.86
0.74
0.86
0.72
B
0.89
0.77
0.91
0.82
0.89
0.82
0.91
0.79
0.87
0.82
0.89
0.80
C
0.92
0.84
0.89
0.83
0.91
0.81
0.93
0.84
0.92
0.82
0.91
0.83
D
0.84
0.65
0.87
0.72
0.85
0.68
0.86
0.63
0.87
0.75
0.86
0.69
E
0.92
0.82
0.93
0.84
0.91
0.85
0.89
0.79
0.90
0.81
0.91
0.82
F
0.86
0.70
0.89
0.75
0.88
0.73
0.89
0.74
0.88
0.74
0.88
0.73
G
0.90
0.79
0.89
0.72
0.91
0.78
0.88
0.78
0.90
0.83
0.90
0.78
H
0.85
0.72
0.86
0.67
0.86
0.69
0.85
0.68
0.85
0.70
0.85
0.69
I
0.91
0.83
0.89
0.82
0.90
0.81
0.86
0.78
0.87
0.80
0.89
0.81
J
0.87
0.76
0.84
0.66
0.85
0.74
0.87
0.74
0.86
0.73
0.86
0.73
Note 1: Shaded areas represent measurements below IPC Class 2 specification
Figure 1 – 10 mil “B” Coupon
WITHIN BOARD (units mils)
IPC Class 2 Specification: AVG. => .787 MIN. => .709
LOT 1
LOT 2
LOT 3
LOT 4
LOT 5
Vendor
AVG.
MIN.
AVG.
MIN.
AVG.
MIN.
AVG.
MIN.
AVG.
MIN.
AVGT
MINT
A
0.87
0.75
0.82
0.72
0.83
0.67
0.79
0.65
0.8
0.71
0.82
0.70
B
0.87
0.8
0.88
0.78
0.9
0.79
0.88
0.77
0.89
0.78
0.88
0.78
C
0.9
0.83
0.92
0.84
0.89
0.83
0.89
0.81
0.9
0.82
0.90
0.83
D
0.82
0.72
0.78
0.67
0.82
0.74
0.85
0.79
0.79
0.7
0.81
0.72
E
0.93
0.86
0.92
0.85
0.93
0.84
0.91
0.84
0.92
0.83
0.92
0.84
F
0.86
0.72
0.85
0.68
0.87
0.75
0.86
0.74
0.86
0.73
0.86
0.72
G
0.87
0.79
0.90
0.82
0.89
0.80
0.89
0.74
0.93
0.85
0.90
0.80
H
0.78
0.67
0.82
0.68
0.82
0.67
0.84
0.70
0.85
0.69
0.82
0.68
I
0.90
0.84
0.92
0.85
0.92
0.84
0.88
0.80
0.92
0.85
0.91
0.84
J
0.86
0.74
0.81
0.67
0.79
0.65
0.78
0.67
0.80
0.69
0.81
0.68
Note 1: Shaded areas represent measurements below IPC Class 2 specification
Figure 2 – 10 mil PCB via
A statistical T-test was conducted with groups having equal variance under two tails distribution. T-test p-values
for coupon and board via copper plating compared by average and minimum are .28 and .98 respectively. Based
on p-values, both groups checked are mean equivalent. However, five out of ten vendors’ cross-section puck and
quality report data provided did not agree with correlation mean study results. Product quality assurance issues
may exist with these vendors.
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