DEEP ANISOTROPIC ETCHING OF SILICON USING LOW PRESSURE HIGH
DENSITY PLASMA. PRESENTATION OF COMPLEMENTARY TECHNIQUES
AND THEIR APPLICATIONS IN MICROTECHNOLOGY.
Cyrille HIBERT, Willy DUFOUR and Philippe FLÜCKIGER
EPFL - Swiss Federal Institute of Technology – Lausanne
Center of Microtechnology, 1015 Lausanne, Switzerland
Abstract
The flexibility of the new available Inductively Coupled Plasma (ICP) reactors
provides a lot of possibilities for process development in dry etching field. Deep
anisotropic etching of silicon is now possible under control (etch rate, profiles,
uniformity) that offers a lot of possibilities for microsystems development. The
purpose of this presentation is to give an overview of bulk silicon processing
techniques using new ICP etching equipment in the field of microsystems
development.
1. Introduction
As illustrated by Coburn et al.1 the key condition of dry etching is the synergetic effect
between chemistry and physic. This explains the efficiency of advanced etchers, which are
able to generate high densities of ions and reactive species, and to allow the control of ions
energy through the chuck polarization. Deep etching processes of silicon can be separated in
two groups: the pulsed and the non pulsed. Both use fluorine based chemistry to etch silicon
but use different techniques to protect the sidewall from undercut and to provide anisotropic
shape. This paper presents three complementary anisotropic deep Si techniques (Bosch, non
pulsed room temperature and cryogenic processes) set up in a commercially available Alcatel
601E etcher.
2. Presentation of the Alcatel A601E etcher
The used plasma etcher, Alcatel A601E, is a fully automated reactor, which delivers
high process performance and maximum process flexibility. A description of this equipment
is given on figure 1. The plasma is generated by an ICP source and diffuses down to a low
pressure chamber where wafer is processed. Ion energy is independently controlled by a rf
power applied to the chuck. In the present configuration of the A601E etcher in CMI, working
pressure can be adjusted in the range 0.1 to 10 Pa, maximum source power can reach 2 kW
and maximum rf power in the chuck is 300 W. The substrate is mechanically clamped to the
chuck which temperature is controlled using liquid N2 circulation and discrete heating
elements. The temperature can be adjusted in the range -180°C to 50 °C. Heat transfers
between the chuck and the wafer are ensured using a helium pressure controlled film 2. A load
chamber optimizes load/unload operation without breaking vacuum in the process chamber.
An end point detection device based on optical emission spectroscopy allows the monitoring
of transitions between layers during a process. A scrubber gas treatment is used before
releasing the processing gas into the atmosphere.
Figure 1: Schematic view of the Alcatel 601E etcher.
3. Pulsed room temperature process (Bosch process)
The pulsed room temperature process (so named Bosch process3) is a step by step
technique. Si etching (few seconds of SF6 plasma) and sidewall protection (few seconds of
C4F8 plasma) are separated. Steps are visible on the figure 3. This technique provides very
good anisotropy and high etch rate (up to 10 m/min)4. Unfortunately it generates rough walls
and the polymeric layer used for sidewall passivation may be a source of contamination. The
Bosch process selectivity Si/photoresist and Si/SiO2 are respectively in the range 100 to 200
and 200 to 400.
As illustrated on figures 2 to 5 the Bosch process is largely employed in microsystems
fabrication. Figure 2 shows an example of electrostatic actuator built in the bulk Si and
dedicated to microfluidic flow study. The pulsed process is fully exploited in such application
because it provides a very good anisotropy and a high etch rate (about 10 m/min). Figure 3
shows a patch-clamp device. Purpose consists of capturing a living cell in a physiological
solution, and to study the electrical response to externally applied chemicals. The nozzle is a
thermal wet Si dioxide, grown in a Si mould and released using an anisotropic Si dioxide etch
and an isotropic Si etch. The mould was built using two pulsed anisotropic Si etches, one for
the small deep hole and one for the big hole. Figure 4 shows a conical hole through a Si
wafer. This shape is required to minimize the transmission losses of incident light in highspeed microshutter devices5. Such a hole is obtained using alternatively isotropic (pure SF6
plasma) and anisotropic (Bosch process) etching processes. Large varieties of hole shapes can
be created using this technique with a very good uniformity on the wafer. The last example
using the pulsed process is presented on figure 5. It shows a Si dioxide membrane at the
bottom of a hole obtained after a deep Si etching through a wafer. Membrane is smooth and
not destroyed. An underetching of few m (notching) is visible, but usually it doesn't affect
this kind of devices. Notching can be limited with decreasing the overetch time.
100 m
300 m
4 inches in diameter, Si load 2 % ,
30 mn, 10 um/min
Figure 2: Cross section of a Micro-actuator
in bulk silicon (SEM picture),
Ch. Edouard from LPMO, Besançon, F.
http://imfc.univ-fcomte.fr/lpmo/
Figure 3: Cross section of a Si dioxide
micro nozzle built in bulk silicon (SEM
picture), T. Lehnert and M.A.M. Gijs from
EPFL-IMS, Lausanne, CH.
Figure 4: Cross section of a conical hole
through the wafer in bulk Si (SEM
picture), Microshutters project5
Colibrys S.A., Neuchâtel, CH.
Figure 5: Cross section of a Si dioxide
membrane at the bottom of a hole through
a Si wafer (SEM picture-CMI test).
4. Non pulsed room temperature process
The non pulsed room temperature technique uses a SF6/C4F8 gas mixture. It is a
compromise between the Bosch process and the cryogenic process presented in the following
part. It works at room temperature, generates smooth walls with no bowing and no undercut.
Etch rate is in the range of 1 to 2 m/min depending on the Si load. A polymeric layer is
formed to protect sidewalls which is not bombarded by energetic ions, and at the same time
synergetic effect between ions and fluorine atoms etch bottom of features. Figure 6 illustrates
one application of this technique, where a thick polysilicon layer has been patterned. This
application needs anisotropic shape and no undercutting, to provide good mechanical
properties of the actuated polysilicon parts. Figure 7 shows an optical waveguide built in bulk
Si using SOI wafer6. The non pulsed process is particularly adapted for this application
because (1) the etch depth (4 m) must be controlled with an accuracy of 0.1 m and (2)
anisotropic and smooth sidewalls are required.
Figure 6: Anisotropic etching of
polysilicon structures (SEM picture),
Microshutters project5,
Colibrys S.A., Neuchâtel, CH.
Figure 7: Anisotropic etching of Si
waveguide (SEM picture),
Optosimox project6, P. Dainesi and Ph. Robert
DE/MET-EPFL, CH.
5. Cryogenic process
The cryogenic method7,8 consists of cooling the wafer to about – 100 °C to reduce
lateral etching of sidewalls by spontaneous chemical etching. To enhance anisotropy a
passivating gas such as oxygen is commonly used. A SiOxFy film formation on the sidewalls
contributes to obtain anisotropic profiles. Although this technique is free of polymers and
provides a high selectivity Si/SiO2 (more than 800), it has some main drawbacks: (1) oxide
mask is needed, (2) it is a very sensitive process (memory effect of the reactor) and (3) it is
very difficult to get rid of undercut and bowing effects. Figure 8 shows some deep etching of
trenches in Si for different widths. Microloading effect is well illustrated on this picture. Till
now this process has few applications in CMI, but is still under development.
Figure 8: Anisotropic etching of Si using cryogenic
technique (SEM picture-CMI test).
6. Conclusion
The evolution of deep dry Si etching processes is permanent. Three kind of
complementary processes are presented in this paper. Examples of microsystems are given to
illustrate their advantages and drawbacks. In the future our target is to improve etch rate
(more than 10 m/min for the Bosch process) and to reach high aspect ratio. New
developments in this way are scheduled and some recent publications4,9 show that our goals
are realistic.
Acknowledgments
We would like to thank users of our Center of Microtechnology (CMI) at the Swiss
Federal Institute of Technology-Lausanne (EPFL) for their collaboration.
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