ECE 507 Seminar (Winter 2014)
3.15-4.15pm Friday, February 21st, SB1Room 107
Note change of time and place!
Adding New Capabilities to Silicon CMOS Via
Determinsitic Assembly.
Joint seminar with the Department of Chemistry
Theresa S. Mayer
Electrical Engineering and Materials Sci & Eng,
Penn State University, University Park, PA 16802
Abstract
The recent International Technology Roadmap for Semiconductors highlighted not
only the need to continue Si CMOS miniaturization, but also the growing
importance of expanding its capabilities by integrating new materials and devices
with the Si circuitry. Attractive materials include narrow bandgap semiconductors
that operate at lower supply voltages, giving lower power consumption without
sacrificing speed. Molecular and metal oxide materials, which can produce a large
electronic response to chemical vapors or biological molecules, offer sensing
capabilities. Unfortunately, the high temperatures and harsh chemicals used in
conventional fabrication processes generally damage these materials or the Si
circuitry, which up to now has made it difficult to effectively couple them.
This talk will describe a programmed deterministic assembly method that offers a
route to address this challenge by decoupling off-chip materials synthesis from onchip device integration. The technique begins by fabricating > 108 nearly identical
nanometer-sized parts –sheets, wires, or spheres of a desired material– under
optimal conditions, and suspending them in a fluid. Different populations of these
components are then delivered, one by one, to a fully processed Si CMOS chip. A
programmable AC voltage that is applied to the topmost metal level of the Si chip
directs individual parts to a specific region of the chip, and then positions them
with the submicron accuracy needed to connect a part to a specific feature on the
chip. Assembly follows seconds after delivery, and component densities can
exceed 106/cm2. Conventional top-down fabrication is then used to convert the
assembled parts into functional devices and circuits. Several material and device
integration examples will be discussed, including the assembly of bio-probe coated
nanowire resonator arrays, Si and III-V nanowire FETs, and monolayer 2D
transition metal dichalcogenide (TMD) crystal materials.
Biography
Theresa S. Mayer received the B.S. degree in Electrical Engineering from Virginia
Tech in 1988, and the M.S. and Ph.D. degrees in Electrical Engineering from
Purdue University in 1989 and 1993. In 1994, she joined Penn State University,
where she is a Distinguished Professor of Electrical Engineering and Materials
Science and Engineering. She serves as the Co-Director of the Penn State
Nanofabrication Laboratory and the Director of the Penn State Site of the NSF
National Nanotechnology Infrastructure Network. Dr. Mayer’s research at the
interface of device physics, integrated circuits, and materials chemistry has
included pioneering contributions in hierarchical directed assembly, molecularscale transport, and nanowire electronics. Working jointly with colleagues in
chemistry, her group was the first to show that electric-field forces could be used to
direct the assembly of different types of bioprobe-coated nanowires into dense
arrays containing several thousand individual nanowire sensors each with
submicron registration to features on a silicon chip. Her group is currently using
these hybrid integration methods to add new electronic, optoelectronic, and sensing
functions to silicon integrated circuits. Dr. Mayer was a Kodak Fellow (19901993) and the recipient of a NSF CAREER Award (1995), and the Penn State
Engineering Society Outstanding Teaching and Research Awards (2000, 2009).
She served as the General Chair of the IEEE Device Research Conference and the
Chair of the Gordon Research Conference on the Chemistry and Physics of
Nanostructure Fabrication in 2006. She holds 8 U.S. Patents and is the author or
co-author of over 170 refereed publications.
All welcome