Post-Foundry Integration of Nano-Film Capacitors on Integrated Circuits
Frankie Reed
Office of Science, Science Undergraduate Laboratory Internship (SULI)
University of Michigan
SLAC National Accelerator Laboratory
Menlo Park, CA
13 August 2012
Prepared in partial fulfillment of the requirements of the Office of Science, Department of
Energy's Science Undergraduate Laboratory Internship under the direction of Chris Kenney
at the Particle Physics and Astrophysics (PPA) Division of SLAC National Accelerator
Laboratory.
Participant:
_
Signature
1
Intro
The Linac Coherent Light Source (LCLS) captures x-ray images of small objects through
pulses of x-ray light emitted from particles. The cameras that are used to capture these images
contain sensors that capture the particles, from the diffracted lines emitted from the beam, and
transform them into a signal so a picture can be formed. This is mainly done through a
capacitor in the circuit. The charge that is caught by the sensor gets forced into the capacitor
and then converted into a signal. The issue with the old capacitors was that they were too
small. Since they were too small the capacitors transformed the charged particle into a large
voltage that couldn’t be read. With large voltages the saturation level of the operation
amplifier used would be exceeded and also other instruments in the tool my fry which would
ultimately produce a poor image. In essence the bigger the capacitor is the smaller the output
voltage will be. With smaller voltages the systems control will improve and give off more
precise images of the sample or anything being imaged. My project is to create nano-film
capacitors that will have a bigger capacitance then the previous capacitors used. By creating
capacitors with nano-film dielectric I can decrease the amount of space between each
conducting plate which will increase the capacitance. Creating numerous nano-film capacitors
and stacking them in parallel will produce an even larger capacitance.
Figure 1: Sample Circuit
This is a sample circuit similar to the actual circuit being placed in the camera.
The particle (yellow), rather proton or electron, will go through the sensor and
be forced into the capacitor (The Op-Amp draws approximately 0 current).
The particles usually captured have a charge of around 3.5pC. With this and the known saturation
voltage of the capacitor you can calculate the capacitance needed to stay below saturation with the
equation:
𝑉=
𝑄
𝐶
Voltage is equal to the charge of a particle divided by the capacitance of a capacitor.
If the saturation of the Op-Amp is 5 volts one can calculate the capacitance for 1.5 volts. This
capacitance is 2.3 pF.
(1)
2
Methods
2.1 Measuring
The capacitor(s) I will be fabricating are 100X100 μm2. The first conducting plate of the capacitor will
consist of 50 angstroms of Titanium (Ti) and 200 angstroms of Gold (Au). The dielectric will be made of
100 angstroms of Aluminum Oxide (Al2O3) and 100 angstroms of Hafnium Oxide (Hf2O3). The final
conducting plate will be made of 4000 angstroms of Aluminum (Al).
+++++++++++++++++
Al2O3
Hf2O3
d=200 Å
----------------------Figure 2: Nano-Film Capacitor
Since we have two dielectrics we calculate the capacitance for two capacitors in series.
𝑘𝜀0 𝐴
𝐶=
(2)
𝑑
Capacitance Equation: k= Relative Permittivity. ɛ0= 8.854E-12 F/m = Permittivity of space. A=
Area of plates. d = distance between plates (200 A).
𝐶1 =
Capacitor in Series
𝑘1 𝜀0 𝐴
1
𝐶𝑇𝑜𝑡𝑎𝑙
1
𝐶𝑇𝑜𝑡𝑎𝑙
Simplified
𝑘 2 𝜀0 𝐴
𝐶2 =
𝑑
2
=
=
1
+
𝐶1
𝑑
2𝑘1 𝜀0 𝐴
𝐶𝑇𝑜𝑡𝑎𝑙 =
2𝜀0 𝐴
𝑑
(3,4)
𝑑
2
1
𝐶2
+
𝑑
2𝑘2 𝜀0 𝐴
(
𝑘1 𝑘2
𝑘1 +𝑘
)
2
Total Capacitance for capacitor with two dielectrics stacked on each other.
Relative Permittivity
k1= Alumina Al2O3
9.3 – 11.5
≈10
k2= Hafnia Hf2O
25
(5)
Table 1: Relative permittivity of dielectrics used. (Dielectric constants)
Constants
K=
𝑘1 𝑘2
𝑘1 +𝑘2
d= 200 Å
=7.1
(5.1)
= 2E-8 m
ɛ0= 8.854E-12 F/m
A= 10000 μm2 = 1E-8 m2
𝐶=
𝐶=
2𝐾𝜀0 𝐴
𝑑
2(7.1)(8.854𝐸 − 12)(1𝐸 − 8 )
2𝐸 − 8
𝐶 = 63 𝑝𝐹
Figure 3: Nano-Film Capacitor bird view
(Virtual drawing/photo mask) In figure 3 the
capacitor is shown how it will look on the wafer.
Where the two rectangles cross is the capacitor.
(5)
(6)
With an expected capacitance of 63.24pF a capacitor could hold a charge of 309nC taking that 4.9 V is
the saturation level of the Op-Amp. This capacitance is an under estimate because it isn’t taking into
account the fringing effect of the capacitor.
2.2 Processing and Equipment
This section describes the process and the equipment used to fabricate the nano-film capacitor.
i.
Wet Benches
The wet benches are used to clean off the wafers used to make the nano-film capacitors. They are
similar to bath tubs but with much more dangerous chemicals. There are two main wet benches
that I will be using, the wet bench nonmetal and the wet bench diffusion. The first step, after
retrieving wafers, is to scribe each wafer with a name. After scribing one would place the wafers in
the wet bench nonmetal to be cleaned.

Wet Bench Nonmetal is a semi-automated wet etch bench. It is used for stripping
photoresist, removing scribe dust and wet oxide etching. Only wafers without metal can
go in this wet bench. The chemicals used at this bench are 50:1 concentrated
hydrofluoric acid (containing 2% hydrofluoric acid, HF, and the rest water). 20:1
Buffered Oxide Etchants (BOE), which control oxide etch rates. 20:1 BOE is
approximately 38% ammonium fluoride (NH4F), 2.5% HF, and 60% water. The bench
also contains 6:1 BOE, which is approximately 34% NH4F, 7% HF, and 59% water.
Hydrofluoric acid is one of the most dangerous chemicals used because it eats/burns
calcium. If one were to get HF used in the lab on their self, he or she most likely will
not feel anything but it will slowly eat away his or her bones if not cleaned off.
After cleaning at the wet bench nonmetal you would place the wafers in the wet bench diffusion for
preparation for the tylan oven.

Wet Bench Diffusion is a bench similar to the wet bench nonmetals. One main
difference is that wafers with photoresist are not allowed. This bench cleans of any
trace of organics and metal ions. It also performs oxide etching. Wafers with metal on
them also can’t be processed here. This process is a final clean before high
temperature processing. This bench has most of the same HF based chemicals except
for 20:1 BOE. The bench also contains 5:1:1 H2O:H2O2:NH4OH for removal of trace
organics, and 5:1:1 H2O:H2O2:HCl for removal of trace metal ions.
ii.
Tylan Oxidation and Annealing Furnaces
These furnaces are made of quartz and they mix gases Nitrogen, Argonne, Oxygen, and Hydrogen to
grow Silicon Dioxide on the silicon wafers. The amount of oxide applied on the wafer is important
for the strength of the wafer. Approximately 4000 angstroms of oxide is placed on each wafer.
One would clean the wafers in the wet bench nonmetal after placing oxide on them.
iii.
Silicon Valley Group (SVG) Coat Tracks 1&2
After cleaning, photoresist would have to be coated on to the wafers. SVG Coater machines do the
job of spraying adhesive and photoresist onto the wafers. 1 micron coating of SPR3612 photoresist
is placed onto the wafers.
iv.
KarlSuss Aligner
After obtaining the nano film capacitor’s mask, which is the layout of the capacitor, the wafer must
be aligned to the mask. Then you must expose the photoresist to near-UV light. These tasks are all
performed by the KarlSuss Aligner.
v.
Silicon Valley Group (SVG) Developer
Each wafer, after being exposed, must then be develop and post-baked. The SVG Developer has a
spin station, which dispenses and rinses away developer, and a oven station for post-bake. The last
three methods are similar to getting a camera photo developed.
vi.
Innotec
The next step after developing is depositing the metals Titanium and Gold for the first conducting
plate.
This is done in the Innotec by an E-beam which evaporates metals into thin films on your wafer. You
can have up to 1 micron in thickness on this machine. The wafers will have 50 angstroms of
Titanium and 200 angstroms of Gold.
After placing the metals on the wafer you must soak the wafers in Acetone overnight. This is to
loosen the photoresist and lift off some of the unwanted pattern.
vii.
Ultrasonic Liftoff
This machine vibrates water at high speeds to help the left over photoresist on the wafers come off.
After soaking in Acetone overnight you must lift the rest of the photoresist off leaving only the
desired pattern for the first plate of the capacitor. This can be done at the wet bench for solvents.
viii.
Fiji Atomic Layer Deposition (ALD)
Once cleaning is done the next step is to deposit the dielectric on to the wafers. This is done by the
Fiji machine. The wafers will consist of two dielectric layers. One made of Aluminum Oxide (Alumina
Al2O3) and the other made of Hafnium Oxide (Hafnia Hf2O3). Fiji takes chemical gasses and deposits
it at the substrate i.e. silicon wafer. Gas by gas, chemical reactions occur to form new layers of
metal or dielectric. For instance blasting Trimethyl Aluminum (Al(CH3)3) at the Silicon (Si-O-H) which
will produce some methane, then blasting water on the plate will eventually form a layer of
Aluminum Oxide (Al2O3) on the wafer. I will be growing 100 Angstroms of Al2O3 and Hf2O3 each.
Next you must use the SVG coater, KarlSuss aligner, and SVG developer to place the next layout of
the capacitor (the pad etch) on the wafers with photoresist.
ix.
Drytek4
After placing the photoresist on the wafers you must etch the dielectric away from the pad. This is
done by using the Drytek4 machine. This machine is a plasma etcher that uses chlorine and fluorine
based chemistry for etching.
After etching the pad you would place your last layout onto the wafer with photoresist using the
designated machines described previously. Then you would deposit 4000 Angstroms of Aluminum
onto the wafers using Innotec. Next you would etch the photoresist away at the wet bench general
leaving your last conducting plate. Then clean the wafers and make measurements of capacitance
for capacitors.
2.3 Actual Process
The first step in the process of making a nano-film capacitor is to obtain seven 4 inch wafers.
Once obtained, I scribed names into each wafer naming it “Capacitor #1” to “Capacitor #7”. Then I
continued to the wet bench nonmetal and wet bench diffusion for cleaning. After cleaned in wet bench
diffusion I placed the wafers in the Tylan oven in order to grow 4000 angstroms of oxide on them. The
oxide is used to strengthen the wafer. Once oxide was grown on each wafer I cleaned them in the wet
bench nonmetal once more. The next step was placing the wafers in the YES oven to be prebaked
before the adhesion of photoresist. After that I applied 1 micron of photoresist named SPR3612 onto
the wafers. Then I placed one wafer into the KarlSuss aligner and exposed the design of the bottom
metal of the capacitors onto that wafer. I proceeded to develop the exposed wafer on the SVG
developer to check if the process was done correctly. Once developed, I inspected the wafer without a
microscope and the wafer appeared to have a great design so I continued the process of exposing and
developing the remaining 6 wafers. Once the image was on the wafers I transferred them into the
Innotec and deposited 50 angstroms of Titanium and 200 angstroms of Gold onto the wafers. Then I
soaked the wafers in acetone overnight. Once soaked my mentor, Chris Kenney, assisted me in using
the Ultra Sonic Lift off machine to get rid of the rest of the access gold and titanium. Once the image of
the bottom metal layer of the capacitors was revealed on the wafer, my mentor and I expected the
wafers under a microscope. The edges of each capacitor appeared to be blobs and not well defined
(figure 4). The wrong placement of the photo mask into the KarlSuss exposure machine was the
problem. (The photo mask is similar to a drawing stencil. When the stencil is placed on paper and
drawn over, the places where the stencil has holes are seen on the paper. When light shines through
the photo mask only the transparent region of the mask shows up on the wafer.) Since the mask was
placed in the machine wrong the light refracted through the mask (which produces the image) came out
blurred under microscopic levels. From this point I started over with 5 new wafers and placed the photo
mask in correctly to expose them. I inspected one of the exposed wafers under a microscope and the
image was well defined (figure 5). After being developed I continued to Innotec to deposit the 50
angstroms of Titanium and 200 angstroms of Gold once more. Then soak and acetone overnight and
perform an Ultra Sonic Liftoff once more. I then placed 3 wafers into the Fiji machine to deposit 100
angstroms of hafnia onto them. The other 2 wafers I deposited 100 angstroms of alumina onto them.
The initial plan to deposit both dielectrics on the same wafers changed to depositing them on separate
wafers. This will provide more variety to stacking the capacitors or putting them in series. The same
results calculated above can be produced by putting two of different dielectric capacitors in series.
There are a total of 400 square capacitors on the wafers (figure 6).
Figure 4: shows the blured image that was placed on the
wafers. This oddly shaped bottom layer of capacitor may work
but the calculation of capacitance would be difficult.
Figure 6: This shows the wafer how it looks to the human eye
without a microscope top left. A closer image top right. 10 by
10 square capacitors on the right. There are 4 sets of these on
the wafer.
Figure 5: shows the sharp image that was placed on the new
wafers. This is exactly what is expected.
Results and Conclusion
So far results are inconclusive. When the capacitors are fully fabricated one would measure the
capacitance of the capacitors to compare the actual capacitance to the calculated capacitance and
record their difference. With the right measurements and sizes of the first metal plate and dielectric
placed on the wafers the capacitors, once finished, seem promising to accomplish the needs of the
sensors at LCLS.