Sample & Hold
Measurement system often can’t keep pace with changing input signal
particularly where a conversion into a digital signal is being made.
Instead of continuously tracking the analogue signal it is sampled at a
specified time interval, the sampled value being held until the next
sample is taken. In this way the following circuit has time to complete its
processing. A circuit that performs this task is called a Sample and Hold.
Sample & Hold
The simple capacitor and switch illustrates the principle; close the switch to
sample, open it to hold.
Real sample & hold uses an electronic switch (FET) and the capacitor must be
buffered or the following circuit will discharge it.
To respond fast enough to store the input the capacitor must be small, so its
storage time will be limited.
Again Op Amps can be used to achieve adequate performance.
Sample & Hold
The switch (an FET) and
capacitor are surrounded by
OP Amp circuitry to buffer the
input and output and to enable
the switching to be done by an
ordinary logic signal.
Sample & Hold
Semiconductor manufacturers produce sample
and hold ICs with superior specification.
A typical device is the National Semiconductor
LM398, an 8 pin IC that uses a single external
capacitor, 1-100nF, to hold for 1-1000 µs,
sampling being controlled by a standard logic
signal. It operates from a wide range of power
supplies, is low noise, fast capture, and has a
unity gain accurate to 0.002%
Sample & Hold
Typical integrated Sample & Hold IC