CASCADED AMPLIFIERS
Acquire more gain!
Bandwidth shrinkage
Check the 3dB-BW for the cascaded systems: first order TF, BW is not linear as GBW
Best number of stages
Assume constant GBW = omegaT
Check overall BW and try to maximize it
GAIN-BANDWIDTH PRODUCT
Trade-off between BW and delay
High BW and gain is possible but one pays for a huge delay
Traveling-wave amplifier basics
Gain increases linearly with n
CHAPTER 7:
NOISE IN AMPLIFIERS
Fundamental noise sources and manmade noise sources or interference
STATISTICAL PROPERTIES OF NOISE
Random signal, Gaussian distribution
Noise power spectral density (PSD function)
Combining noise sources
Add up by mean square definition
v2 = v12 + v22 + 2 v1*v2 last term: correlation
PHYSICAL SOURCES OF NOISE
Thermal noise
White till one THz
Available noise power =
Shot noise
Charge carriers hop over the potential barrier at random times, also white noise
In diodes, BJT, DC gate leakage…
Flicker noise (pink noise)
1/f noise spectra, PSD increasing down to mHz
Noise can be up converted to higher frequencies, causes modulation
Popcorn noise
Burst noise, switches randomly between 2 or more discrete values >10µs, non Gaussian.
FC is the corner frequency, above noise flattens out
Main noise sources in a bipolar transistor
Thermal noise from base
spreading resistor vB
Shot noise from collector
current iC
Shot noise from base current iB
When necessary: 1/f sources
Noise sources in a MOS transistor
Drain current noise is
thermal (resistive channel)
and flicker noise (charge
trapping at interfaces)
Gate current noise is shot noise
(DC gate leakage) and channel
Induces gate noise (long channel)
Is a thermally fluctuating channel voltage, coupled capacitively at the gate
Blue noise (only at HF)
CIRCUIT REPRESENTATION OF NOISE
Input referred noise sources
One can transfer noise sources in a circuit
to only two noise sources at the input
How to calculate them?
Voltage noise
 Short the input of the noiseless linear two-port circuit, so that the input-referred
voltage noise source forces the voltage at the terminals of the current noise source
 Calculate rms output noise voltage (solely from the input noise voltage)
 Calculate the output noise of the noise network, these two should be equal
Current noise
 Open the input of the noiseless linear two-port circuit
 Calculate the output noise of the noiseless and noise circuit and equate them
BJT vs. MOS transistor
ZL high: MOS has a better noise performance for sufficiently low frequencies
ZL low: Bipolar transistor, larger transconductance
LINEAR CIRCUITS AND NOISE
SNR & Noise Factor (NF), Noise figure is NF in dB
Equivalent noise temperature TE
No noise adding => amplifier at zero Kelvin
Measured by the Y-factor method
Y = ratio of the two output noise powers
in function of the temperature
Pi = GkTiB + GkTEB
Noise figure of a noisy two-port circuit
Connect a signal source (vIN, RS)
Alpha is the voltage gain to P
Spot NF = NF at a 1Hz band
NF of cascaded circuits
CHAPTER 8:
POWER AMPLIFIERS
Class A and B are linear, C is not linear, D, E, F, G, H and S are not linear, with high eff.
Power efficiency eta, in %, ratio of RF output power top DC power
Normalized output power PMAX, maximum RF output power achieved by an ideal PA
with 1V and 1A peak collector emitter power (high PMAX means cheap semiconductor)
Always start with neglecting voltage drops over transistors
LINEAR POWER AMPLIFIERS
Class A PA
Use the BJT always in the forward region so iC > zero
So each transistor conducts all the time
RFC = RF choke, blocks RF, passes DC
Has bad efficiency (max 50%)
Class B PA centre tapped transformers (CT)
Pushpull configuration, each transistor
Conducts during 180°
Phase inversion by CT transformer
Limitations
BJT
 Make sure VCE does not go
Below VSAT (hard clipping)
At higher frequencies VSAT
Increases
MOSTFET
 Finite on-resistance
For class A RON is twice as big
Reactive load: R0 in shunt with jB
 An extra rho loss
TUNED CLASS C POWER AMPLIFIERS
Evolved from class B, with better efficiency
Highly non linear
Current source as class C amplifier
Current source: so vacuum tube , (FET)MOS okay, BJT  (=> mixed mode PA)
Topology that can operate in class A, B or C by proper biasing
Negative virtual bias current => so less than 180° conduction (=2*y)
Fundamental component of ID that flows through the load = VOM*sin(2pif0)
Class A: y = 180°
Class AB: y = 90..180°
Class B: y = 90°
Class C amplifier with saturation
Operation with strong device signal, the output
Voltage will saturate during part of the cycle
FET VD saturates when VD = IDRON
HIGH EFFICIENCY POWER AMPLIFIERS
Main power dissipation reduction: Reduce average of the power (VCE x IC)
 Switched mode PA’s (D, S): active component used a switch (needs to be fast)
 Other PA’s (F, G, H): special circuits
Class D amplifier: The push-pull voltage-switched class D amplifier
VC2 is a square wave => s(theta) = -1 of +1
Only the 1st order sine wave will get trough
Class D amplifier: The voltage-switched class D amplifier with
transformers
One can also use the class B schematic: adapt the
impedance level
The output transformer is a square wave, only
fundamental term is passed