Test Plan - Rev 1

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Document Revision No.: 2
Revised: 02/06/16
RIT KGCOE MSD Program
P11252 Top Cat
Test Plans & Test Results
Table of contents
1.
MSD I: WKS 8-10 PRELIMINARY TEST PLAN – “WHAT” ....................... 2
1.1. Sub-Systems/ Functions/ Features ................................................................................................ 2
1.2. Speaker Design ............................................................................................................................... 3
1.3. DAC Design ..................................................................................................................................... 3
1.4. Hardware Design ............................................................................................................................ 3
1.5. MSP430 Code.................................................................................................................................. 4
1.6. RF Register Configuration ............................................................................................................ 4
2.
MSD II WKS 2-3 TEST PLAN – “HOW, WHO, WHEN” ............................. 5
2.1. Speaker Design ............................................................................................................................... 5
2.2. DAC Design ..................................................................................................................................... 5
2.3. Hardware Design ............................................................................................................................ 5
2.4. MSP430 Code.................................................................................................................................. 5
2.5. RF Register Configuration ............................................................................................................ 6
2.6. Combine Code................................................................................................................................. 6
3.
MSD II – WKS 3-10 DESIGN VERIFICATION ............................................. 7
3.1. Logistics ........................................................................................................................................... 7
3.2. Analysis of Data – Design Summary ............................................................................................. 7
3.3. Conclusion or Design Summary .................................................................................................... 7
RIT KGCOE MSD Program
Page 1
Document Revision No.: 2
Revised: 02/06/16
RIT KGCOE MSD Program
P11252 Top Cat
Preliminary Test Plan
1. MSD I: WKS 8-10 PRELIMINARY TEST PLAN – “WHAT”
Sub-Systems/ Functions/ Features
Major Sub-Systems/ Features/ Function
1: Speaker Design
2: DAC Design
3: Hardware Design
4: MSP430 Code
5: Software Algorithm
6: PCB Layout - Time Permitting
7: Populating PCB - Time Permitting
RIT KGCOE MSD Program
Page 2
Document Revision No.: 2
Revised: 02/06/16
RIT KGCOE MSD Program
Speaker Design
Subsystem/ Function/ Feature Name:
Speaker Design
Date Completed:
Performed By: Duncan
Tested By: Duncan
Engr.
Spec. #
Specification (description)
Unit of
Measure
Marginal
Value
ES4
Audible Range
Hz
1000
ES8
Max Volume
dB
70
dB
60
Marginal
Value
ES9
Min Volume
Comments/Status
1KHz Sine Wave
Measurement Distance of 30
cm
Measurement Distance of 30
cm
DAC Design
Subsystem/ Function/ Feature Name:
DAC Design
Date Completed:
Performed By: Duncan/Alex
Tested By: Duncan/Alex
Engr.
Spec. #
Specification (description)
Unit of
Measure
ES5
ES7
ES13
Safe Stimulus
Sound Pattern
Annoyance Level for Cats
Binary
Binary
Binary
Comments/Status
Series of bits
Series of bits
Hardware Design
Subsystem/ Function/ Feature Name:
Hardware Design
Date Completed:
Performed By: All
Tested By: All
Engr.
Spec. #
Specification (description)
Unit of
Measure
Marginal
Value
ES2
ES3
Range of Device
Battery Life Cycle
Feet
w/hour
5'-25'
TBD
ES10
On/Off Switch
ES12
RIT KGCOE MSD Program
Indicator
Comments/Status
Antenna Design
Binary
LED toggles during RF
transmission
Binary
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Document Revision No.: 2
Revised: 02/06/16
RIT KGCOE MSD Program
MSP430 Code
Subsystem/ Function/ Feature Name:
MSP430 Code
Date Completed:
Performed By: Obi & Duncan
Tested By: All
Engr.
Spec. #
Specification (description)
Unit of
Measure
ES14
Stimulus occurrence will increase
Binary
ES15
Battery Life Cycle
Binary
Maintain proper function in
Low Power Modes
Binary
Automatic shutoff
Binary
Configure appropriate ports
ES16
Prevents Misfires
ES12
Indicator
Marginal
Value
Comments/Status
Software Algorithm
Subsystem/ Function/ Feature Name:
C Code
Date Completed:
Performed By: Obi
Tested By: All
Engr.
Spec. #
Specification (description)
Unit of
Measure
Marginal
Value
ES2
Range of Device
Feet
5'-25'
ES17
Alert when cats start fighting
ES14
Stimulus occurrence will increase
ES16
Prevents Misfires
ES12
RIT KGCOE MSD Program
Indicator
Comments/Status
Appropriate RF indicator is
used (RSSI, BER, etc)
Output audio when proximity
threshold is reached
Binary
Binary
Automatic reset
Binary
Toggle LED during RF
transmission
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Document Revision No.: 2
Revised: 02/06/16
RIT KGCOE MSD Program
2. MSD II WKS 2-3 TEST PLAN – “HOW, WHO, WHEN”
Speaker Design
2.1.1. Test
Set the speaker 30 cm from the input of the SPL meter and verify that the audio level is in
the acceptable 60-70 dB range using a 1kHz Sine wave as the test input. Next disconnect
the speaker and place the output into an oscilloscope to verify the frequency.
2.1.2. Who
Duncan will run this test.
2.1.3. When
This test needs to be complete before the DAC can be tested. 3-18-11
DAC Design
2.1.4. Test
With the speaker working correctly the next step is to use the development board to output a
series of bits to the DAC test board. The test will be a simple binary test to verify that the
previous test (speaker test) can be run on the DAC.
2.1.5. Who
Duncan and Alex will run this test.
2.1.6. When
This test is used as an indicator for testing the software. 3-25-11
Hardware Design
2.1.7. Test
This test is not required for the proof of concept of our design. Parts of the pencil and paper
design will be tested in the speaker and DAC tests. The full hardware design can only be
tested if a PCB board is made.
2.1.8. Who
All of us will run this test.
2.1.9. When
Time permitting. 4-29-11
MSP430 Code
2.1.10.
Test
Code can be verified separate of the RF by writing a simple test procedure to output on an
LED. The tests must check to make sure the device automatic shutoff function is working
correctly. The test must also verify that the register values are change. This can be
accomplished by using TI's debugging software to move one instruction at a time.
2.1.11.
Who
All of us will run this test.
2.1.12.
RIT KGCOE MSD Program
When
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Document Revision No.: 2
Revised: 02/06/16
RIT KGCOE MSD Program
This is the bulk of the project and will be combined with the RF register configuration.
Should be done by 3-17-11 but has built in debug time.
RF Register Configuration
2.1.13.
Test
The setup of the RF Registers will be a binary test to make sure that the boards can send a
message from one dev board and read into another. The indicator will be used to verify that
a message was successfully received. A spectrum analyzer can also be used to verify that
the transmit is working.
2.1.14.
Who
Obi will run this test.
2.1.15.
When
This is another big part of the project and will be combined with the MSP430 code. Should
be done by 3-17-11 but has built in debug time.
Combine Code
2.1.16.
Test
After both sides of the code are working the code needs to be put together. The same
method as testing the MSP430 code applies to this test.
2.1.17.
Who
All of us will run this test.
2.1.18.
When
This is the proof of concept of our project. Should be done by 4-6-11 but has built in debug
time.
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Document Revision No.: 2
Revised: 02/06/16
RIT KGCOE MSD Program
3. MSD II – WKS 3-10 DESIGN VERIFICATION
Logistics
Where are the test results being performed, logged (i.e. project notebook) and documented (i.e.
excel spreadsheet)? EDGE team website structure (i.e. document names, file types, and header
location).
Analysis of Data – Design Summary
Conclusion or Design Summary
Can you explain why a particular function doesn’t work? Conclusions are reported or summarized
(i.e. significance with confidence, pass/fail, etc.) as applicable.
3.1.1. Lab Demo with your Guide and Faculty Consultants
Perform each of the specifications and features.
3.1.2. Meeting with Sponsor
See Customer Acceptance above. Field Demonstration. Deliver the project.
Demonstrate to the Sponsor. Customer needs met / not met.
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