SEMI DRAFT Document 4442
SPECIFICATION FOR 450 mm DIAMETER MECHANICAL
HANDLING POLISHED WAFER
1 Purpose
1.1 This document specifies 450 mm diameter mechanical handling wafers intended for use in research,
development and early design investigation of 450 mm semiconductor equipment such as 450 mm wafers,
carriers, load ports, AMHS, and robotics.
2 Scope
2.1 This specification covers dimensional requirements for 450 mm diameter polished silicon wafers. This
specification is intended to address a short-term need for handling wafers. It is not intended to specify
wafers used in process development or for technology-specific circuit-quality applications. This document
should be superseded by a process development wafer specification, a prime wafer specification and
technology-specific guidelines for circuit-quality wafers.
2.2 A complete purchase specification may require that additional physical properties be specified along
with test methods for determining their magnitude (see Section 5).
2.3 Wafers meeting the basic specification requirements herein are suitable for use as “mechanical
handling” wafers for equipment set-up and robotic handling applications.
2.4 For referee purposes, SI (System International, commonly called metric) units shall be used.
NOTICE: This standard does not purport to address safety issues, if any, associated with its use. It is the
responsibility of the users of this standard to establish appropriate safety and health practices and determine
the applicability of regulatory or other limitations prior to use.
3 Referenced Documents
3.1 SEMI Standards
SEMI M1 — Specifications for Polished Monocrystalline Silicon Wafers
SEMI M20 — Specification for a Establishing a Wafer Coordinate System
SEMI M59 — Terminology for Silicon Technology
SEMI MF533 — Test Method for Thickness and Thickness Variation of Silicon Slices
SEMI MF928 — Test Methods for Edge Contour of Silicon Wafers
SEMI MF1152 — Test Method for Dimensions of Notches on Silicon Wafers
SEMI MF1390 — Test Method for Measuring Warp on Silicon Wafers by Automated Noncontact
Scanning
SEMI MF1451 — Test Method for Measuring Sori on Silicon Wafers by Automated Noncontact Scanning
SEMI MF1530 — Test Method for Measuring Flatness, Thickness, and Thickness Variation on Silicon
Wafers by Automated Noncontact Scanning
SSEMI T3 — Specification for Wafer Box Labels
3.2 ASTM Standard1
E 122 — Practice for Choice of Sample Size to Estimate Average Quality of a Lot or Process
3.3 DIN Standards2
1
Annual Book of ASTM Standards, Volume 14.02, published annually by the American Society for Testing and Materials, 100 Barr
Harbor Drive, West Conshohoken, PA 19428-2959.
2
Deutsches Institut für Normung, e.v.; German editions available from Beuth Verlag GmbH, Burggrafenstraße 4-10, D-1000
Berlin 30, Germany. English translations included in Reference 1.
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50441/1 — Determination of the Geometric Dimensions of Semiconductor Slices: Measurement of
Thickness
50441/2 — Determination of the Geometric Dimensions of Semiconductor Slices; Testing of Edge
Rounding
50441/4 — Determination of the Geometric Dimensions of Semiconductor Slices: Diameter and Flat Depth
of Slices
3.4 JIS Standards3
H 0611 — Methods of Measurement of Thickness, Taper and Bow for Silicon Wafers
H 0614 — Visual Inspection for Silicon Wafers with Specular Surfaces
3.5 ANSI Standard4
ANSI/ASQC Z1.4 — Sampling Procedures and Tables for Inspection by Attributes
4 Terminology
4.1 Many of the terms used in this specification are defined in SEMI M59.
5 Wafer Ordering Information
5.1 Purchase orders for silicon wafers furnished to this specification shall include the following items:
5.1.1 Wafer type: polycrystalline-sintered or single crystal (monocrystalline).
5.1.2 Lot Acceptance Procedures (see Section 7).
5.1.3 Test methods for specified attributes (see Section 8).
5.1.4 Certification (if required) (see Section 9).
5.1.5 Packing and Package Labeling (see Section 10).
5.2 Optional Criteria — The following items may also be specified in addition to those listed above if they
are considered to be necessary for the application for which the wafers are to be employed.
5.2.1 Optional wafer identification mark symbol or symbols (see Section 6.3.2).
5.3 Additional Criteria — Any additional criteria considered to be necessary for the application for which
the wafers are to be employed may also be specified, as agreed between supplier and customer.
6 Requirements
6.1 Material —Wafers shall consist of silicon, either polycrystalline-sintered or single crystal
(monocrystalline).
6.2 Dimensions and Permissible Variations — Wafers shall conform to the dimensions and dimensional
tolerances as specified for the attributes listed in Table 1.
Table 1 Table 1 Dimensional Requirements
Property
Specification
450.0 0.2 mm
925 ± 25 µm
10 µm
DIAMETER
THICKNESS, CENTER POINT
NINE-POINT THICKNESS VARIATION, less than
NOTCH DIMENSIONS (see Figure 1)
Depth
Angle
1.00 mm+ 0.25 mm – 0.00 mm
90 + 5 – 1
POLISHED
FRONT SURFACE
3
Both Japanese editions and English translations available from Japan Standards Association, 1-24, Akasaka 4-chome, Minato-ku,
Tokyo 107, Japan
4
American Society for Quality Control, 611 East Wisconsin Avenue, Milwaukee, WI 53202
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BACK SURFACE FINISH (GLOSS)
POLISHED
EDGE PROFILE SURFACE FINISH
POLISHED
NOTE 1 Since diameter tolerance statistics are not available for 450 mm Mechanical Wafer Manufacturing at this time,
+/- 0.2 mm wafer diameter tolerance is used as a starting point specification based on existing 300 mm capability.
However, some wafer handling robot design may need +/- 0.1 mm diameter tolerance for throughput needs during
development and prototyping evaluation. The wafer diameter tolerance specification will be revisited by the end of
2008 for a tighter specification, i.e. +/-0.1 mm, when more silicon wafer manufacturer actual data is available.
NOTE 2 Note: Shape is not specified. A reasonable target value for warp is considered to be <100 µm. The target warp
value is expected to be adequate for many handling purposes. Processing may induce additional warp.
6.2.1 Fiducial Mark — A notch in conformance with the dimensions and tolerances of Figure 1 shall be
placed on the periphery of the wafer.
6.2.1.1 For monocrystalline wafers the notch shall be placed at the end of a diameter corresponding to a
<110> crystal direction within ± 1°. This diameter is called the orientation fiducial axis. For (100) wafers,
the allowable equivalent <110> directions are 01 1 , 011 , 0 1 1 , and 011 .
 
 
6.2.1.2 For polycrystalline-sintered wafers the notch shall be placed at an arbitrary on the periphery of the
wafer.
6.2.2 Back Surface Finish — The back surface shall be polished.
6.2.3 Edge Profile and Edge Finish — The edge profile shall conform to the following requirements at all
points on the wafer periphery (except interior portions of notches which are to be finished in accordance
with the provisions of the purchase order or contract).
6.2.3.1 Edge Profile — When the wafer is aligned with the SEMI Wafer Edge Profile Template (see Fig. 2
and Table 2) so that the x-axis of the template is coincident with the wafer surface and the y-axis of the
template is tangent with the outermost radial portion of the contour, the wafer edge profile must be
contained within the clear region of the template. (See Figure 3 for examples of acceptable and
unacceptable contours.) No sharp corners, points, or protrusions are permitted anywhere on the wafer edge
contour.
6.2.3.2 Edge Profile Surface Finish — The edge profile surface finish is specified to be “polished,” which
is meant to imply a surface condition and not a particular processing technique.
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Figure 1
Notch Dimensions
Figure 2
SEMI Wafer Edge Profile Template
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Table 2 Table 2 Coordinates for 450 mm Diameter Wafer Edge Profile Template
Point
x
y
A
B
C
D
120 µm
508 µm
100 µm
0 µm
0 µm
0 µm
231 µm
50 µm
NOTE 3: Only one-half of the template is shown; the wafer surface is aligned with the x-axis and the outermost radial portion of the
edge contour is aligned with the y-axis. This template is not intended for use in measuring wafer thickness.
Figure 3
Examples of Acceptable and Unacceptable Wafer Edge Profiles
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Figure 4
Identification marking position
6.3 Other Requirements
6.3.1 Identification marking of wafers is not required but is permitted as an option.
NOTE 4: If identification marking is used it is recommended that T7 identification marks be employed, or that an
optional alphanumeric code symbol be placed on the back surface of the wafer. Locations are specified in Figure 4.
6.3.2 The wafers shall conform to such other physical characteristics listed in SEMI M1 as may be
specified in the purchase order or contract.
6.3.3 Wafer Mass — The following information is provided for information only; it does not represent a
specification requirement. The mass of a single 450mm wafer of nominal dimensions, taking the density of
silicon as 2.33 g/cm3, is approximately 340 gr.
7 Sampling
7.1 Unless other wise specified, ASTM Practice E 122 shall be used to define the sampling plan. When so
specified, appropriate sample sizes shall be selected from each lot in accordance with ANSI/ASQC Z1.4.
Each quality characteristic shall be assigned an acceptable quality level (AQL) or lot tolerance percent
defective (LTPD) value in accordance with ANSI/ASQC Z1.4 definitions for critical, major, and minor
classifications. If desired and so specified in the contract or order, each of these classifications may
alternatively be assigned cumulative AQL or LTPD values. Inspection levels shall be agreed upon between
the supplier and the purchaser.
8 Test Methods
8.1 Table 1 of SEMI M1 contains a listing of ASTM, DIN, and JEITA/JIS test methods that may apply to
the testing of specified attributes of 450 mm diameter handling wafers. Notes on test methods for the
attributes listed in §6 are given in this section. These attributes are listed in the order they are found in this
table
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8.2 Diameter —It is suggested that diameter be determined by finding a circle that bests fits the circumference of
the wafer by a least squares method; the diameter of the wafer is twice the radius of this circle.
8.3 Notch Dimensions — The depth and angle of the fiducial notch should be determined in accordance
with SEMI MF1152 with the use of a wafer holding fixture appropriate for 450mm wafers.
8.4 Edge Profile Shape — The suitability of the edge profile shape may be determined in accordance with
SEMI MF928 or DIN 50441/2 with the use of a fixture appropriate for 450mm wafers. How-ever, the
nondestructive method given in these test methods is not suitable for quantitative measurements of the edge
profile shape.
8.5 Surface Finish — The surface finish of the wafer should be established by a method agreed upon
between supplier and purchaser.
8.6 Thickness — Center point thickness should be determined in accordance with SEMI MF533, JIS H
0611, or DIN 50441/1; special jigs or fixtures may be needed to allow the probe to reach the center point of
the wafer. SEMI MF1530 may also be used for this determination.
8.7 Thickness Variation — Nine-point thickness variation should be determined in accordance with SEMI
MF533, JIS H 0611, or DIN 50441/1, except that a nine-point test pattern shall be used. The nine points
shall be the center, and the R/2 and R-6 mm on a wafer diameter and a second diameter perpendicular to it.
9 Certification
9.1 Upon request of the purchaser in the contract or order, manufacturer’s or supplier’s certification that
the material was manufactured and tested in accordance with this specification, together with a report of the
test results, shall be furnished at the time of shipment.
9.2 In the interest of controlling inspection costs, the supplier and the purchaser may agree that the
material shall be certified as “capable of meeting” certain requirements. In this context, “capable of
meeting” shall signify that the supplier is not required to perform the appropriate tests as included in the
purchase order or contract (see Section 8). However, if the purchaser performs the test and the material fails
to meet the requirement, the material may be subject to rejection.
10 Packing and Package Labeling
10.1 Special packing requirements shall be subject to agreement between the supplier and the purchaser.
Otherwise all wafers shall be handled, inspected, and packed in such a manner as to avoid chipping,
scratches, and contamination and in accordance with the best industry practices to provide ample protection
against damage during shipment.
10.2 Wafers supplied under this specification shall be identified by appropriately labeling the outside of
each box or other container and each subdivision thereof in which it may reasonably expected that the
wafers will be stored prior to further processing. Wafer box labels shall include as a minimum the
following information in accordance with SEMI T3:
10.2.1 Customer Assigned Product Identification Number,
10.2.2 Lot Number,
10.2.3 Vendor Identification Code,
10.2.4 Labeling Date, and
10.2.5 Quantity.
10.3 The lot number shall provide access to information concerning the nominal diameter and fabrication
history of the particular wafers in that lot. Such information shall be retained on file at the manufacturer’s
facility for at least one month after that particular lot has been accepted by the purchaser, or for a longer
time if so specified in the purchase order or contract.
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