Name Designation Branch Institute Semester Subject Subject Code Topic Duration Sub Topic Teaching Aids Revised by : : : : : : : : : : : : C. S. Manjula, Grad IETE Lab Mechanic Computer Engineering S.P.W. Polytechnic, Tirupati, IV semester Microprocessors CM 405 Instruction Set 100 Minutes Addressing Modes of 8086 PPT K.Srikanth,Lecturer,GPT, Nizamabad CM404.12TO13 1 Addressing Modes of 8086 Definition Addressing mode indicates the method through which an operand is specified or indicated in an instruction Types of Addressing Modes: 11 1. Immediate Addressing mode 2. Direct Addressing mode 3. Register Addressing mode 4. Register Indirect Addressing mode CM404.12TO13 2 Addressing Modes of 8086 (Contd..) 5. Register Relative Addressing mode 6. Based Indexed Addressing mode 7. Relative Based Indexed Addressing mode CM404.12TO13 3 Branch Related Addressing Modes 8. Intra-segment Direct Addressing mode 9. Intra-segment Indirect Addressing mode 10. Inter-segment Direct Addressing mode 11. Inter-segment Indirect Addressing mode CM404.12TO13 4 1. Immediate Addressing mode Operand is indicated in the instruction itself Ex: MOV AX, 0007H 0007H is the immediate data here. CM404.12TO13 5 2. Direct Addressing mode • Offset Address of the operand is specified directly in the instruction EX: MOV AX , [5000H] NOTE:1.[ ] indicates offset or effective address 2. Data resides in the Data Segment (DS), whose Physical address is computed as PA = DS x 10H + 5000H CM404.12TO13 6 3. Register Addressing mode The register which holds the data is mentioned in the instruction Ex: MOV BX, AX All the registers, except IP and CS may be used CM404.12TO13 7 4. Register Indirect Addressing • • Offset address is stored in a register That register is indicated in the instruction EX: MOV AX, [BX] • • • The offset address of the data is in BX. The Physical Address (PA) is given as: PA = [DS] x 10H + [BX] • Permitted Registers: SI, DI, BX CM404.12TO13 8 5. Register Relative Addressing mode • Offset address is stored in a register • Permitted Registers: SI, DI, BX, BP • That register, and an 8-bit or 16-bit displacement are given within the instruction • The Offset Address of the data is computed by adding the displacement with the memory offset address present in the given register EX: MOV AX, 50H[BX] Offset address = 50H + [BX] PA = 10H * DS + 8 or 16 bit relative addr. CM404.12TO13 9 6. Based Indexed Addressing • A base register (BX/BP), and an index register (SI/DI) are given within the instruction • The Effective Address of the data is computed by adding the addresses present in the base and index regs. EX: MOV AX, [BX] [SI] EA = [BX] + [SI] PA = 10H * DS + EA CM404.12TO13 10 7. Relative Based Indexed Addressing Mode • A base register (BX/BP), an index register (SI/DI), and an 8-bit or 16-bit displacement are given within the instruction • The Effective Address of the data is computed by adding the addresses present in the given registers with the 8bit or 16-bit displacement EX: MOV AX, 50H [BX][SI] EA = [BX] + [SI] + 50H PA = 10H * DS + EA CM404.12TO13 11 Branch Related Addressing Modes Instructions under this category doesn’t try to access data, instead they alter normal sequence of program execution (By branching to an instruction somewhere else) • Inter segment branch – Branching within the same code segment • Intra segment branch – Branching into another code segment CM404.12TO13 12 8. Intra-segment Direct Addressing mode • An 8-bit or 16-bit displacement is given within the instruction • The effective branch address (code segment offset address) is given as the sum of 8-bit or 16-bit displacement and the contents of Instruction Pointer (IP) and lies within the same segment CM404.12TO13 13 9. Intra-segment Indirect Addressing mode • The address of a register or a memory location, where the 16-bit code segment offset address is located, is given within the instruction • A branch is affected by copying this offset address into IP register • This branch is to a location within the code segment CM404.12TO13 14 10. Inter-segment Direct Addressing Mode • Two 16-bit values, specifying the base and offset addresses of the code segment, are given within the instruction • A branch is affected by copying the contents of the above mentioned addresses into CS and IP registers. This branch can be to a location outside the code segment CM404.12TO13 15 11. Inter-segment Indirect Addressing Mode • The starting address of a memory block, containing the base and offset addresses of the code segment, is specified using any of the data related addressing modes • A branch is affected by copying the contents of the above mentioned memory block into CS and IP registers. This branch can be to a location outside the code segment CM404.12TO13 16 Summary We have discussed about • Types of addressing modes CM404.12TO13 17 Quiz 1.What do you mean by addressing mode ? a) Locating ALU b) Locating operand c) Locating memory d) Locating register CM404.12TO13 18 Quiz (Contd.) 2.The length of an instruction of 8086 can be ? a) 1 to 4 bytes b) 2 to 4 bytes c) 1 to 6 bytes d) 2 to 6 bytes CM404.12TO13 19 Quiz (Contd.) 3.What is meant by inter segment addressing mode ? a) Branch address is available in the same segment b) Branch address is available outside the segment --------------------------------------------------------- CM404.12TO13 20 Frequently Asked Questions 1. List out addressing modes supported by 8086 ? 2. Explain each addressing mode by using suitable examples ? 3. Compare direct and indirect addressing modes and explain the similarities and differences with suitable examples CM404.12TO13 21