Timer Operations
Overview
• Topics to be covered:
o
o
o
o
o
Free running counter
Output compare
Input capture
Pulse accumulator
Real time interrupt
• Reading: Text, Section 8.7, Chapter 11; E9 Chapter
9; HC11 Ref. Chapters 10-11
Cont..
Overview
• Registers
o Control registers
TCLT1 Timer control register 1
TCTL2 Timer control register 2
TMSK1 Main timer interrupt mask register 1
TMSK2 Miscellaneous timer interrupt mask register 2
PACTL Pulse accumulator control register
o Data registers
TCNT Timer counter register
TIC1-3 Timer input capture registers 1-3
TOC1-5 Timer output compare registers 1-5
PACNT Pulse accumulator count register
Cont..
Overview
o Status registers
TFLG1 Main timer
interrupt flag register 1
TFLG2 Miscellaneous
timer flag register 2
• Pins
o Timer uses pins on Port
A
 If you’re not using a
certain timer
function, you can use
the pin for I/O
Cont..
Overview
• The 68HC11 supports a wide variety of timer-based
applications through the use of its on-chip timer
o Using the timer frees the CPU for other processing
 Don’t need to use time-delay loops
o More accurate timing
 Standard time-delay loops do not account for time spent in
ISRs
• Some applications of the timer subsystem
o
o
o
o
o
Generating pulses (continuous streams or one-shots)
Internal timer to start and/or stop tasks
Measure period (or frequency)
Measure pulse widths
Count events
Cont..
Overview
• The HC11’s “free running counter / timer” forms
the basis for all timing functions and provides time
information to all programs
• Free running counter description:
o The (2 MHz) E-clock drives a prescaler to the counter
o Prescaler divides E-clock by 1, 4, 8, or 16
o The counter is a 16-bit count
 Counting sequence is from $0000 to $FFFF and repeat
 Counter value can be read from the TCNT register,
$100E,F (16-bit, 2-address register)
υ Always use a 16-bit load (LDD, LDX, LDY)
υ Can’t write to TCNT
 TCNT reset to $0000 when HC11 is reset
Cont..
Overview
o When the counter value rolls over from $FFFF to $0000,
 Timer overflow flag bit is set (TOF -- bit 7 in TFLG2
register, $1025 -- not $1024 as in Fig 11.1)
 An overflow interrupt may occur if enabled (TOI -- bit 7 in
TMSK2 register, $1024)
• Prescale bit selection
o Bits PR1 and PR0, bits 1 and 0 in register TMSK2 determine
prescaler division value
o These bits are "write once" during the first 64 E-clock cycles
after a reset
Cont..
Overview
oResolution using 8 MHz system crystal
Cont..
Overview
• Clearing flag bits in TFLG1 and TFLG2 interrupt
flag registers
o Flag bits in these registers are cleared by writing 1s to the
associated bit positions
o Use LDAA / STAA or BCLR -- not BSET!
o To clear timer overflow flag TOF, use
LDAA #$80
STAA TFLG2
or
BCLR TFLG2,X, $7F
Timer output compare function
• Uses:
o Output pulse waveforms
 Square waves
 Variable duty-cycle waves
 Single pulses
o Elapsed time indicator (to external circuitry)
o Trigger execution sequence at a specified time
 Can generate an interrupt with/without external output
• Description:
o There are 5 output compare functions, OC1 -- OC5
 Each is associated with a 16-bit output compare register:
• TOC1--TOC5
Cont..
Timer output compare function
• At addresses $1016 -- $101F
o The user or user program stores time values in these registers
 Times at which the user wants something to happen
 Usually, you read TCNT, add a value to it (the amount of
delay), store in TOCx
o During each E-clock cycle, the values contained in all 5 of the
output compare registers are compared to the value of the free
running counter
o If there is a compare (a match) between one of the registers and
the free running counter,
 The corresponding flag bit is set (OCxF in register TFLG1,
$1023)
Cont..
Timer output compare function
 The state of the
associated output
pin(s) on port A may
change, depending
on configuration
 Timer output
compare interrupt is
generated if enabled
(OCxI in register
TMSK1, $1022)
• Functions OC2-OC5
o These functions manipulate
single output bits, bits PA6
-- PA3
Cont..
Timer output compare function
• Force Output Compare
o Writing a 1 to a bit(s) in CFORC register “forces” a compare
before the timer reaches the value in TOCx
o Does not generate an interrupt
o Drives the associated output pin according to setting of OMx
and OLx bits in TCTL1
 Be careful using this with “Toggle” mode
• Forcing an output does not affect the value in TOCx or
the operation of the timer
• When TCNT reaches value in TOCx, it will drive the
output again
o Doesn’t matter if you’re using “Drive Output
High” or “Drive Output Low” modes
Cont..
Timer output compare function
o For “Toggle,” the output will toggle when you
force it and then toggle back when timer reaches
TOCx value
• OC1 function
o Used to control any combination of output pins PA7 - PA3
 To use PA7 for OC1, you must write a 1 to DDRA7 in
PACTL
o Uses 2 separate registers to control its operation
 OCM1, output compare 1 mask register, is used to specify
which output bits will be controlled
• Set the bits to enable OC1’s control of the output pin
o OCD1, output compare 1 data register, contains the data to be
sent to the port A pins upon occurrence of a compare
Cont..
Timer output compare function
 For example, you can set PA3 and PA4 high and PA7 low
when a successful compare occurs
 No “Toggle” mode for OC1
• You can reset the output pins by writing to Port A
and disabling the OCx
o Data is latched when you write to Port A
o Latch data is placed on pin when you disable counter
Cont..
Timer output compare function
Cont..
Timer output compare function
• Example: Generate a single 10 ms high pulse
o This is NOT using interrupts -- one-time use of code segment
;Listing 11.1
;Drive one-shot high pulse for 10 ms
;with E –2 Mhz and prescale –1
;REMINDER, see samples listing in Appendix E
;==============================================
SEG Demo
PWIDTH EQU 20000
LDD TCNT,X
STD TOC2,X
PULSE
;prevent preventure
;OC2 compare
;drive PA6-OC2 high
BSET PORTA, X, $40
LDAA #$80
;configure OC2 high
Cont..
Timer output compare function
PULSE1
STAA TCTL1, X
;and disconn.other Ocx’s
LDAA #$40
;clear OC2F if set
STAA TFLG1, X
LDO TCNT, X
;arm TOC2 for 10-ms trigger
ADDD #PWOTH-17
STD TOC2, X
;wait for trigger
BRCLR TFLG1, X, $40, PULSE1
;new output OC2F high
BCLR PORTA, X, $40 ;clear latch for PA6
LDAA #$40
;then clear OC2F
STAA TFLG1, X ;before
BCLR TFLG1, X, $80 ;disconnecting OC2
BRA
$
;end for now
Cont..
Timer output compare function
• Example: Generating square waves
o Use “Toggle” mode and interrupts
o Initialization
Set OMx and OLx
Set TOCx
Enable timer interrupt
o Interrupt service routine
Update TOCx (add half-period)
Clear OCxF flag
Return
o See Listing 11.3 in text
o Note that you must update TOCx after every interrupt to
generate a continuous signal
Cont..
Timer output compare function
• Example: Pulse width modulation
o Generate a pulse at a fixed periodic interval
o Duty cycle of the pulse is based on the width of the pulse wrt to
the total period – normally specifies the percentage of time the
signal is high compared to the period
o Steps to implement in EVBU:
 Select desired prescale value
 Determine count on TCNT that corresponds to desired
period
 Determine initial values of high and low cycle count values
(adjust values later, once code is written, if needed)
 Select desired OCx and specify address of output compare
interrupt service routine
Cont..
Timer output compare function
 Develop the needed software to initialize timer operations
and then the associated ISR
;Listing 11.4
;Shows routines for handling PWM using output OC2
;A main application program varies the duty cycle
;by modifying 16-bit data in address OC2HI and
OC2LO.
;Duty cycle0100% * OC2HI/(OC2HI +OC2LO)
;User Responsibility to see up vector addresses and
;other intialization as required by application.
;===================================================
SEG Utility
;Subroutine INITOC2
;Initializes timer output OC2 for PWM output
;interrupt driven
Timer output compare function
;Calling registers
;
IX= register block address
;Return registers
;
None, except CCR atteched
INIOC2
PSHA
;preserve registers
PSHB
LDD TCNT,X
;delay PWM generation
STD TOC2,X
LDAA #$C0
;OM2:OL2=1:1 to set
STAA TCTL1,X ;OC2 high first time
LDAA #$40
;clear OC2F if set
STAA TFLG1,X
STAA TMSK1,X ;set OC2 to eable
CLI
;interrupt
PULB
;restore registers
PULA
RTS
;return
Timer output compare function
;Service routine RTOC2
;Drives OC2 output for PWM by scheduling
;time delay for next edge. Also reconfigures
;next edge opposite to that of current edge.
;Note that routine will not work properly with
;duty cycles close to 0% or 100%
;Static variables (2 bytes each)
;Address OC2HI=OC2 time duration for high pulse
;Address OC2LO=OC2 time duration for low pulse
;This routine executed after TOC2 – TCNT occurs
RTOC2
LDX #REGBAS
;point to registers
;if low part of cycle
;then load OC2LO
Timer output compare function
BRCLR TCTL1,X,@40,GETOC2LO
LDO
OC2HI
;else load OC2HI
BRA
NEWTOC2
GETOC2LO
LDO
NEWTOC2
ADDO
LDAA
EORA
;STAA
BCLR
RTI
OC2LO
;update TOC2
TOC2,X
TCTL1,X
;invert OL2 to toggle
#%01000000 ;next OC2 edge
TCTL1,X
;by updating cntrl reg.
FTFLG1,X,$BF ;clear flag OC2F
;return from service
Timer output compare function
• Example: Use multiple
output compares to
generate a 1 E-clock
period pulse at a rate
of "period" on OC2
using polling
Timer output compare function
• Example: Use multiple output compares to generate
a 1 E-clock period pulse at a rate of "period" on
OC2 using polling
INIT_PLS
LDX
#$1000
LDO
TCNT,X
STD
TOC1,X
STD
TOC2,X
BSET OC1M,X
BCLR OC1M,X
BSET OC1D,X
BCLR OC1D,X
BCLR TCTL1,X
BSET TCTL1,X
/” DELAY ANY OC1, OC2 COMPARES “/
/” WTGN1 =%010000000 “/
#$40 /”ENABLE OC1 ACTION FOR OC2”/
#$80 /”OC2 PIN WILL BE HI FOR OC1 COMPARE”/
#$40
#$80
#$40 /”OC2 PIN WILL BE LO FOR OC2COMPARE”/
#$80
Timer output compare function
SERVICE
SERVICE
BCLR
LDAA
STAA
LDD
ADDD
STD
ADDD
STD
BRA
TMSK1,X #$C0 /”DISABLE OC1M OC2 INTRUPPTS”/
#BIT76HI
/”BIT76HI = %11000000”/
TFLG1,X
/”CLEAR PREVIOUSLY SET OC1,OC2FLAGS”/
TOC1,X
#PERIOD
TOC1,X
/”OC1 WILL OCCURE IN “PERICO” E CLOCKS”/
#1
TOC2,X /”OC2 WILL OCCURE IN “PERICO+1” E CLOCKS”/
POLL
POLLING
POLL LDAA
BITA
BEQ
BRA
TFLG1,X
#BITBHI
POLL
SERVICE
/”CHECK OC2 FLAG BIT”/
Timer input compare function
• The input capture function records the time when an
active transition on a pin occurs
• Useful for:
o Measuring time between events (occurring in external
hardware)
 Results might be speed, frequency, period, distance
traveled, fluid flow, etc.
o Reacting to real-time events (do something after X occurs, or
after X occurs Y times)
• Description:
o 4 input capture functions, IC1-3 plus IC4 (E9 only -- not on the
A8 discussed in the text)
 IC1 -- PA2, IC2 -- PA1, IC3 -- PA0, IC4 -- PA3 (or use pin
as OC5/OC1)
Cont..
Timer input compare function
» Use 16-bit timer input capture registers at
addresses $1010 -- $1015 (IC1-3) and $101E-F
(IC4)
o Input capture edge detectors sense when an edge occurs on the
pin(s)
o If an edge detection occurs, the following will happen
 The TCNT value is loaded into the timer input capture
register
 The associated status flag is set
 An interrupt may occur (if enabled)
o Initialization of IC1-3:
Cont..
Timer input compare function
o
Input capture pin IC4:
 Pin 3 of port A can be
used for general I/O,
output compare
operations, or input
capture operations
 Input capture operations
are similar to IC1- 3, but
initialization is different
• To use as input
capture, set bit I4/O5
to 1 in the PACTL
register
 Flag and interrupt mask
bits are bits 3 in registers
TFG1 and TMSK1
Cont..
Timer input compare function
 Desired edge is specified by bits EDG4b, EDG4A (bits 7
and 6) in register TCTL2
o Shares interrupt service routine vector $FFE0-1 with OC5
Pulse width measurement example
o Measure the width of a pulse on IC1
 Won’t work if pulse is too short or too long
o Pseudo code:
 Wait for and record time of rising edge
 Wait for and record time of falling edge
 Difference between the 2 is the pulse width
Cont..
Timer input compare function
;Listing 11.8
;Measure time between a rising and a falling edge on IC1.
;=========================================================
SEG Demo
LDAA
STAA
LDAA
STAA
POLLRISE
BRCLR
LDD
STD
LDAA
#$10
;config 10 compare rising edge
TCTL2,X
#$04
;clear flag IC1F if net
TFLG1,X
;Wait for rising edge
TFLG1,X,$04, POLLRISE
TIC1,X ;store the rise time
RISETIME
#$40
;config to capture falling edge
Cont..
Timer input compare function
STAA
LDAA
STAA
POLLFALL
BRCLR
LDD
SUBD
STD
BRA
TCTL2,X
#$04
TFLG1,X
;wait for falling edge
TFLG1,X,$04, POLLFALL
TIC1,X
RISETIME
PULSEWIDTH
$
; clear flag IC1F
; read the fall time
; width = fall – rise
; store width
; stop here for now
•Period calculation example
o Determine the period of a periodic waveform on input IC1
o Must capture the times of consecutive rising (or falling) edges
o Remember to initialize ISR vectors and to scale result (if
needed)
Cont..
Timer input compare function
;Listing 11.9
;Service routines to measure period between two rising
;edges at the IC1 pin.Results valid in range of
;~27E cycles to 65,535 TCNT cycles lowers ignored
;=========================================================
SEG
IC1DUN DS
IC1MOD DS
PER
DS
Page0
1
1
2
;flag:0=not done, 1=pulse measured
;mode flag:FF off, 0-1st,1 last edge
;period 16 bits
;=========================================================
;
;
IC1DUN=0
IC1MOD=$FF, means measurement has no started
Cont..
Timer input compare function
INITIC1
PSHA
LDAA
STAA
LDAA
STAA
CLR
;present register
;EDG1B : EDG1A = 0:1 for rising edge
#$10
TCTL2,X
#$1F
;mode flag off
IC1MOD
IC1DUN ;single period not done
BCLR
BSET
CLI
PULA
RTS
TFLG1,X, $FB
;clear IC1F at set
TMSK1,X, $04
;enable IC1 interrupt
;enable interrupts
;restore registers
;and return
Cont..
Timer input compare function
;Service routine RTIC1
;Handles input capture IC1 interrupts
;Return variables on first edge
;
IC1MOD = 0
;
PER = first capture time
;On record rising edge calculates period and disables
;further rising edge interrupts
;Return variables on second edge
;
IC1MOD = 1
;
PER = period
;
IC1DUN = 1
RTIC1
LDX
#REGBAS
;point to register
INC
IC1MOD
;$ff -> 0 at first edge
;0 -> 1 at second edge
BNE
EDGE2
;if not 0 then this is second edge
Cont..
Timer input compare function
EDGE1
;process first edge
LDD
TIC1,X
;capture first edge time
STD
PER
;and save it
LDAA
#$04
;clear flag IC1F
STAA
TRLG1,X
TRI
;and return
EDGE2
;process second edge
LDD
TIC1,X
;capture second edge time
SUBD
PER
;second time – first time
STD
PER
;is low 2 bytes of results
BCLR
TCTL2,X, $30
LDAA
#1
;and signal period measured
STAA
IC1DUN
EXITRIC1
BCLR
TFLG1,X,$FB
TRI
;and return from service routine
Cont..
Timer input compare function
• Measuring long periods
o What if pulse is longer than 65,536 TCNT clock cycles?
 First, change the pre-scale factor for the free running clock
• Maximum measurable pulse would be 524.3 ms
 Otherwise, you must count the number of times the timer
overflows
• Overflow doesn’t matter if pulse width is less than
65,536 TCNT cycles
 Listing 11.10 shows one way to do this
• This gets complicated
• Also, there is a bug in the listing
o Need a branch after the TST instruction (near label
EDGE2)
• Can count pulses up to 16,777,215 TCNT cycles
o About 8.38 seconds with 8 MHz crystal and pre-scale
set to 1
Pulse accumulator function
• Pulse accumulator is an 8-bit counter that counts
edges (events) or tracks the pulse width
• Description:
o Input is on PA7 (conflicts with OC1)
o Initialization and control is via bits in PACTL:
 DDRA7: data direction set to 0
 PAEN: pulse accumulator enable
 PAMOD: mode bit -- 0 for event counting, 1 for gated
time accumulation
 PEDGE: specifies edge transition to be used
• Flags and interrupt control
o 2 flags in TFLG2
 PAOVF: set on counter overflow
 PAIF: set on any detected edge
o 2 corresponding interrupts: PAOVI, PAII
Cont..
Pulse accumulator function
• Fig 11.9 Pulse accumulator event counting mode
Cont..
Pulse accumulator function
• Event Counting
o PAMOD = 0
o PACNT is incremented whenever an appropriate edge is
detected (can be configured for rising or falling edges)
o When PACNT overflows from $FF to $00, it sets PAIF in
TFLG2 and generates an interrupt, if enabled
o Can be used to generate interrupt when a preset number of
edges have been detected
• Short Counts
o Write the 2’s complement of the expected count into PACNT
 Ex. To generate an interrupt after 24 ($18) events, write
$E8 (i.e., -$18) into PACNT
o PACNT is an 8-bit counter, so this only works for counts less
than 256
o See Listing 11.11
Cont..
Pulse accumulator function
• Long Counts
o Can count more than 256 by using software to keep track of
the number of overflows
o One way to do this:
 Load 16-bit count value into ACCD
o ACCA (upper 8 bits) has the number of overflows that
will be needed (multiples of 256)
o ACCB has the remainder
 Write 2’s complement of ACCB into PACNT
o If ACCB is not 0, then increment number of expected
overflows
 Wait for interrupt and then decrement expected overflow
count
 See Listing 11.12
Cont..
Pulse accumulator function
• Fig 11.10 Pulse accumulation in the gated time mode
Cont..
Pulse accumulator function
• Gated Time Accumulation
o PAMOD = 1
o Counts up once every 64 E-clock cycles when PAI input is at
active level
 Use PEDGE bit to specify which is active level
 Does not count edges
o Flag and interrupt bits work the same as for event counting
o Can be used for pulse-width discrimination
 Lets you tell wide pulses apart from narrow pulses
 Set PACNT to a value halfway between the width of the
narrow and wide pulses
o Narrow pulse -- edge interrupt will occur before overflow
interrupt
o Wide pulse -- overflow interrupt will occur before edge
interrupt
Real Time Interrupt
•
The real-time interrupt
subsection of the timer
operations is useful for
scheduling other events
- make an application
do something at specified intervals of time
• Asserts real-time
interrupt flag and
interrupt at prescribed
time intervals - set by
values of bits RTR1
and RTR0
Cont..
Real Time Interrupt
•
Interrupt rates for E
= 2 MHz
Cont..
Real Time Interrupt
•
Example: 24 hour clock
o Note that 68HC68T1 is more accurate
;Listing 11.14
FCNT
EQU
244
;number of RTII interrupts to
;make 1 second
;subroutine INITRTII
;Initializes real-time interrupt foreground timer
;No return registers except that CCR affected
;Application program should initialize
;following RAM variables:
;
HR = Hour count in BCD
;
MIN = Minute count in BCD
;
SEC = Second count in BCD
;Calling registers
Cont..
Real Time Interrupt
;
IX = register block address
INITRII
BSET
TMSK2,X,$40
;set RTII flag
CLI
CLR
CLR
FSEC
FSEC + 1
;initialize FSEC
;FSEC is function of second count for RTII routine in hex
RTS
;return
;Service routine RRTII
;Handles real-time interrupt
;Uses 16-bit software counter FSEC to count fractions
;of seconds. Updates RAM variables SECONDS, MINUTES, and
;HOURS as BCD values for use by any other routine
Cont..
Real Time Interrupt
RRTII
LDX
LDAA
STAA
LDY
INY
STY
CPY
BEQ
RTI
#REGBAS
#$40
TFLG2,X
FSEC
CLR
CLR
LDAA
ADDA
DAA
FSEC
FSEC + 1
SEC
#1
;adjust
FSEC
#FCNT
SECONDS
;clear RTIF
;count # of RTII
;occurrences
;add 1 to SEC if
;enough occurred
SECONDS
;reset function DEC COUNT
;to zero
;add 1 to seconds count
for decimal arithmetic
Cont..
Real Time Interrupt
CMPA
BEQ
STAA
RTI
##60
MINUTES
SEC
;check for seconds --- 60
;adjust minutes if --- 60
CLR
LDAA
ADDA
DAA
CMPA
BEQ
STAA
RTI
SEC
MIN
#1
;reset seconds to 0
CLR
LDAA
ADDA
DAA
MIN
HR
#1
MINUTES
#$60
HOURS
MIN
;add 1 to minutes count
;adjust for decimal arithmetic
;check for minutes --- 60
;and adjust hours if – 60
HOURS
;reset minutes count
;add 1 to hours count
Cont..
Real Time Interrupt
STAA
CMPA
BNE
CLR
RETURN
RTI
HR
#$24
RETURN
HR
;check for hours –-- 24
;and reset to 0 if – 24
Summary
o The timer subsystem of the 68HC11 provides a wide range of
flexible, timer-based functions
o Output compare
 Permits output pins to be manipulated at specified instances of
time
 Possible generation of corresponding interrupts
o Input capture
 Upon active edge at an input pin, read TCNT into capture
register
 Permits determination of time at which edge occurs
o Pulse accumulator
 Permits input transitions to be counted - track number of
transitions on an input
 Can also be used for pulse width determination
o Real-time interrupt
 Interrupt generated at periodic times - used to schedule other
events