Students:
Thomas Carley
Luke Ketcham
Brendan Zimmer
Advisors:
Dr. Woonki Na
Dr. Brian Huggins
Bradley University
Department Of Electrical Engineering
5/1/12
Presentation Outline
 Project
Summary
 Project Motivation
 Overall System Block Diagram
 Boost Converter
 Inverter
 Future Work
2
Project Summary
 Photovoltaic
Array
 Supplies DC and AC Power
 Boost Converter to step up PV voltage
 Maximum Power Point Tracking
 DC-AC converter for 120Vrms 60Hz
 LC filter
3
Project Motivation
Power Electronics
 Alternative Energy Sources
 Useful Applications

 Household
grid-tie inverter
 Electric drives
4
System Block Diagram
Photovoltaic
Boost
Converter
DC
Output
AC
Output
Inverter
LC Filter
Load
DSP
Board
5
BP350J PV Panel






Pmax = 50W
Voltage at Pmax = 17.5V
Current at Pmax = 2.9A
Nominal Voltage = 12V
Isc = 3.2A
Voc = 21.8V
6
DC Subsystem Requirements

The boost converter shall accept a voltage from the
photovoltaic cells.
The input voltage shall be 48 Volts.
 The average output shall be 200 Volts +/- 25 Volts.




The voltage ripple shall be less than 20 Volts
The open-loop boost converter shall operate above 65%
efficiency.
The boost converter shall perform maximum power
point tracking.
The PWM of the boost converter shall be regulated based on
current and voltage from the PV array.
 The efficiency of the MPPT system shall be above 80%.

7
Boost Converter
Test Boost Converter
20V to 66V
D = .3
3000u
350
20
100
.1u
6000u
1200
0 252.
30000
1n
8
Boost Converter Design
Vo 
L
Vin  Vtrans  D
1 D
 Vd 
Vout  Vin  Vd  (1  D )
Rcrit 
min( iload )  fs
2  L  fs
D (1  D )
2

20  1.3 .7
1  .7

 1.3  62 .33
66 . 66 V  20 V  1 . 3V  (1  . 7 )
( 66 V / 1200  )  30000 Hz
2  . 003 H  30000 Hz
. 3 (1  . 3 )
2
 . 0086 H
 1224 . 5
9
Hardware
10
Key Components

MOSFET (IRFP4768PbF)
 VDSS

= 250V
Id = 93A
Ultrafast Diode (HFA50PA60C)
 VR
= 600V
If = 25A
Trr = 50ns
Inductors (3mH)
 Capacitors (6000uF)

11
Gate Driver

IR2110
+5V
HO
VDD
HIN
.1uF
VB
VS
+15V
SD
LIN
VSS
VCC
.1uF
COM
LO
Gate
12
Boost Converter Simulations
Output Voltage (V)
20V – 66V
V1
140
120
100
80
60
40
20
0
0
2
4
6
8
10
Time (s)
13
Boost Converter Simulations
Boost Converter Current (A)
20V-66V
I2
100
80
60
40
20
0
0
0.1
0.2
0.3
0.4
Time (s)
14
Boost Converter Testing
10V to 16.5V
40% Duty Cycle
Output Voltage
Inductor Current
15
Eliminating Voltage Spikes
Parasitic capacitance and inductance
 Diode forward recovery time
 Circuit Layout
 Add Gate Resistor to increase turn-on and
turn-off time
 Add RC snubber

16
Increasing Turn off Time
Turn off time increased from 92 ns to 312 ns
17
Determining RC snubber values
Cs 
Ic  tf

. 3 A  300 ns
2  70 V
2Voff
Rs 
Vbr

250 V
Ic
Rs 
 833 . 33 
.3
D min  Ts
3  Cs
 . 643 nF

. 3 * . 000033 s
3  . 643 nF
 5185 
18
Reducing Voltage Spikes
20V to 66V
Without Gate Resistor And RC Snubber
70% duty
With Gate Resistor And RC Snubber
19
Boost Converter Current
Efficiency = 60.7%
Without RC snubber and Gate Resistor
Efficiency = 58.1%
With RC snubber and Gate Resistor
20
Future Work For Boost Converter
Optimize inductor value
 Printed Circuit Board Layout
 Optimize RC snubber values
 Test with multiple solar panels

21
Maximum Power Point Tracking
(MPPT)



Every PV has a V-I and
P-V curve for a given
insolation and temperature
The MPP is seen clearly
from the P-V curve
Anytime the system is not
at the MPP, it is not at it’s
most efficient point
I
V
MPP
P
V
22
Perturb and Observe (P&O)
Slight voltage perturbation
 Observation of:

 Change
in PV power
 Change in boost converter duty cycle

Make an increase or decrease in boost
converter duty cycle based on observation
23
P&O
Measure Vpv(t)
and Ipv(t)
Calculate
Ppv = Vpv * Ipv
ΔPpv = Ppv(t) Ppv(t-1)
ΔPpv > 0
yes
ΔP
ΔD
D+
+
+
+
+
-
-
-
+
-
-
-
+
no
Increase in
Boost Duty
cycle?
Increase in
Boost Duty
cycle?
yes
no
yes
no
Increase Boost
Duty cycle
Decrease Boost
Duty Cycle
Decrease Boost
Duty Cycle
Increase Boost
Duty cycle
Save Previous Data:
Ppv(t-1) = Ppv(t)
D(t-1) = D(t)
24
MPPT Algorithm Comparison

Perturb and Observe
 Pros:
 Very popular
 Simple to implement
 Con:
 Power loss from perturbation

Incremental Conductance
 Pro:
 Tracks a rapidly changing MPP
 Cons:
 Increased complexity
 Increased susceptibility to noise
25
Implementing MPPT
Spectrum Digital eZdsp F2812
 Voltage Sensing
 Current Sensing
 Matlab Simulink Modeling with Code
Composer Studio

26
eZdsp F2812 features







Texas Instruments TMS320F2812 chip
32-bit DSP Core – 150 MIPS
18K + 64K RAM
128K Flash
30 MHz clock
12 PWM outputs
16 ADC 12 bit inputs

60 ns conversion time
27
Voltage Sensing
Vpv is 0 to 24V
 VADC 0 to 3.3V

Vpv
20kΩ
+3.3V
+3.3V
1033
1033
+5V
VADC
OP484
100Ω
3kΩ
0.01uF
1000pF
1033
28
Current Sensing
L08P050D15
 Ipv: 0 to 50A
 Vout: 0 to 4V
+3.3V
NC
Ipv
+15V
-15V
VADC
29
Simulink Model
F2812 eZdsp
C281x
A0
double
Data Type Conversion1
A2
ADC
1
P&O
double
Data Type Conversion2
ADC
Mean
(discrete)
Discrete
Mean value
7.385
Rate Transition1 Voltage divider
compensation
1
In1 Out1
z
Mean
(discrete)
Discrete
Mean value1
z
Unit Delay2
12.5
Power
Delta P
Unit Delay1
+/- 1
Rate Transition2
Volts to Amps
1
Delta D

30 to 70%
Product
1
z
z
Unit Delay4
Unit Delay3
ADC measurement
C281x

Voltage and current every 100μs
 Mean value with running window of 1Hz
uint16
Step
Repeating
Sequence
Stair1
Switch1 Data Type Conversion4
W1
PWM
PWM
Rate Transition
30
Simulink Model
F2812 eZdsp
1
z
C281x
A0
double
Data Type Conversion1
A2
ADC
ADC
double
Data Type Conversion2
Mean
(discrete)
Discrete
Mean value
7.385
Rate Transition1 Voltage divider
compensation
1
In1 Out1
z
Mean
(discrete)
Discrete
Mean value1
Unit Delay2
12.5
Power
Delta P
Unit Delay1
30 to 70%
Product
+/- 1
Rate Transition2
Volts to Amps
1
Delta D
1
z
z
Unit Delay4
Unit Delay3
Soft Start
C281x
uint16
Step
Repeating
Sequence
Stair1
Switch1 Data Type Conversion4
W1
PWM
PWM
Rate Transition
31
MPPT and Soft Start Results

Soft start duty cycle control
 0%
to 30%
 5% increase every 5 seconds
 Transition to MPPT after 40 seconds

MPPT duty cycle control
 ADC measurements
 Voltage and current every 100μs
 Mean value with running window of 1Hz
 1%
increase/decrease every 1 second
32
Power Supplies
120Vrms 60Hz input from wall
 15V, 5V, and 3.3V output
 Consists of Transformer, Diode Rectifier,
470uF capacitor, and voltage regulators
 Needed for Gate Drivers, Op Amps,
Sensing ICs, and other logic devices

33
Power Supply
Power Supply
10
1
Diode Rectifier
169.7
60
C
470u
LM7815AC
15V Regulator
LM78L05AC
5V Regulator
LM1117T-3.3
3.3V Regulator
Transformer (3FL20-125)
• Secondary Voltage of 10VAC
• Secondary Current of 0.25A RMS
34
Power Supply
35
AC Subsystem Overview
36
AC Subsystem Goals
DC power to AC power
 AC power quality

37
AC Subsystem Requirements
 The
AC side of the system shall invert the output
of the boost converter.
 The
output of the inverter shall be AC voltage.
 The output shall be 60Hz +/- 0.1Hz.
 The
inverter output shall be filtered by a LC filter.
 The
filter shall remove high switching frequency
harmonics.
 Total harmonic distortion of the output shall be less
than 15%.
38
Topology - Inverter
Single-phase bridge inverter
39
Switching Logic

Desire to control
 Output
frequency
 Output magnitude
 Sinusoidal
PWM!
40
Theory of Sinusoidal (Bipolar) PWM



The magnitude of a
triangle carrier signal is
compared to a
sinusoidal reference
If Vreference > Vcarrier
PWM = high
If Vreference < Vcarrier
PWM = low
A complementary signal drives
opposite leg of H-bridge
41
Unipolar Sinusoidal PWM
Two sinusoids compared to a triangle
reference
 Each comparison drives one H-bridge leg
respectively

42
Unipolar PWM in Action




Two comparisons
Each leg of H-bridge
driven independently
3-level output
Less harmonic
distortion than
bipolar PWM
43
Design Equations

Modulation index, mi

^
mi 
V

control
^
^
V
(V
triangle
Frequency Modulation
ratio, mf
mf 
Fundamental Output
Magnitude
f triangle
f carrier

)  mi *Vd
out 1
Output Frequency
f output  f control
44
Implications
^

mi can be used to control
output magnitude (voltage)
(V
^
mi 


Typically 0 < mi ≤ 1
Overmodulation if mi > 1
(non-linear operation)
 Useful for obtaining large
output power, but
harmonic distortion will be
large
)  mi *Vd
out 1
V
control
^
V
triangle
45
Implications
f output  f control

Output Frequency

Can select mf to remove even harmonics from
output spectrum
 For
Bipolar PWM, mf = odd integer
 For Unipolar PWM, mf = even integer
Example (Unipolar):
mf 
f triangle
f carrier
fcarrier = 60 Hz
ftriangle = 2520 Hz
mf = 42
46
Output

Desire sinusoidal
output
 Output
isn’t very
sinusoidal

Use a filter
 LC
filter
47
LC Filter



Goal: Smooth inverter output to smooth AC
Second order LC filter transfer function:
G(s) = 1/(L*C*s^2+1)
fcarrier < cutoff frequency < fcarrier ∙ mf
48
Simulation

PSIM, Circuit Simulation Software
 Proof
of concept simulations
Bipolar PWM vs. Unipolar PWM
 Effectiveness of LC filter with both
schemes

49
PSIM Schematic (Bipolar PWM)
mi = 0.8
mf = 11
Vd = 200 V
50
PSIM Schematic (Unipolar PWM)
mi = 0.8
mf = 10
Vd = 200 V
51
Simulation Result – Vout (unfiltered)
Bipolar PWM
Unipolar PWM
52
Simulation Results (filtered)
Bipolar
PWM
Unipolar
PWM
fout = 60 Hz (both cases)
53
Bipolar PWM – Frequency Domain
Unfiltered
Output
Filtered
Output
mi = 0.8
mf = 81
54
Unipolar PWM – Frequency Domain
Unfiltered
Output
Filtered
Output
mi = 0.8
mf = 80
55
Implementation
Major Hardware Components
IGBT
 Gate Drive
 LC Filter
 Spectrum Digital eZdsp F2812

 Texas
Instruments TMS320F2812
 Simulink, Code Composer Studio
56
IGBT

International Rectifier IRG4PC30UDPbF
 VCEmax
= 600 V
 fswitching max = 40 kHz
 ICmax = 12 A
 Cost = $2-3 each
57
Gate Drive

International Rectifier IR2110
 Drives
Two IGBTs/MOSFETs
 Cost $3 each
58
LC Filter
L = 1 mH
C = 100 μF
Cost of components = $6
fcutoff ≈ 500 Hz
59
Sinusoidal PWM – Simulink
60
Experimental Results
Bipolar PWM
Vd = 10V (DC)
Vout = 13.6V (AC)
mi=0.8
mf = 83
61
Future Work
Closed-loop MPPT control with PV input
 Inverter voltage and current controller
 Tying the inverter to the grid

 Phase
Locked Loop (PLL)
62
Special thanks to:
Dr. In Soo Ahn
Mr. Steve Gutschlag
63
References





PV Module Simulink Models.” ECEN2060. University of Colorado Boulder.
Rozenblat, Lazar. "A Grid Tie Inverter for Solar Systems." Grid Tie Inverter
Schematic and Principles of Operation. 6 Oct. 2011.
<http://solar.smps.us/grid-tie-inverter-schematic.html>.
Tafticht, T., K. Agbossou, M. Doumbia, and A. Cheriti. "An Improved
Maximum Power Point Tracking Method for Photovoltaic Systems."
Renewable Energy 33.7 (2008): 1508-516.
Tian, Yi. ANALYSIS, SIMULATION AND DSP BASED IMPLEMENTATION
OF ASYMMETRIC THREE-LEVEL SINGLE-PHASE INVERTER IN SOLAR
POWER SYSTEM. Thesis. Florida State University, 2007.
Zhou, Lining. EVALUATION AND DSP BASED IMPLEMENTATION OF
PWM APPROACHES FOR SINGLE-PHASE DC-AC CONVERTERS.
Thesis. Florida State University, 2005.
64
Questions?
65