EET 2261 Unit 10
Enhanced Capture Timer
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Read Almy, Chapter 20.
Homework #10 and Lab #10 due next
week.
Quiz next week.
Enhanced Capture Timer (ECT)
Block
•The Enhanced Capture
Timer (ECT) block is used
to control the timing of
events under the HCS12’s
control or to measure the
timing of external events.
•Figure from p. 6 of
textbook or page 23 of
Device User Guide).
Block Diagram of Enhanced
Capture Timer (ECT) Block
•
See block
diagram on
p. 14 of the
ECT_16B8C
Block User
Guide.
Special-Function Registers
Associated with the ECT Block
•
The 64 special-function registers located at
addresses $0040 to $007F let us control the
operation of the ECT block.
•
See p. 30 of Device User Guide.
Is It a Timer or a Counter? It’s
Both!
•Circuits like the HCS12’s ECT are sometimes called
timers, and are sometimes called counters (and are
sometimes called timer/counters.)
•That’s because timing and counting are basically the
same operation.
•“Timer” usually implies that we’re
counting regularly spaced clock
pulses.
•“Counter” suggests that we’re
counting events that may be
irregularly spaced, such as parts
passing a sensor on a conveyor belt.
An Example of a Timer Application
•In past weeks we have often used delay loops to
control the timing of certain events, such as the rate at
which an LED blinks.
•Timers give us a different way to do this. Instead of
using a delay loop, we can use a timer to tell when it’s
time to toggle the LED.
•If we use a delay loop, the CPU can’t do anything else while
it’s executing the delay code. By letting the timer hardware
take care of the timing, the CPU can be freed up to do other
things.
•From this point onward, we’ll usually use timers instead
of delay loops.
Four Common Uses of the ECT
1. Detecting timer overflows.
2. Performing output compare (detecting when the
timer reaches a certain value).
3. Performing input capture (recording the time at
which an external event occurs).
4. Performing pulse accumulation (counting the
number of times an external event occurs).
Special-Function Registers That
Control the Main Timer
•
The ECT block actually includes several
timer/counters. We’ll look first at the main
timer, also known as the free-running
timer.
•
The following registers are the most
important ones for using the main timer:
•
•
•
•
Timer System Control Register 1 (TSCR1)
Timer Count Register (TCNT)
Timer System Control Register 2 (TSCR2)
Main Timer Interrupt Flag Register 2 (TFLG2)
Timer System Control Register 1
(TSCR1)
•
The Timer Enable (TEN) bit in the TSCR1
register controls whether the main counter is
turned on or off.
•
Figure from p. 22 of ECT_16B8C Block User Guide,
which also provides detailed explanation.
Timer Count Register (TCNT)
•
The 16-bit TCNT register is the heart of the
main timer. It counts up from $0000 to
$FFFF, then overflows back to $0000, and
then repeats.
•
Figure from p. 21 of ECT_16B8C Block User Guide,
which also provides detailed explanation.
The Prescaler
•
How often does the TCNT register count up
by 1? By default, its frequency is the same
as the HCS12’s bus clock frequency.
•
But a circuit called the prescaler lets us
slow down the count rate by a factor of 2, 4,
8, 16, 32, 64, or 128.
•
Example: Suppose the HCS12’s bus clock
frequency is 24 MHz, and the prescaler is
set to a factor of 16. How often does TCNT
increase its count?
Timer System Control Register 2
(TSCR2)
•
Bits 0, 1, and 2 of the TSCR2 register control
the prescaler.
•
Figures from p. 26 of ECT_16B8C Block User Guide.
Main Timer Interrupt Flag 2
(TFLG2)
•
The only implemented bit in this register is
the Timer Overflag Flag (TOF), which is
automatically set to 1 whenever TCNT
overflows from $FFFF to $0000.
•
Figure from p. 28 of ECT_16B8C Block User Guide.
Polling Versus Interrupts to Detect
Timer Overflows
•One way to tell when a timer overflow has
occurred is to poll the TOF bit repeatedly until it
is set, at which point the program proceeds to
take some other action:
Here: BRCLR TFLG2, %10000000, Here
•Another way is to use a Timer Overflow
interrupt instead of repeatedly polling the TOF
bit.
•If we use polling, the CPU can’t do anything else
while it’s polling the flag bit. If we use interrupts, the
CPU is freed up to do other things.
Timer Overflow Interrupt
•The Timer Overflow interrupt is enabled or
disabled by the TOI bit in TSCR2:
• If this interrupt is enabled, then an interrupt
will occur whenever the TOF bit is set:
Interrupt Vector for Timer Overflow
Interrupt
•In the interrupt vector table, the word starting
at $FFDE is reserved for the starting address of
the service routine for Timer Overflow
TYPO! This should say TSCR2, not TSRC2.
interrupts.
From table on page 75
of the Device User Guide.
TYPO! This should say TOI, not TOF.
•Remember: the programmer is responsible for
setting up the correct address in this vector
table.
Programming a TOF Interrupt
Skeleton of code for using TOF interrupt:
Clearing the TOF Bit
•
Once the Timer Overflag Flag (TOF) bit is set
to 1, how does it get cleared back to 0?
•
Whether we use polling or interrupts, it is the
programmer’s responsibility to clear the flag
bit. We do this by writing a 1 to the flag bit.
(Seems odd, but that’s how it works for most
flag bits in Freescale processors.)
Example: MOVB #$80, TFLG2
Some Advice on Interrupts versus
Polling
•
In any program, choose either polling or
interrupts, and stick with your choice. Don’t
use both in the same program.
•
•
Polling is usually easier for beginning
programmers.
Be sure not to enable interrupts you’re not
planning to use, or else your program will
end up in left field.
•
Be careful when copy/pasting old code into a
new program. Does the code you’re copying
enable any interrupts?
Some Advice on Interrupts versus
Polling (continued)
•
Whether you’re using polling or interrupts,
don’t forget to reset flags after they get set.
•
If you use interrupts in one program and
then start working on another program, the
interrupts you enabled in the first program
may still be enabled when you run the
second program.
•
To avoid this, press RESET between programs.
RESET clears most (or all?) interrupt enable
bits.
Some Advice on Interrupts versus
Polling (continued)
•
If you’re not sure whether your program is
ever getting to a certain point when it runs,
use a breakpoint.
•
Example: Not sure whether the program ever
gets to your interrupt service routine? Before you
run the program, set a breakpoint on the first
instruction in the service routine.
Four Common Uses of the ECT
1. Detecting timer overflows.
2. Performing output compare (detecting when
the timer reaches a certain value).
3. Performing input capture (recording the time at
which an external event occurs).
4. Performing pulse accumulation (counting the
number of times an external event occurs).
Output Compare
•
The TOF bit lets us know when the main
timer overflows from $FFFF to $0000.
•
•
Think of this as similar to an alarm clock that
goes off every night at midnight.
What if we’d like to know when a shorter
time interval has passed? We can use the
ECT block’s Output Compare channels.
•
Think of these as similar to kitchen timers that
we can set to beep after a specific amount of
time has passed.
•
The ECT block gives us eight of these.
Special-Function Registers For Using
the Output Compare Channels
•
The following registers are the most
important ones for using the output compare
channels:
•
•
•
•
•
•
Timer Input/Output Select Register (TIOS)
Timer Input Capture/Output Compare Registers
0-7 (TC0, TC1, …, TC7)
Main Timer Interrupt Flag Register 1 (TFLG1)
Timer Interrupt Enable Register (TIE)
Timer Control Register 1 (TCTL1)
Timer Control Register 2 (TCTL2)
Timer Input/Output Select Register
(TIOS)
•
As we’ll see, each output compare channel
can also be used as an input capture
channel. We use the TIOS register to say
how we want to use each channel.
•
0 = input capture; 1 = output compare.
•
Figure from p. 19 of ECT_16B8C Block User Guide.
Timer Input Capture/Output Compare
Registers 0-7 (TC0, TC1, …, TC7)
•
Each output compare channel has a 16-bit
register into which we can load a value. This
value is constantly compared to the TCNT
value. When the values match, we’ll be
alerted that a match has occurred.
•
Figure from p. 29 of ECT_16B8C Block User Guide.
Main Timer Interrupt Flag Register
1 (TFLG1)
•
This status register holds a compare flag for
each output compare channel. A flag is set
to 1 whenever there’s a match between the
TCNT value and the value in the
corresponding output compare register.
•
Figure from p. 27 of ECT_16B8C Block User Guide.
Polling Versus Interrupts for Output
Compare
•One way to tell when an output compare has
occurred is to poll a compare flag bit repeatedly
until it is set, at which point the program
proceeds to take some other action:
Here: BRCLR TFLG1, %00000001, Here
•Another way is to use an interrupt instead of
repeatedly polling the compare flag bit.
Timer Channel Interrupts
•Each timer channel has its own interrupt:
•Enabled or disabled by the bits in TIE:
• If one of these interrupts is enabled, then an interrupt
will occur whenever the corresponding flag bit in
TFLG1 is set:
Interrupt Vectors for Timer Channel
Interrupts
•In the interrupt vector table, eight words are
reserved for the starting addresses of the
service routines for Timer Overflow interrupts.
From table on page 75 of the Device User Guide.
•Remember: the programmer is responsible for
setting up correct addresses in the vector table.
Clearing the Compare Flag Bits
•
Once a compare flag bit in TFLG1 is set to 1,
how does it get cleared back to 0?
•
Just as with the TOF bit, it is the
programmer’s responsibility to clear the flag
bit. (This is true whether we use polling or
interrupts.) We do this by writing a 1 to the
flag bit.
Example: MOVB #$01, TFLG1
Outputting a Signal When There’s
a Match
•
•
We’ve seen that a match between the TCNT value
and the value in an output compare register causes
a compare flag bit in TFLG1 to be set to 1 (which
may in turn cause an interrupt to occur).
•
We can also configure the HCS12 to produce a
signal on an I/O pin when there’s a match.
The ECT
block shares
I/O pins with
Port T.
Timer Control Registers 1 and 2
(TCTL1 and TCTL2)
•
These registers control whether a match
causes an output signal, and if so, the nature
of that signal.
•
Figures from p. 23 of
ECT_16B8C Block
User Guide.
Typical Use of the Output
Compare Function
•
Typically we use the output compare function when we
want to be reminded at regular intervals to do something.
•
Analogy: Suppose you wanted to use your alarm clock at
home to remind yourself to eat a doughnut every 45
minutes. Here’s what you could do:
1.
Read the clock to find out what time it is now.
2.
Add 45 minutes to the current time, and set the alarm
to go off at that time.
3.
Do something fun, such as studying EET 2261.
4.
When the alarm goes off, eat a doughnut.
5.
Repeat by going back to Step 1.
Steps in Programming the Output
Compare Function
1.
Initialize TSCR1 and TSCR2 for the free-running timer.
2.
(Optional) Enable interrupts from the desired timer channel,
and set up an interrupt vector in the vector table.
3.
Initialize TIOS to select output compare for the desired channel.
4.
Read TCNT to determine the current time.
5.
Add the desired number to the value in Step 4, and store the
result in the TCn register for the desired channel.
6.
Either poll the CnF flag in TFLG1 to determine when TCn
matches TCNT, or (if you’re using interrupts) do something else
until an interrupt occurs.
7.
When an interrupt occurs or your polling code detects that the
CnF flag is set, take the desired action. Also clear the flag bit.
8.
Repeat by going back to Step 4.
Review: Four Common Uses of the
ECT
1. Detecting timer overflows.
2. Performing output compare (detecting when the
timer reaches a certain value).
3. Performing input capture (recording the
time at which an external event occurs).
4. Performing pulse accumulation (counting the
number of times an external event occurs).
Input Capture
•
•
We can use the HCS12’s timer to record the
time at which external events happen. This
lets us measure quantities like period and
pulse width of input waveforms.
•
To do this, we must configure one or more of
the ECT channels as Input Capture
channels instead of Output Compare
channels.
As noted earlier,
the ECT channels
share I/O pins
with Port T.
Special-Function Registers For Using
the Input Capture Channels
•
The following registers are the most
important ones for using the input capture
channels:
•
•
•
•
•
•
Timer Input/Output Select Register (TIOS)
Timer Input Capture/Output Compare Registers
0-7 (TC0, TC1, …, TC7)
Timer Control Register 3 (TCTL3)
Timer Control Register 4 (TCTL4)
Main Timer Interrupt Flag Register 1 (TFLG1)
Timer Interrupt Enable Register (TIE)
Timer Input/Output Select Register
(TIOS)
•
We saw earlier that each channel has a bit in
this register.
•
•
•
Set a bit to 0 if you want to use that channel for
input capture.
Set it to 1 if you want to use the channel for
output compare.
Figure from p. 19 of ECT_16B8C Block User Guide.
Timer Input Capture/Output Compare
Registers 0-7 (TC0, TC1, …, TC7)
•
We saw earlier how these 16-bit registers
(one for each channel) are used during
output compare. During input capture, when
an external event occurs on a channel, the
time (from TCNT) is loaded into that
channel’s TCn register.
•
Figure from p. 29 of ECT_16B8C Block User Guide.
Timer Control Registers 3 and 4
(TCTL3 and TCTL4)
•
These registers let us specify which type of
event we’re looking for on input pins.
•
Figures from p. 25 of
ECT_16B8C Block
User Guide.
Main Timer Interrupt Flag Register
1 (TFLG1)
•
We saw earlier how this status register is
used during output compare. During input
capture, when an external event occurs on a
channel, the corresponding capture flag in
this register is set.
•
Figure from p. 27 of ECT_16B8C Block User Guide.
Polling Versus Interrupts for Input
Compare
•As we saw above, we can have an interrupt
generated whenever a timer overflow occurs or
whenever a compare occurs on an output
compare channel.
•Similarly, when we’re using a channel to
perform input capture, we can cause an
interrupt to be generated whenever the channel
captures an event.
Review: Timer Channel Interrupts
•As we saw earlier, each timer channel has its own
interrupt, which is enabled or disabled by the bits in TIE:
• If one of these interrupts is enabled, then an interrupt
will occur whenever the corresponding flag bit in
TFLG1 is set:
Review: Interrupt Vectors for Timer
Channel Interrupts
•In the interrupt vector table, eight words are
reserved for the starting addresses of the
service routines for Timer Overflow interrupts.
From table on page 75 of the Device User Guide.
•Remember: the programmer is responsible for
setting up correct addresses in the vector table.
Clearing the Capture Flag Bits
•
Once a flag bit in TFLG1 is set to 1, how
does it get cleared back to 0?
•
Just as with flag bits discussed earlier, it is
the programmer’s responsibility to clear the
flag bit. (This is true whether we use polling
or interrupts.) We do this by writing a 1 to
the flag bit.
Example: MOVB #$01, TFLG1
Steps in Programming the Input
Capture Function
1.
Initialize TSCR1 and TSCR2 for the free-running timer.
2.
(Optional) Enable interrupts from the desired timer channel, and set up an
interrupt vector in the vector table.
3.
Initialize TIOS to select input capture for the desired channel. To be on
the safe side, also initialize DDRT to make sure that the pin you’re using is
configured as an input pin.
4.
Initialize TCTL3 or TCTL4 to select the edge you wish to detect.
5.
Either poll the CnF flag in TFLG1 to determine when an edge has arrived,
or (if you’re using interrupts) do something else until an interrupt occurs.
6.
Save TCn somewhere for use in a later step. Also clear the flag bit.
7.
Either poll the CnF flag in TFLG1 to determine when an edge has arrived,
or (if you’re using interrupts) do something else until an interrupt occurs.
8.
Subtract the saved TCn value from the current TCn value. The result is
the time between the two edges. Also clear the flag bit.
9.
Repeat by going back to Step 5.
Review: Four Common Uses of the
ECT
1. Detecting timer overflows.
2. Performing output compare (detecting when the
timer reaches a certain value).
3. Performing input capture (recording the time at
which an external event occurs).
4. Performing pulse accumulation (counting
the number of times an external event
occurs).
Pulse Accumulation
•
•
We can use the ECT to count the number of
times an external event happens. This is
called pulse accumulation (also know as
event counting.)
•
The ECT gives us four 8-bit pulse
accumulators, which use pins PT0, PT1,
PT2, and PT3 as input pins.
As noted earlier,
the ECT shares I/O
pins with Port T.
Special-Function Registers For Using
the 8-Bit Pulse Accumulators
•
The following registers are the most
important ones for using the 8-bit pulse
accumulators:
•
•
•
Input Control Pulse Accumulators Register
(ICPAR)
Timer Control Register 4 (TCTL4)
Pulse Accumulator Count Registers 0, 1, 2, and
3 (PACN0, PACN1, PACN2, and PACN3)
Input Control Pulse Accumulators
Register (ICPAR)
•
The four enable bits in the ICPAR let us turn
on or off each of the 8-bit pulse
accumulators.
•
Figure from p. 37 of ECT_16B8C Block User Guide.
Timer Control Register 4 (TCTL4)
•
We saw earlier that the TCTL4 register
(along with TCTL3) let us specify which type
of event we’re looking for on input pins when
we do input capture.
•
It serves the same
purpose when
we’re doing pulse
accumulation.
Pulse Accumulator Count Registers 0, 1, 2,
and 3 (PACN0, PACN1, PACN2, and PACN3)
•
The PACNn registers hold the actual count
for each pulse accumulator.
•
Figure from p. 34 of ECT_16B8C Block User Guide.
16-Bit Pulse Accumulators
•
We can combine PACN3 and PACN2
together to form a 16-bit pulse accumulator
named PACA.
•
And we can combine PACN1 and PACN0
together to form a 16-bit pulse accumulator
named PACB.