Computer Organization تنظيم الحاسبات Dr. Tamer Samy Gaafar Dept. of Computer & Systems Engineering Faculty of Engineering Zagazig University Course Web Page http://www.tsgaafar.faculty.zu.edu.eg Email: tsgaafar@yahoo.com Grading: Course work Grade distribution Assignments + Sections 10pt Midterm Exam 20pt 30 Final Exam 70pt Total Points 100 Ch. 1: Introduction Ch. 2: A Top-Level View of Computer Function and Interconnection Ch. 3: Instruction Set Architecture & Design Ch. 4: Computer Arithmetic Ch. 5: Input – Output Design & Organization. Ch. 6: Memory System Design Ch. 7: Control Unit Ch. 8: Introduction to Advanced Computer Architecture and Parallel Processing Architecture: attributes visible to the programmer. ◦ Instruction set, number of bits used for data representation, I/O mechanisms, addressing techniques. ◦ e.g. Is there a multiply instruction? Organization: how features are implemented ◦ Control signals, interfaces, memory technology, number of cores. ◦ e.g. Is there a hardware multiply unit or is it done by repeated addition? All Intel x86 family share the same basic architecture. This gives code compatibility, at least backwards. Organization differs between different versions (e.g., Core i3/i5/i7, Xeon, Atom, … etc.) Structure: the way in which components Function: the operation of individual relate to each other. components as part of the structure Computer Peripherals Central Processing Unit Computer Main Memory Systems Interconnection Input Output Communication lines CPU Arithmetic and Login Unit Computer Registers CPU Memory System Bus I/O Internal CPU Interconnection Control Unit Control Unit CPU Registers Internal Bus Control Unit ALU Sequencing Logic Control Unit Registers and Decoders Control Memory All computers have the following functions: ◦Data storage ◦Date processing ◦Data movement ◦Control Data Storage Facility Data Movement Apparatus Control Mechanism Data Processing Facility e.g., keyboard to screen. Data Storage Facility Data Movement Apparatus Control Mechanism Data Processing Facility e.g., Internet download to a disk. Data Storage Facility Data Movement Apparatus Control Mechanism Data Processing Facility e.g., updating a bank statement. Data Storage Facility Data Movement Apparatus Control Mechanism Data Processing Facility e.g., printing a bank statement. Data Storage Facility Data Movement Apparatus Control Mechanism Data Processing Facility 1. 2. 3. Data and instructions are stored in a single read-write memory. The contents of this memory are addressable by location, without regard to the type of data contained there. Execution occurs in a sequential fashion (unless modified) from one instruction to the next. Hardwired program: configuration of logic components designed specifically for a particular computation. Inflexible. General-purpose hardware: can do different tasks, given correct control signals. ◦ Instead of re-wiring the hardware, supply a new set of control signals (write a new program). Customized hardware Data Sequence of arithmetic and logic functions Instruction codes Instruction Interpreter CPU Results • Each code is an instruction. • A sequence of codes (or instructions) is called software. Control signals Data General-purpose arithmetic and logic functions Results A sequence of steps. For each step, an arithmetic or logical operation could be done. Each operation result in a different set of control signals. ◦ A unique code is provided for each operation. e.g., ADD 9D, MOVE E3, … etc. ◦ A hardware segment accepts the code and issues the control signals That’s it. We have a computer! The Control Unit and the Arithmetic and Logic Unit constitute the Central Processing Unit. Data and instructions need to get into the system and results out. ◦ Input/Output Temporary storage of code and results is needed. ◦ Main memory. Two steps: ◦ Fetch: CPU reads instructions from memory, one at a time. ◦ Execute: CPU executes instructions. Program Counter (PC) holds address of next instruction to fetch. Processor fetches instruction from memory location pointed to by PC. Increment PC. ◦ Unless told otherwise Instruction loaded into Instruction Register (IR). Processor interprets instruction and performs required actions in execute cycle. Processor-memory ◦ Data transfer between CPU and main memory Processor-I/O ◦ Data transfer between CPU and I/O module Data processing ◦ Some arithmetic or logical operation on data Control ◦ Alteration of sequence of operations ◦ e.g., jump Combination of the above 0 3 4 Opcode 15 Address Instruction Format 0 1 S 15 Magnitude Integer Format Program Counter (PC) Instruction Register (IR) Accumulator (AC) CPU Registers 0001 = Load AC from memory. 0010 = Store AC to memory. 0101 = Add to AC from memory. Partial List of Opcodes Fetch cycle Execute cycle First instruction Second instruction Third instruction CPU-memory or CPU-I/O operations Internal CPU operations