SNS Power Supply Control
Sheng Peng
ICS – Software Engineering Group
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Overview
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Power supplies are from different vendors
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Power supplies have different capability
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IE power, Danfysik, Alpha …
+/- 20 Amps, +/- 35 Volts stackable
+525 Amps, +35 Volts
+400 Amps, +20 Volts
+375 Amps, +80 Volts
+390 Amps, +24 Volts
+700 Amps, +18 Volts
+900 Amps, +51 Volts
+1300 Amps, +95 Volts
+1405 Amps, +390 Volts
+4000 Amps, +18 Volts
+6000 Amps, +440 Volts
+185 Amps, +27 Volts
+1400 Amps, +800 Volts
+2200 Amps, +33000 Volts
+20 Amps, +75 Volts
+40 Amps, +75 Volts
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Uniform control interface for most of power supplies
» SNS Power Supply Controller (PSC)/Power Supply Interface (PSI)
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EPICS based software
ICS – Software Engineering Group
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Revisons
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PSC
» 6U single wide VME board for operation
» 1U rack mounted for PSI test and calibration
» PSC based function generator (RHIC only)
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PSI
» 1U rack mounted for rack mounted/standalone power supply
» 6U single wide VME board for VME-style power supply
» “Higher speed less ADC” PSI (Under development in RHIC)
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Power Supplies in SNS
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Automated Power Supply Test and Calibration
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PSC/PSI Software
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PSC/PSI Hardware
PSI and VME with CPU and
PSC
PSI
PSC
CPU
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PSI
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PSC/PSI in SNS
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PSC/PSI is the SNS standard interface to every power
supply
PSI (Power Supply Interface)
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Installed with every power supply
One 16-bit DAC with jumper selectable Unipolar/Bipolar mode
Four 16-bit ADCs
Self calibration
15 bits digital out with selectable static or 100ms pulse mode
16 bits digital in
Fiber link to PSC, 9-pin analog connector/37 pin digital
connector to power supply
PSC (Power Supply Controller)
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Customized VME board with serial port available
Fiber link to PSI
Support 6 power supplies per board
128K circular buffer per channel to save 5458 samples
Software or hardware triggered read/write up to 5KHz
Burst read up to 10K samples/second (BNL is upgrading it to
100K)
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Communication Protocol/Real-time performance
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CPU  PSC
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Communicate thru VME bus backplane
All registers are memory mapped
Large circular buffer holds read back
Typical VME access cycle is 0.5~1.0 µs/word
PSC  PSI
» Multimode fiber with SC connector
» 5MHz carrier, upgradeable to 50MHz
» Each frame consist of 1 start bit, 1 byte frame ID, 3 bytes data,
1 byte CRC and 2 stop bits. So 43bits(8.6µs)/Frame in total.
» Setpoint/command needs only 1 frame (plus 1 echo)
» Readback needs 7 frames (1 request, 6 response)
» Whole write action takes ~20µs (include DAC setup time)
» Whole read action takes ~80µs
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Portable Power Supply Test Stand
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Long Term Reliability Test Stand
Each VME
Has 4 PSC’s
Each Rack
Has 24 PSI’s
Running at up to
4000Hz for several
months
Many 10^12
messages without
CRC or timeout
errors.
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Electrical performance (Some test results)
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Fiber interface provides the best electrical isolation
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ADC Reading Accuracy
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Some Test Results
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ADC Linearity Test
» Approximately 1-bit (300uvolts) variation from –10v to +10v input.
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Some Test Results
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ADC Temperature Stability
300uvolts = 1 bit
Approximately
½ bit change
with 10 degree F
change in temp.
ICS – Software Engineering Group
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Cost
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There are two choice to get PSC/PSI
» Buy as COTS from Apogee Labs
» Get design then have a manufacturer to build it
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PSI
» RHIC built it recently with a small amount: $895 each
» RHIC built revised PSC with a small amount: $1600 each
» Apogee Labs ask for $2854.50 (~$2000 for BNL) per board
with the order more than 100 boards
» Assume we buy PSC from Apogee Labs and build PSI like
RHIC did, the cost will be $895 + $2854.50/6 = ~$1380/PS
» If we build PSC too, the target cost should be ~$1150/PS
ICS – Software Engineering Group
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Status
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In use at NSRL and SNS
» DC power supplies 100ppm accuracy
» 60Hz triggered read/write
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Preliminary use at IHEP
» planned for BEPC-II
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Under evaluation for other BNL applications
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Design owned by BNL
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EPICS S/W freely available
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Summary
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PSC/PSI combination can be a cost-effective
solution
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H/W is proven reliable
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H/W design is “open”
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EPICS S/W is available
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User community is growing
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