Transistor Counts
1 Billion
Transistors
K
1,000,000
100,000
10,000
1,000
i486
i386
80286
100
10
Pentium® III
Pentium® II
Pentium® Pro
Pentium®
8086
Source: Intel
1
1975 1980 1985 1990 1995 2000 2005 2010
Projected
Courtesy, Intel
Design Abstraction Levels
SYSTEM
MODULE
+
GATE
CIRCUIT
DEVICE
G
S
n+
D
n+
Not Only Microprocessors
Cell
Phone
Small
Signal RF
Digital Cellular Market
(Phones Shipped)
Power
RF
Power
Management
1996 1997 1998 1999 2000
Units
48M 86M 162M 260M 435M
Analog
Baseband
Digital Baseband
(DSP + MCU)
(data from Texas Instruments)
Frequency
Frequency (Mhz)
10000
Doubles every
2 years
1000
100
486
10
8085
1
0.1
1970
8086 286
P6
Pentium ® proc
386
8080
8008
4004
1980
1990
Year
2000
2010
Lead Microprocessors frequency doubles every 2 years
Courtesy, Intel
Die Size Growth
Die size (mm)
100
10
8080
8008
4004
1
1970
8086
8085
1980
286
386
P6
Pentium
® proc
486
~7% growth per year
~2X growth in 10 years
1990
Year
2000
2010
Die size grows by 14% to satisfy Moore’s Law
Courtesy, Intel
Power (Watts)
100
Power Dissipation
P6
Pentium ® proc
10
8086 286
1
8008
4004
486
386
8085
8080
0.1
1971
1974
1978
1985
1992
2000
Year
Lead Microprocessors power continues to increase
Courtesy, Intel
Power
will be a major problem
100000
18KW
5KW
1.5KW
500W
Power (Watts)
10000
1000
100
Pentium® proc
286 486
8086
10
386
8085
8080
8008
1 4004
0.1
1971 1974 1978 1985 1992 2000 2004 2008
Year
Power delivery and dissipation will be prohibitive
Courtesy, Intel
Power Density (W/cm2)
10000
1000
100
Power density
Rocket
Nozzle
Nuclear
Reactor
8086
10 4004
Hot Plate
P6
8008 8085
Pentium® proc
386
286
486
8080
1
1970
1980
1990
2000
2010
Year
Power density too high to keep junctions at low temp
Courtesy, Intel
Challenges in Digital Design
 DSM
 1/DSM
“Macroscopic Issues”
“Microscopic Problems”
• Time-to-Market
• Millions of Gates
• High-Level Abstractions
• Reuse & IP: Portability
• Predictability
• etc.
• Ultra-high speed design
• Interconnect
• Noise, Crosstalk
• Reliability, Manufacturability
• Power Dissipation
• Clock distribution.
Everything Looks a Little Different
?
…and There’s a Lot of Them!
9
10,000
10,000,000
100,000
100,000,000
Logic Tr./Chip
Tr./Staff Month.
1,000
1,000,000
10,000
10,000,000
100
100,000
Productivity
(K) Trans./Staff - Mo.
Complexity
Logic Transistor per Chip (M)
Productivity Trends
1,000
1,000,000
58%/Yr. compounded
Complexity growth rate
10
10,000
100
100,000
1,0001
10
10,000
x
0.1
100
xx
0.01
10
xx
x
1
1,000
21%/Yr. compound
Productivity growth rate
x
x
0.1
100
0.01
10
2009
2007
2005
2003
2001
1999
1997
1995
1993
1991
1989
1987
1985
1983
1981
0.001
1
Source: Sematech
Complexity outpaces design productivity
Courtesy, ITRS Roadmap
Advanced Metallization
Die Cost
Single die
Wafer
Going up to 12” (30cm)
From http://www.amd.com
Yield
No. of good chips per wafer
Y 
Total number
Die cost 
Dies per wafer

 100 %
of chips per wafer
Wafer cost
Dies per wafer  Die yield
   wafer diameter/2
die area
2

  wafer diameter
2  die area
Defects
defects per unit area  die area 

die yield   1 




 is approximately 3
die cost  f (die area)
4

Summary
• Digital integrated circuits have come a long way
and still have quite some potential left for the
coming decades
• Some interesting challenges ahead
– Getting a clear perspective on the challenges and
potential solutions is the purpose of this book
• Understanding the design metrics that govern
digital design is crucial
– Cost, reliability, speed, power and energy dissipation