Digital Integrated Circuit (IC) Layout and
Design
! EE
134 – Winter 05
" Lecture Tu & Thurs. 9:40 – 11am ENGR2 142
" 2 Lab sections
– M 2:10pm – 5pm ENGR2 128
– F 11:10am – 2pm ENGR2 128
" NO LAB THIS WEEK
" FIRST LAB Friday Jan. 20
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EE134
People
! Lecturer
- Roger Lake
" Office – ENGR2 Rm. 437
" Office hours - MW 4-5pm
" rlake@ee.ucr.edu
! TA
– Faruk Yilmaz
" Office – ENGR2 Rm. 222
" Office Hours – TBD
" faruk@ee.ucr.edu
EE134
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EE134 Web-site
! http://www.ee.ucr.edu/~rlake/EE134.html
"
"
"
"
"
Class lecture notes
Assignments and solutions
Lab and project information
Exams and solutions
Other useful links
3
EE134
Class Organization
! Homework
! Labs
assignments (10%)
(20%)
" Tutorials to learn the Cadence design software
! Final
Project (50%)
" Design a digital circuit (eg. 4 bit adder)
" Work in teams of 3
! Midterm
EE134
(20%)
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Text Book
Digital Integrated
Circuits:
A Design Perspective,
2nd Ed.
Jan M. Rabaey
Anantha Chandrakasan
Borivoje Nikolic
EE134
Software
! Cadence
software
" Online documentation and tutorials
" Sun4 UNIX Workstations
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What is this book all about?
!
Introduction to digital integrated circuits.
"
"
"
"
"
"
!
CMOS devices and manufacturing technology.
CMOS inverters and gates.
Propagation delay,
noise margins, and
power dissipation.
Sequential circuits. Arithmetic, interconnect, and memories.
What will you learn?
" Understanding, designing, and optimizing digital circuits with
respect to different quality metrics: cost, speed, power
dissipation, and reliability
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Digital Integrated Circuits
Introduction: Issues in digital design
! CMOS devices and manufacturing
! The CMOS inverter
! Combinational logic structures
! Propagation delay, noise margins, power
! Sequential logic gates; timing
! Interconnect: R, L and C
! Arithmetic building blocks
! Memories and array structures
! Design methods
!
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EE134 Winter 2006 - Lecture 1
! Introduction
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Introduction
! Why
is designing digital
ICs different today than
it was before?
! Will it change in future?
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The First Computer (1832)
The Babbage
Difference Engine
(1832)
25,000 parts
cost: £17,470
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ENIAC - The first electronic computer (1946)
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12
The Transistor Revolution
First transistor
Bell Labs, 1948
13
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The First Integrated Circuits
Bipolar logic
1960’s
ECL 3-input Gate
Motorola 1966
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Intel 4004 Micro-Processor (1971)
1971
2,300 transistors
108 KHz operation
15
EE134
Intel Pentium 4 microprocessor (2000)
42 M transistors (217
mm2)
1.5 GHz
0.18 µm
180 nm technology
node
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What Happened over 30 Years?
1971
2,300 transistors
108 KHz operation
2000
~ 15,000 x
42 M transistors
1.5 GHz operation
Automotive comparison: SF to NY in 13 seconds.
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Moore’s Law
EE134
#
In 1965, Gordon Moore noted that the
number of transistors on a chip doubled
every 18 to 24 months.
#
He made a prediction that
semiconductor technology will double its
effectiveness every 18 months
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EE134
EE134
1975
1974
1973
1972
1971
1970
1969
1968
1967
1966
1965
1964
1963
1962
1961
1960
1959
LOG2 OF THE NUMBER OF
COMPONENTS PER INTEGRATED FUNCTION
Moore’s Law
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Electronics, April 19, 1965.
19
Evolution in Complexity
20
Transistor Counts
1 Billion
Transistors
K
1,000,000
100,000
10,000
1,000
i486
Pentium® III
Pentium® II
Pentium® Pro
Pentium®
i386
80286
100
8086
10
Source: Intel
1
1975 1980 1985 1990 1995 2000 2005 2010
Projected
Courtesy, Intel
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Moore’s law in Microprocessors
Transistors (MT)
1000
2X growth in 1.96 years!
100
10
486
1
386
286
0.1
0.01
0.001
P6
Pentium® proc
8086
8080
8008
4004
8085
1970
1980
1990
Year
2000
2010
Transistors on Lead Microprocessors double every 2 years
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Courtesy, Intel
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Die Size Growth
Die size (mm)
100
10
8080
8008
4004
8086
8085
1
1970
286
1980
386
P6
486 Pentium ® proc
~7% growth per year
~2X growth in 10 years
1990
Year
2000
2010
Die size grows by 14% to satisfy Moore’s Law
Courtesy, Intel
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Frequency
Frequency (Mhz)
10000
Doubles every
2 years
1000
100
486
10
8085
1
0.1
1970
8086 286
P6
Pentium ® proc
386
8080
8008
4004
1980
1990
Year
2000
2010
Lead Microprocessors frequency doubles every 2 years
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Courtesy, Intel
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Power Dissipation
Power (Watts)
100
P6
Pentium ® proc
10
8086 286
1
8008
4004
486
386
8085
8080
0.1
1971
1974
1978
1985
1992
2000
Year
Lead Microprocessors power continues to increase
Courtesy, Intel
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Power will be a major problem
100000
18KW
5KW
1.5KW
500W
Power (Watts)
10000
1000
100
Pentium® proc
286 486
8086
10
386
8085
8080
8008
1 4004
0.1
1971 1974 1978 1985 1992 2000 2004 2008
Year
Power delivery and dissipation will be prohibitive
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Courtesy, Intel
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Power density
Power Density (W/cm2)
10000
Rocket
Nozzle
1000
Nuclear
Reactor
100
8086
10 4004
Hot Plate
P6
8008 8085
Pentium® proc
386
286
486
8080
1
1970
1980
1990
2000
2010
Year
Power density too high to keep junctions at low temp
temp
Courtesy, Intel
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Not Only Microprocessors
Cell
Phone
Small
Signal RF
Power
RF
Power
Management
Analog
Baseband
Digital Cellular Market
(Phones Shipped)
Digital Baseband
(DSP + MCU)
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Year
1996
1998
2000
2003
2004
2005
2006
2007
2008
Units (M)
48
162
435
513
648
(703)
(776)
(836)
(889)
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Challenges in Digital Design
∝ (# Transistors)
∝ 1/(Transistor size)
“Macroscopic Issues”
“Microscopic Problems”
• Time-to-Market
• Millions of Gates
• High-Level Abstractions
• Reuse & IP: Portability
• Predictability
• etc.
• Ultra-high speed design
• Interconnect
• Noise, Crosstalk
• Reliability, Manufacturability
• Power Dissipation
• Clock distribution.
Everything Looks a Little Different
…and There’s a Lot of Them!
?
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EE134
10,000
10,000,000
100,000
100,000,000
Logic Tr./Chip
Tr./Staff Month.
1,000
1,000,000
10,000
10,000,000
100
100,000
Productivity
(K) Trans./Staff - Mo.
Complexity
Logic Transistor per Chip (M)
Productivity Trends
1,000
1,000,000
58%/Yr. compounded
Complexity growth rate
10
10,000
100
100,000
1,0001
10
10,000
x
0.1
100
xx
0.01
10
xx
x
1
1,000
21%/Yr. compound
Productivity growth rate
x
x
0.1
100
0.01
10
2009
2007
2005
2003
2001
1999
1997
1995
1993
1991
1989
1987
1985
1983
1981
0.001
1
Source: Sematech
Complexity outpaces design productivity
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Courtesy, ITRS Roadmap
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Why Scaling?
Technology shrinks by 0.7/generation
! With every generation can integrate 2x more
functions per chip; chip cost does not
increase significantly
! Cost of a function decreases by 2x
! But …
!
" How to design chips with more and more functions?
" Design engineering population does not double every
two years…
!
Hence, a need for more efficient design
methods
" Exploit different levels of abstraction
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EE134
Design Abstraction Levels
SYSTEM
MODULE
+
GATE
CIRCUIT
DEVICE
G
S
n+
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D
n+
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Next Class
! Introduce
basic metrics for design of
integrated circuits – how to measure delay,
power, etc.
! Introduction
to IC manufacturing and
design.
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