TI-EDA: Who are we and what do we do?
EDA Development is a central organization in TI responsible for defining and developing
EDA methodology and solutions for worldwide TI Businesses across process technology
nodes ranging from 180nm to 5nm. The EDA solutions span across different domains of IC
development covering IP and SoC development. The team supports all Analog and
Embedded business groups across worldwide sites. The team’s charter includes providing
differentiated solutions by defining and developing in-house tools, flows and
methodologies augmenting the tools available from EDA vendors. EDA team adopts data
analytics, machine learning together with a deep understanding of IC development domain
to build automation that enables design execution with better efficiency and faster time to
market.
As an EDA engineer, you will be working on design, development, and deployment of EDA
methodologies and solutions by collaborating with IP/SoC design experts and with handson experience on state-of-the-art vendor tools across different domains.
1. EDA Solutions for Analog Design: The team is responsible for defining and
developing complete Design Environment with comprehensive toolset that makes
up the complete custom IC development process, working cohesively with TI’s
technology nodes.
a. Frontend: Frontend schematic capture, Design Verification, top level
integration and custom reliability tools such as Cadence Virtuoso Schematic
Capture, Maestro Suite, Spectre, AMS Designer, SimVision, VIVA and a suite
of custom TI reliability analysis tools.
b. Backend: Backend layout, physical verification, extraction, and custom
reliability tools such as Cadence Virtuoso-XL, VSR, Quantus, Assura, PVS,
VPS, Ethan, R3D, Peakview and a suite of custom TI ESD/EMIR tools.
c. Reliability: methodology definition, EDA tooling and design analysis for
assessing various Reliability phenomena for transistors and interconnects
across various process nodes.
d. Electro Static Discharge (ESD): The team is responsible for defining and
developing EDA solutions for ESD analysis of SoC.
e. AI-driven agentic design flows around analog design tools.
2. EDA Solutions for Digital Design:
a. Front-End Design: Front-end Design team delivers RTL design, integration,
and verification solutions.
b. Physical Design: Physical Design team delivers RTL2GDS solutions for
leading-edge products.
c. Timing: The team is responsible for developing EDA solutions for Parasitic
extraction and Timing analysis methodologies to ensure first pass silicon.
d. Power & IR-Drop: methodology definition, EDA tooling and design analysis for
assessing the IR-drop impact on digital designs across high-performance to
extreme low-power SoCs on various technology nodes.
e. IP Solutions and Design Infrastructure: The team delivers design, integration,
and verification solutions for foundational IPs (logic, memory & IO), analog &
mixed signal IPs and digital sub-systems.
f. AI-driven agentic design flows around digital design tools.
3. Design Automation and Infrastructure: Develop the infrastructure, automation
frameworks, and AI-enabled platforms that support scalable EDA solutions across
the organization. Accelerate the development of scalable design solutions powered
by data and AI. Develop both infrastructural and specific analytical software
essential to do end-to-end Pre-Silicon designs/verification and Post-Silicon analysis
What to prepare for in the interview
4. Electronics (if you are from EE/EEE/ECE/EIE)
a. Basic electronics:
i. Basic electronic devices: MOS, CMOS, Diode
ii. Basic circuits with MOS, CMOS, CMOS Inverter, RC circuits, diodes.
CMOS Inverter. Operational understanding, explaining
voltage/current.
iii. References – regular course textbooks, any device physics book,
basic electrical circuits
b. Digital Circuits
i. Use of gates, latches and flip-flops to realize digital logic.
ii. Conversion of gates, implementation of simple digital logic with basic
gates
iii. Truth tables
iv. References – regular course textbook. Eg: Morris Mano “Digital
Design” or similar
5. Data/SW/AI/ML
a. AI/ML
i. Foundational: Data cleanup and component analysis, Supervised and
unsupervised learning basic concepts
ii. based on our current use of LLM based flows (if they have worked on
such projects): Building agentic workflows, How RAG works (Vector
embeddings, index lookups)
b. DS/algo – Foundational data structures are still important (stacks, queues,
heaps, trees etc). However graphs should be stressed upon, given their
extensive use in the AI domain
c. Databases – sql/nosql basic concepts and differences
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