1
6.012 Microelectronic Devices and Circuits
Formula Sheet for the Final Exam, Fall 2009
Parameter Values:
Periodic Table:
q = 1.6x10"19 Coul
#o = 8.854 x10"14 F/cm
#r,Si = 11.7, #Si $ 10"12 F/cm
n i [ Si@R.T ] $ 1010 cm "3
kT /q $ 0.025 V; ( kT /q) ln10 $ 0.06 V
1µm = 1x10"4 cm
Drift/Diffusion:
!
Conductivity :
" = q(µ e n + µ h p)
$C
Fm = #Dm m
$x
Dm kT
=
µm
q
The Five Basic Equations:
Electron continuity :
!
!
sx = ±µ m E x
Einstein relation :
IV
V
B
Al
Ga
In
C
Si
Ge
Sn
N
P
As
Sb
Electrostatics:
Drift velocity :
Diffusion flux :
III
Hole continuity :
Electron current density :
Hole current density :
Poisson's equation :
dE(x)
= # (x)
dx
d& (x)
%
= E(x)
dx
d 2& (x)
%"
= # (x)
dx 2
"
E(x) =
1
"
$ #(x)dx
& (x) = % $ E(x)dx
& (x) = %
1
"
$$ #(x)dxdx
"n(x,t) 1!"Je (x,t)
#
= gL (x,t) # [ n(x,t) $ p(x,t) # n i2 ] r(T)
"t
q "x
"p(x,t) 1 "Jh (x,t)
+
= gL (x,t) # [ n(x,t) $ p(x,t) # n i2 ] r(T)
"t
q "x
"n(x,t)
J e (x,t) = qµ e n(x,t)E(x,t) + qDe
"x
"p(x,t)
J h (x,t) = qµ h p(x,t)E(x,t) # qDh
"x
"E(x,t) q
= [ p(x,t) # n(x,t) + N d+ (x) # N a# (x)]
"x
%
Uniform doping, full ionization, TE
n - type, N d >> N a
!
no " N d # N a $ N D ,
kT N D
ln
q
ni
po = n i2 n o ,
%n =
n o = n i2 po ,
%p = #
p - type, N a >> N d
po " N a # N d $ N A ,
kT N A
ln
q
ni
Uniform optical excitation, uniform doping
!
n = n o + n'
p = po + p'
Low level injection, n',p' << p o + n o :
n' = p'
dn'
= gl (t) " ( po + n o + n') n' r
dt
dn'
n'
+
= gl (t)
dt # min
with # min $ ( po r)
"1
2
Flow problems (uniformly doped quasi-neutral regions with quasi-static excitation and low
level injection; p-type example):
d 2 n'(x)
n'(x)
1
Minority carrier excess :
"
= "
gL (x)
Le # De $ e
2
2
dx
Le
De
Minority carrier current density :
Majority carrier current density :
Electric field :
Majority carrier excess :
dn'(t)
dx
J h (x) = JTot " J e (x)
)
1 &
Dh
E x (x) %
J e (x)+
(J h (x) +
qµ h po '
De
*
, dE x (x)
p'(x) % n'(x) +
q dx
J e (x) % qDe
Short base, infinite lifetime limit:
d 2 n'(x)
1
1
Minority carrier excess :
" #
gL (x), n'(x) " #
2
dx
De
De
!
$$ g (x)dxdx
L
Non-uniformly doped semiconductor sample in thermal equilibrium
d 2" (x)
q
= {n i [e q" (x ) kT $ e$q" (x ) kT ] $ [ N d (x) $ N a (x)]}
2
dx
#
n o (x) = n ie q" (x ) kT , po (x) = n ie$q" (x ) kT , po (x)n o (x) = n i2
!
Depletion approximation for abrupt p-n junction:
!
$ 0
&
&#qN Ap
"(x) = %
& qN Dn
&' 0
w(v AB ) =
for
x < #x p
for #x p < x < 0
for 0 < x < x n
for
xn < x
N Ap x p = N Dn x n
(b ) (n # ( p =
2*Si (( b # v AB ) ( N Ap + N Dn )
q
N Ap N Dn
2q (( b # v AB ) N Ap N Dn
*Si
(N Ap + N Dn )
E pk =
qDP (v AB ) = #AqN Ap x p (v AB ) = #A 2q*Si (( b # v AB )
Ideal p-n junction diode i-v relation:
n2
n2
! n(-x p ) = i e qv AB / kT , n'(-x p ) = i (e qv AB / kT "1);
N Ap
N Ap
iD
# D
De & qv AB / kT
h
= Aq n i2 %
+
-1]
( [e
$ N Dn w n,eff N Ap w p,eff '
-x p
qQNR,p -side = Aq
- n'(x)dx,
-w p
p(x n ) =
w m,eff
)
+
= *
+
,
kT N Dn N Ap
ln
q
n i2
N Ap N Dn
(N
Ap
+ N Dn )
n i2 qv AB / kT
n2
e
, p'(x n ) = i (e qv AB / kT "1)
N Dn
N Dn
wm " x m
if L m >> w m
Lm tanh [( w m " x m ) Lm ] if L m ~ w m
Lm
if L m << w m
wn
qQNR,n -side = Aq - p'(x)dx,
xn
Note : p'(x) . n'(x) in QNRs
3
Large signal BJT Model in Forward Active Region (FAR):
(npn with base width modulation)
iB (v BE ,vCE ) = IBS (e qv BE / kT "1)
iC (v BE ,v BC ) = # F iB (v BE ,vCE ) [1+ $vCE ] = # F IBS (e qv BE / kT "1) [1+ $vCE ]
with :
IES
Aqn i2 & Dh
De )
IBS %
=
+
((
+,
(# F + 1) (# F + 1) ' N DE w E ,eff N AB w B,eff +*
Also,
(1" -B )
,F =
(1+ -E )
and # F .
When -B . 0 then , F .
(1" -B )
,F
, and
(1" , F )
and # F .
$%
1
VA
w B2 ,eff
and -B =
2 L2eB
w
D N
with -E = h / AB / B ,eff
De N DE w E ,eff
(-E + -B )
1
(1+ -E )
#F %
1
-E
MOS Capacitor:
!
[%# = 0
Flat - band voltage : VFB " vGB at which # (0) = # p$Si
in Si]
VFB = # p$Si $ # m
[%# = 2#
Threshold voltage : VT " vGC at which # (0) = $ # p$Si $ v BC
VT (v BC ) = VFB $ 2# p$Si +
1
2&Si qN A 2# p$Si $ v BC
*
Cox
{
[
Depletion region width at threshold :
x DT (v BC ) =
*
Cox
=
Oxide capacitance per unit area :
$ v BC
]
in Si
1/ 2
]}
[
2&Si 2# p$Si $ v BC
]
qN A
&ox
t ox
[&
= 3.9,
r,SiO2
&SiO2 ' 3.5x10$13 F /cm]
*
q*N = $Cox
[vGC $ VT (v BC )]
Inversion layer sheet charge density :
*
q*P = $Cox
[vGB $ VFB )]
Accumulation layer sheet charge density :
!
p$Si
Gradual Channel Approximation for MOSFET Characteristics:
(n-channel; strong inversion; with channel length modulation; no velocity saturation)
Only valid for vBS ≤ 0, vDS ≥ 0.
iG (vGS ,v DS ,v BS ) = 0,
iB (vGS ,v DS ,v BS ) = 0
%
+
0
for
++
K
2
iD (vGS ,v DS ,v BS ) = &
[vGS " VT (v BS )] [1+ $(v DS " v DS,sat )] for
+ 2#
%
v DS (
+
K
v
"
V
(v
)
"
#
for
&
) v DS
GS
T
BS
+'
'
2 *
with VT (v BS ) , VFB " 2- p"Si +
K,
W
*
µe Cox
,
L
*
Cox
,
1
2.SiqN A 2- p"Si " v BS
*
Cox
.ox
,
t ox
{
[
[vGS " VT (v BS )] < 0 < # v DS
0 < [vGS " VT (v BS )] < # v DS
0 < # v DS < [vGS " VT (v BS )]
1/ 2
]}
, v DS,sat ,
%
1 +
.SiqN A
# , 1+ * &
Cox + 2 2- p"Si " v BS
'
[
1
[vGS " VT (v BS )]
#
1/ 2
]
(
+
) ,
+*
$,
1
VA
4
Large Signal Model for MOSFETs Operated below Threshold (weak inversion):
(n-channel) Only valid for for vGS ≤ VT, vDS ≥ 0, vBS ≤ 0.
iG (vGS ,v DS ,v BS ) = 0,
iB (vGS ,v DS ,v BS ) " 0
iD,s#t (vGS ,v DS ,v BS ) " IS,s#t e
q { vGS #VT (v BS )} n kT
with Vt $
(1# e
#qv DS / kT
)
% kT ( 2 2+SiqN A
W
K o Vt2 where IS,s#t $
µe ' *
=
2 L & q ) 2, p # v BS
2 2, p # v BS
2+SiqN A
kT
W
*
, K o $ µe Cox
, -$
, n " 1+
*
q
L
Cox
2 2, p # v BS
Large Signal Model for MOSFETs Reaching Velocity Saturation at Small vDS:
(n-channel) Only valid for vBS ≤ 0, vDS ≥ 0. Neglects vDS/2 relative to (vGS-VT).
!
Saturation model : sy (E y ) = µe E y if E y " E crit , sy (E y ) = µe E crit # ssat if E y $ E crit
iG (vGS ,v DS ,v BS ) = 0,
iB (vGS ,v DS ,v BS ) = 0
)
+
0
for
(vGS & VT ) < 0 < v DS
+
*
iD (vGS ,v DS ,v BS ) % *W ssat Cox [vGS & VT (v BS )][1+ '(v DS & ( crit L)] for 0 < (vGS & VT ), ( crit L < v DS
+
W
*
µe Cox
for 0 < (vGS & VT ), v DS < ( crit L
[vGS & VT (v BS )]v DS
+
,
L
with ' # 1 VA
CMOS Performance
Transfer characteristic:
!
In general : VLO = 0,
V
Symmetry : VM = DD
2
V HI = VDD ,
ION = 0,
and NM LO = NM HI
"
IOFF = 0
K n = K p and VTp = VTn
Minimum size gate : Ln = L p = Lmin , W n = W min , W p = (µn µ p )W n
!
[or W = (s
Switching times and gate delay (no velocity saturation):
2CLVDD
" Ch arg e = " Disch arg e =
2
K n [VDD # VTn ]
*
*
CL = n (W n Ln + W p L p )Cox
= 3nW min Lmin Cox
" Min.Cycle = " Ch arg e + " Disch arg e =
assumes µe = 2µh
12nL2minVDD
2
µe [VDD # VTn ]
Dynamic power dissipation (no velocity saturation):
2
DD
Pdyn @ f max = CLV
!
PDdyn @ f max =
!
2
µ W $ V [V % VTn ]
CLVDD
f max "
" e min ox DD DD
# Min.Cycle
t ox Lmin
Pdyn @ f max
InverterArea
"
Pdyn @ f max
W min Lmin
2
µ $ V [V % VTn ]
" e ox DD 2DD
t ox Lmin
2
p
sat,n
ssat, p )W n
]
5
Switching times and gate delay (full velocity saturation):
" Ch arg e = " Disch arg e =
CLVDD
*
W min ssat Cox
[VDD # VTn ]
*
*
CL = n (W n Ln + W p L p )Cox
= 2nW min Lmin Cox
" Min.Cycle = " Ch arg e + " Disch arg e =
assumes ssat,e = ssat,h
4nLminVDD
ssat [VDD # VTn ]
Dynamic power dissipation per gate (full velocity saturation):
!
2
Pdyn @ f max = CLVDD
f max "
PDdyn @ f max =
2
s W $ V [V % VTn ]
CLVDD
" sat min ox DD DD
# Min.Cycle
t ox
Pdyn @ f max
InverterArea
"
Pdyn @ f max
W min Lmin
"
ssat$oxVDD [VDD % VTn ]
t ox L2
Static power dissipation per gate
!
Pstatic = VDD ID,off " VDD
PDstatic =
W min
# qN
µe Vt2 Si A e{$VT } nVt
Lmin
2 VBS
Pstatic
V
# qN
$V
nV
% 2DD µe Vt2 Si A e{ T } t
Inverter Area
Lmin
2 VBS
CMOS Scaling Rules - Constant electric field scaling
! Scaled Dimensions : Lmin " Lmin s
Scaled Voltages : VDD " VDD s
Consequences :
*
*
Cox
" sCox
# "# s
W "W s
VBS " VBS s
K " sK
Pdyn " Pdyn s
PDstatic " s2 e( s$1)VT
s n Vt
t ox " t ox s
NA " s NA
VT " VT s
2
PDdyn @ f max " PDdyn @ f max
PDstatic
Device transit times
w B2
w B2
Short Base Diode transit time : " b =
=
2Dmin,B 2µmin,BVthermal
!
!
Channel transit time, MOSFET w.o. velocity saturation : " Ch =
2
L2
3 µCh VGS # VT
Channel transit time, MOSFET with velocity saturation : " Ch =
L
ssat
6
Small Signal Linear Equivalent Circuits:
•
p-n Diode (n+-p doping assumed for Cd)
gd "
#iD
#v AB
=
Q
q
q ID
IS e qVAB / kT $
,
kT
kT
Cd = Cdp + Cdf ,
2
q%Si N Ap
q I [w p ' x p ]
where Cdp (VAB ) = A
, and Cdf (VAB ) = D
= gd ( d
2 (& b ' VAB )
kT
2De
• BJT (in FAR)
q
qI
g
q IC
gm =
" o IBS e qVBE kT [1+ #VCE ] $ C ,
g% = m =
kT
kT
"o
" o kT
&
I )
go = " o IBS [e qVBE kT + 1] # $ # IC ( or $ C +
VA *
'
!
w B2
C% = gm , b + B-E depletion cap. with , b ,
2De
•
p
' xp]
2De
Cµ : B-C depletion cap.
MOSFET (strong inversion; in saturation, no velocity saturation)
gm = K [VGS " VT (VBS )] [1+ #VDS ] $
!
with ( d
[w
"
go =
K
2
[VGS " VT (VBS )] # $ # ID
2
gmb = + gm = + 2K ID
2K ID
%
ID (
' or $
*
VA )
&
with + , "
-VT
-v BS
=
Q
1
*
Cox
.SiqN A
q/ p " VBS
2
*
Cgs = W L Cox
,
Csb ,Cgb ,Cdb : depletion capacitances
3
*
*
Cgd = W Cgd
, where Cgd
is the G-D fringing and overlap capacitance per unit gate length (parasitic)
•
!
MOSFET (strong inversion; in saturation with full velocity saturation)
*
gm = W ssat Cox
,
go = " ID =
*
ox
Cgs = W L C ,
ID
,
VA
gmb = # gm
with # $ %
&VT
&v BS
=
Q
1
*
Cox
'SiqN A
q( p % VBS
Csb ,Cgb ,Cdb : depletion capacitances
*
*
Cgd = W Cgd
, where Cgd
is the G-D fringing and overlap capacitance per unit gate length (parasitic)
•
!
MOSFET (operated sub-threshold; in forward active region; only valid for vbs = 0)
gm =
q ID
,
n kT
#
Cgs = W L Cox
go = " ID =
1+
ID
VA
#2
2Cox
(VGS $ VFB ) ,
%SiqN A
Cdb :
drain region depletion capacitance
*
*
Cgd = W Cgd
, where Cgd
is the G-D fringing and overlap capacitance per unit gate length (parasitic)
!
2
7
Single transistor analog circuit building block stages
Voltage
gain, Av
BIPOLAR
Current
gain, Ai
$ gl
"
[go + gl ]
gm
# "gm rl' )
(
[ go + gl ]
gm
Common base
# gm rl' )
(
[ go + gl ]
[gm + g% ]
Emitter follower
#1
[gm + g% + go + gl ]
r
Emitter degeneracy
#" l
RF
[g " GF ] # "g R
Shunt feedback
" m
m F
[go + GF ]
Common emitter
"
Common source
"
[gm + go + gl ]
Source degeneracy
(series feedback)
Shunt feedback
*"
"
r%
[$ + 1]
# [$ + 1] ro
rt + r%
[$ + 1]
#$
# r% + [$ + 1] RF
# ro
gl
GF
1
&
1 )
ro || RF ( =
+
' go + GF *
"
g% + GF [1" Av ]
Current
gain, Ai
Input
resistance, R i
#
#
*1
*1
rl
RF
[gm " GF ]
[go + GF ]
#
r% + [$ + 1] rl'
gm
= "gm rl' )
(
[ go + gl ]
[gm ]
Source follower
r%
Output
resistance, R o
& 1)
ro (= +
' go *
$ gl
#$
[go + gl ]
* [ gm + gmb ] rl'
Common gate
Input
resistance, R i
#1
Voltage
gain, Av
MOSFET
!
Note: gl ≡ gsl + gel,; gl’ ≡ go + gl
* "gm RF
"
*
1
[ gm + gmb ]
Output
resistance, R o
$ 1'
ro &= )
% go (
+ [ g + gmb + go ] .
* ro ,1+ m
/
gt
0
1
1
*
[gm + go + gl ] gm
#
#
#
#
* ro
gl
GF
1
GF [1" Av ]
$
'
1
ro || RF &=
)
% [ go + GF ] (
OCTC/SCTC Methods for Estimating Amplifier Bandwidth
!
-1
OCTC estimate of " HI:
!
" HI
-1
&
)
&
)
$1
# (% [" i ] + = (% RiCi +
' i
*
' i
*
with Ri defined as the equivalent resistance in parallel with Ci with all other parasitic
device capacitors (Cπ's, Cµ's, Cgs's, Cgd's, etc.) open circuited.
SCTC estimate of " LO:
" LO #
$" = $ [ R C ]
j
j
j
%1
j
j
with Rj defined as the equivalent resistance in parallel with Cj with all other baising
and coupling capacitors (CΙ's, CO's, CE's, CS's, etc.) short circuited.
!
8
Difference- and Common-mode signals
Given two signals, v1 and v2, we can decompose them into two new signals, one (vC)
that is common to both v1 and v2, and the other (vD) that makes an equal, but opposite
polarity contribution to v1 and v2:
v D " v1 # v 2
and
vC "
[v1 + v 2 ]
2
$
$%
v1 = vC +
Short circuit current gain unity gain frequency, fT
!
(
gm Cgs = 3µCh (VGS $ VT ) 2L2 = 3sCh 2L
*
*
*
"t # )
gm Cgs = W ssat Cox
W LCox
= ssat L
*
2
+ gm (C% + Cµ ) ; limI c &' gm (C% + Cµ ) # 2Dmin,B w B
[
]
vD
2
and
v1 = vC #
vD
2
MOSFET, no vel. sat.,
*
1
MOSFET, w. vel. sat.- =
/ tr
*
BJT, large I C
.
!
Revised 12/9/09
MIT OpenCourseWare
http://ocw.mit.edu
6.012 Microelectronic Devices and Circuits
Fall 2009
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