STL26NM60N N-channel 600 V, 0.160 Ω, 19 A PowerFLAT™ 8x8 HV ultra low gate charge MDmesh™ II Power MOSFET Features Order code VDSS @ TJmax RDS(on) max 650 V < 0.185 Ω STL26NM60N ID 3 3 19 A (1) "OTTOM VIEW 3 ' $ 1. The value is rated according to Rthj-case ■ 100% avalanche tested ■ Low input capacitance and gate charge ■ Low gate input resistance 0OWER&,!4 X (6 Applications ■ Switching applications Description Figure 1. This device is an N-channel MDmesh™ V Power MOSFET based on an innovative proprietary vertical process technology, which is combined with STMicroelectronics’ well-known PowerMESH™ horizontal layout structure. The resulting product has extremely low onresistance, which is unmatched among siliconbased Power MOSFETs, making it especially suitable for applications which require superior power density and outstanding efficiency. Internal schematic diagram $ ' 3 !-V Table 1. Device summary Order code Marking Package Packaging STL26NM60N 26NM60N PowerFLAT™ 8x8 HV Tape and reel November 2011 Doc ID 18472 Rev 2 1/14 www.st.com 14 Contents STL26NM60N Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ............................. 6 3 Test circuits 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2/14 .............................................. 8 Doc ID 18472 Rev 2 STL26NM60N 1 Electrical ratings Electrical ratings Table 2. Symbol Absolute maximum ratings Parameter Value Unit VDS Drain-source voltage (VGS = 0) 600 V VGS Gate-source voltage ± 25 V Drain current (continuous) at TC = 25 °C 19 A ID (1) Drain current (continuous) at TC = 100 °C 12 A ID(2) Drain current (continuous) at Tamb = 25 °C 2.7 A ID(2) Drain current (continuous) at Tamb = 100 °C 1.7 A Drain current (pulsed) 10.8 A 3 W ID IDM (1) (2),(3) PTOT (2) Total dissipation at Tamb = 25 °C PTOT(1) Total dissipation at TC = 25 °C 125 W IAR Avalanche current, repetitive or notrepetitive (pulse width limited by Tj max) 7.5 A EAS Single pulse avalanche energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) 400 mJ Peak diode recovery voltage slope 15 V/ns - 55 to 150 °C 150 °C Value Unit dv/dt (3) Tstg Tj Storage temperature Max. operating junction temperature 1. The value is rated according to Rthj-case 2. When mounted on FR-4 board of inch², 2oz Cu 3. ISD ≤ 19 A, di/dt ≤ 400 A/µs, VDS peak≤V(BR)DSS, VDD = 80% V(BR)DSS Table 3. Symbol Thermal data Parameter Rthj-case Thermal resistance junction-case max 0.83 °C/W Rthj-amb(1) Thermal resistance junction-amb max 45 °C/W 1. When mounted on 1inch² FR-4 board, 2 oz Cu Doc ID 18472 Rev 2 3/14 Electrical characteristics 2 STL26NM60N Electrical characteristics (TC = 25 °C unless otherwise specified) Table 4. Symbol V(BR)DSS On /off states Parameter Test conditions Drain-source breakdown voltage ID = 1 mA, VGS = 0 Min. Typ. Max. Unit 600 V IDSS VDS = 600 V Zero gate voltage drain current (VGS = 0) VDS =600 V, TC=125 °C 1 100 µA µA IGSS Gate-body leakage current (VDS = 0) 100 nA 4 5 V 0.160 0.185 Ω Min. Typ. Max. Unit VDS = 50 V, f = 1 MHz, VGS = 0 - 1800 115 1.1 - pF pF pF VDS = 0 to 480 V, VGS = 0 - 310 - pF VGS = ± 25 V VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA RDS(on) Static drain-source on resistance Table 5. Symbol Ciss Coss Crss 3 VGS = 10 V, ID = 10 A Dynamic Parameter Input capacitance Output capacitance Reverse transfer capacitance Equivalent Coss(eq)(1) capacitance time related Test conditions RG Intrinsic gate resistance f = 1 MHz open drain - 2.8 - Ω Qg Qgs Qgd Total gate charge Gate-source charge Gate-drain charge VDD = 480 V, ID = 19 A, VGS = 10 V (see Figure 14) - 60 8.5 30 - nC nC nC 1. Coss eq. time related is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS 4/14 Doc ID 18472 Rev 2 STL26NM60N Electrical characteristics Table 6. Symbol td(on) tr td(off) tf Table 7. Switching times Parameter Test conditions Turn-on delay time Rise time Turn-off delay time Fall time VDD = 300 V, ID = 10 A, RG = 4.7 Ω, VGS = 10 V (see Figure 15), (see Figure 18) Parameter ISD ISDM (1) Source-drain current Source-drain current (pulsed) VSD (2) Forward on voltage IRRM trr Qrr IRRM Typ. - 13 25 85 50 Min. Typ. Max Unit - ns ns ns ns Source drain diode Symbol trr Qrr Min. Test conditions Max. Unit - 19 76 A A ISD = 19 A, VGS = 0 - 1.5 V Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 19 A, di/dt = 100 A/µs VDD = 100 V (see Figure 15) - 370 5.8 31.5 ns µC A Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 19 A, di/dt = 100 A/µs VDD = 100 V, Tj = 150 °C (see Figure 15) - 450 7.5 32.5 ns µC A 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration = 300 µs, duty cycle 1.5% Doc ID 18472 Rev 2 5/14 Electrical characteristics STL26NM60N 2.1 Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. AM08987v1 ID (A) Zth PowerFLAT 8x8 HV K δ=0.5 ) 0.2 on a is Tj=150°C Tc=25°C Single pulse 10µs DS ( Op Lim era ite tion d by in th m is a ax R re 10 0.1 100µs -1 10 0.05 0.02 1 1ms 0.01 Single pulse 10ms 0.1 0.1 Thermal impedance -2 10 1 100 VDS(V) 10 -5 10 -4 -3 10 10 -2 10 tp (s) Figure 4. Output characteristics Figure 5. Transfer characteristics Figure 6. Normalized VDS vs temperature Figure 7. Static drain-source on resistance AM09028v1 VDS (norm) ID=1mA 1.10 1.08 AM08989v1 RDS(on) (Ω) 0.168 VGS=10V 0.166 1.06 0.164 1.04 0.162 1.02 0.160 1.00 6/14 0.98 0.158 0.96 0.156 0.94 0.92 -50 -25 0.152 0 0.154 0 25 50 75 100 TJ(°C) Doc ID 18472 Rev 2 2 4 6 8 10 12 14 16 18 20 ID(A) STL26NM60N Figure 8. Electrical characteristics Gate charge vs gate-source voltage Figure 9. AM08990v1 VGS (V) VDD=480V ID=19A 12 500 VDS 10 Capacitance variations AM03319v1 C (pF) 10000 400 Ciss 1000 8 300 6 100 Coss 200 4 100 2 0 0 20 10 40 30 50 10 Crss 1 0.1 0 Qg(nC) 60 Figure 10. Normalized gate threshold voltage vs temperature AM08991v1 VGS(th) (norm) 1 10 100 VDS(V) Figure 11. Normalized on resistance vs temperature AM08992v1 RDS(on) (norm) ID=250µA 1.10 VGS=10V ID=10A 2.1 1.9 1.00 1.7 1.5 0.90 1.3 1.1 0.80 0.9 0.70 -50 -25 0.5 -50 -25 0.7 0 25 75 100 125 TJ(°C) 50 0 25 50 75 100 TJ(°C) Figure 12. Source-drain diode forward characteristics AM08993v1 VSD (V) 1.4 TJ=-50°C 1.2 TJ=25°C 1.0 0.8 0.6 TJ=150°C 0.4 0.2 0 0 4 8 12 16 20 ISD(A) Doc ID 18472 Rev 2 7/14 Test circuits 3 STL26NM60N Test circuits Figure 13. Switching times test circuit for resistive load Figure 14. Gate charge test circuit VDD 12V 47kΩ 1kΩ 100nF 3.3 μF 2200 RL μF VGS IG=CONST VDD 100Ω Vi=20V=VGMAX VD RG 2200 μF D.U.T. D.U.T. VG 2.7kΩ PW 47kΩ 1kΩ PW AM01468v1 AM01469v1 Figure 15. Test circuit for inductive load Figure 16. Unclamped inductive load test switching and diode recovery times circuit A A D.U.T. FAST DIODE B B L A D G VD L=100μH S 3.3 μF B 25 Ω 1000 μF D VDD 2200 μF 3.3 μF VDD ID G RG S Vi D.U.T. Pw AM01470v1 Figure 17. Unclamped inductive waveform AM01471v1 Figure 18. Switching time waveform ton V(BR)DSS tdon VD toff tr tdoff tf 90% 90% IDM 10% ID VDD 10% 0 VDD VDS 90% VGS AM01472v1 8/14 0 Doc ID 18472 Rev 2 10% AM01473v1 STL26NM60N 4 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. Doc ID 18472 Rev 2 9/14 Package mechanical data Table 8. STL26NM60N PowerFLAT™ 8x8 HV mechanical data mm Dim. Min. Typ. Max. A 0.80 0.90 1.00 A1 0.00 0.02 0.05 b 0.95 1.00 1.05 D 8.00 E 8.00 D2 7.05 7.20 7.30 E2 4.15 4.30 4.40 e L 10/14 2.00 0.40 0.50 aaa 0.10 bbb 0.10 ccc 0.10 Doc ID 18472 Rev 2 0.60 STL26NM60N Package mechanical data Figure 19. PowerFLAT™ 8x8 HV drawing mechanical data BOTTOM VIEW b CA B L bbb 0.40 E2 PIN#1 ID D2 C A ccc C A1 0.20±0.008 SIDE VIEW SEATING PLANE 0.08 C D A B E INDEX AREA aaa C TOP VIEW aaa C 8222871_Rev_B Doc ID 18472 Rev 2 11/14 Package mechanical data STL26NM60N Figure 20. PowerFLAT™ 8x8 HV recommended footprint 0.60 7.70 4.40 7.30 2.00 1.05 Footprint 12/14 Doc ID 18472 Rev 2 STL26NM60N 5 Revision history Revision history Table 9. Document revision history Date Revision Changes 14-Feb-2011 1 First release. 03-Nov-2011 2 Section 4: Package mechanical data has been updated. Minor text changes. Doc ID 18472 Rev 2 13/14 STL26NM60N Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. 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