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Solution Manual of Power Electronics Con

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19-1.
Intrinsic temperature is reached when the intrinsic carrier density ni equals the lowest
doping density in the pn juinction structure (the n-side in this problem). Thus
È q! Eg 1 1 ˘
Ï
¸
14
10
ni(Ti) = Nd = 10 = 10 exp ÍÎ -! 2k ! Ì T ! -! 300˝ ˙˚
Ó i
˛
Solving for Ti using Eg = 1.1 eV, k = 1.4x10-23 [1/°K] yields
Ti = 262 °C or 535 °K.
1
1
19-2.
1
1
= 43.5 ohm-cm
N-side resistivity r n = q! m ! N =
-19
(1.6x10 )(1500)(1014)
n d
1
1
P-side resistivity r p = q! m ! N =
= 0.013 ohm-cm
-19
(1.6x10 )(500)(1018)
p a
13
-3
10
-3
19-3.
Material is n-type with Nd = 1013 cm-3 >> ni = 1010 cm-3. Hence use approximate
formulas given in Chapter 19.
2
ni
n = Nd = 1013 cm-3 ; p = N
d
2
2
1020
=
1013
= 107 cm-3
19-4.
po =
2
ni [300]
Nd
; 2po =
2
2
2 ni [300] = ni [300 + T]
2
ni [300! +! T]
Nd
;
È q! E Ï
˘
g 1 1 ¸˙
Í
10
10
2x10
= 10 exp Î -! 2k ! Ì T! -! 300˝ ˚
Ó
˛
q! Eg! 300
Solving for T yields T = (q! E ! -! k! 300! ln(2)) = 305.2 °K
g
D T = 305.2 - 300 = 5.2 °K.
q! V
q! V ! +! d V
19-5.
q! V1
I1 = Is exp( k! T
q! V1! +! d V
; 10 I1 = Is exp( k! T
) ;
k! T
d V = q ln(10) = 60 mV
19-6.
(a) xn(0) = depletion layer width on n-side at zero bias; xp(0) = depletion layer width
on p-side at zero bias.
xn(0) + xp(0) = Wo =
k! T ÈÍ Na! Nd˘˙
f c = q ln Í !
2 ˙
Î
ni ˚
2! e ! f c! (Na! +! Nd)
!
q! Na! Nd
È 1014! 1015˘
˙
= 0.026 ln ÍÎ !
20
˚
10
Conservation of charge: q Na xp = q Nd xn
(1)
= 0.54 eV
(2)
Solving (1) and (2) simultaneously gives using the numerical values given in the problem
statement gives:
W o = 2.8 microns ; xn(0) = 2.55 microns ; xp(0) = 0.25 microns
(b) Electric field profile triangular-shaped as shown in Fig. 19-9b. Maximum electric at
zero bias given by
2! f c
(2)! (0.54)
= 3,900 V/cm
Emax = W =
(2.8x10-4)
o
(c) From part a) f c = 0.54 eV
(d)
e
C(V)
A =
Wo
V
1! +! f
c
; C(V) = space-charge capacitance at reverse voltage V.
(11.7)(8.9x10-14)
=
= 3.7x10-9 F/cm2
2.8x10-4
(11.7)(8.9x10-14)
C(50)
=
= 3.8x10-10 F/cm2
A
50
2.8x10-4 1! +! 0.54
C(0)
A
qV
qV
0.7
(e) I = Is exp(kT ) ; exp( kT ) = exp (0.026 ) = 5x1011
È
Dnt
Dpt ˘˙
Í ! N ! t ! +! N ! t ˙ A
Î
a
d ˚
È
-6)
-6) ˘˙
Í
(38)(10
(13)(10
˙ (2) 2
= (1.6x10-19)(1020) ÍÎ !
! +!
15
-6
14
-6
(10 )(10 ) (10 )(10 )˚
I = (6.7x10-14 )(5x1011) = 34 mA
2
Is = q ni
Í
Is = 6.7x10-14 A ;
19-7.
r !L
L 0.02
Resistance R = A ; A = 0.01 = 2 cm-1
1
1
At 25 °C, Nd = 1014 >> ni so r = q! m ! N =
-19
n d (1.6x10 )(1500)(1014! )
= 41.7 W -cm
R(25 °C) = (41.7)(2) = 83.4 ohms
È (1.6x10-19)! (1.1) Ï 1
1 ¸ ˘˙
10
Í
Ì
˝
At 250 °C (523 °K), ni[523] = 10 exp Î -!
!
! -!
=
(2)(1.4x10-23) Ó 523 300˛ ˚
(1010)(7.6x103) = 7.6x1013 which is an appreciable fraction of Nd = 1014. Thus we
should solve Eqs. (19-2) and (19-3) exactly for no and po rather than using equations
similiar to Eq. (19-4). Solving Eqs. (19-2) and (19-3) for Nd >> Na yields
Nd È
no = 2 Í 1! +!
Î
2˘
4! ni
1! +! 2 ˙
Nd ˚
È
1014 Í
no = 2 ÍÎ 1! +!
˘
(4)(7.6x1013)2! ˙
˙ = 1.4x1014 and
1! +!
14
2
˚
(10 )
2
ni
and po = n . Putting in numerical values yields
o
5.8x1027
po =
= 5.8x1013
14
10
Assuming temperature-independent mobilities (not a valid assumption but no other
information is given in text or the problem statement), resistance is
(r 250 ! ° C)! ! L
1
;
(
r
250
°
C)
≈
q!
m
!
n
+!
A
n o! q! m p! po
1
=
= 26.2 W -cm ;
-19
14
(1.6x10 )(1500)(1.4x10 ! )! +! (1.6x10-19)(500)(5.8x1013! )
R(250 °C) =
R(250 °C) ≈ (26.2)(2) = 52.4 ohms
19-8.
2
e ! (Na! +! Nd)! EBD
(11.7)(8.9x1014)(1015! +! 1014)(3x105)2
BVBD =
=
2! q! Na! Nd
(2)(1.6x10-19)(1015)(1014)
= 3,340 volts
19-9.
2
4! f c ! BVBD
2
2
Emax = EBD ≈
2
W o! f c
2
4! BVBD
Wo
; Eq. (19-13); or f
=
2
! c
EBD
2
W o! BVBD
; E q. (19-11) ;
W 2(BVBD) =
!f c
2! BVBD
the square root yields W (BVBD) ≈ 2
EBD.
2
4! BVBD
Wo
Inserting f
=
and taking
2
! c
EBD
19-10.
Lp =
Dp! t =
(13)(10-6) = 36 microns ; Ln =
Dn! t =
(39)(10-6) = 62 microns
19-11.
Assume a one-sided step junction with Na >> Nd
Dp! t 1
Dp! t 2
q! V
2
q! V
2
exp(k! T ) ; I2 = q ni A N t
exp(k! T )
I1 = q n i A N t
d! 1
d! 2
I2
I1 =2=
t 1
t 2 ; Thus 4 t 2 = t 1
19-12.
2
s = q m p p + q m n n ; np = ni ; Combining yeilds s
2
ni
ds
dn = 0 = - q m p n2 + q m n ; Solving for n yields n = ni
p = 1010
1500
10
-3
10
500 = 1.7x10 cm ; n = 10
2
ni
= qm p n + qm nn
m p
m n and p = ni
m n
m p
500
9
-3
1500 = 6x10 cm ;
Thus minimum conductivity realized when silicon is slightly p-type.
Inserting p and n back into the equation for conductivity yields s min = 2 q ni m p! m n .
Putting in numerical values s min = (2)(1.6x10-19)(1010) (500)(1500)
= 2.8x10-6 mhos-cm
20-1.
microns
1.3x1017 1.3x1017
Nd = BV ! = 2500 = 5x1013 cm-3 ; W(2500 V) = (10-5)(2500) = 250
BD
microns
20-2.
Drift region length of 50 microns is much less than the 250 microns found in the previous
problem (20-1) for the same drift region doping density. Hence this must be a punchthrough structure and Eq. (20-9) applies.
(1.6x10-19)(5x1013)(5x10-3)2
5
-3
= 900 V
BVBD = (2x10 )(5x10 ) (2)(11.7)(8.9x10-14)
2
20-3.
2
q! A! ni ! Lp
k! T È I ˘
Von = Vj + Vdrift ; Vj = q ln ÍÎ ! I ˙˚ ; For one-sided step junction Is = ! N ! t
s
d o
(1.6x10-19)(2)(1010)2! (13)(2x10-6)
Evaluating Is yields
= 1.6x109- A
! (5x1013)(2x10-6)
Vd = K1 I + K2 (I)2/3 Eq. (20-16) with I = forward bias current through the diode.
Wd
5x10-3
K1 = q! m ! A! n =
(1.6x10-19)(900)(2)(1017)
o
b
3
K2 =
= 7.5x10-4
= 1.7x10-4
4
3
Wd
(5x10-3)4
=
3 2
(1.6x10-19)2! (900)3! (1017)2! (2)2! (2x10-6)
q2! m o! nb! A2! t o
;
Von in volts
1.6
•
1.4
I
0A
1
10
100
1000
3000
Vj
0V
0.53
0.59
0.65
0.71
0.74
Vdrift
0V
0.001
0.005
0.033
0.25
0.67
Von
0V
0.53
0.59
0.68
0.96
1.41
1.2
1
•
0.8
0.6
•
•
•
0.4
0.2
0
1
10
100
1000
Forward current in amperes
10000
20-4.
L
1
Von(t) = Rdrift I(t) >> Vj ≈1 V ; Rdrift = r A ; r = q! m ! N
n d
-3
L 5x10
1
= 85 ohm-cm ; A = 2
= 2.5x10-3
r =
-19
13
(1.6x10 )(1500)(5x10 )
a)
Rdrift = (85)(2.5x10-3) = 0.21 ohms ; I(t) = 2.5x108 t ; 0 < t < 4 microseconds
Von(t) = (0.21)(2.5x108 t ) = 5.3x107 t Volts ; 0 < t < 4 microseconds
Von(4 m s) = (5.3x107)(4x10-6) = 212 volts
Von(t) = Rdrift (t) I(t) ; Rdrift (t) = 0.21[1 - 2.5x107 t]
Von(t) = {0.21[1 - 2.5x107 t]} { 2.5x108 t } = 53[t - 0.25 t2] ; t in microseconds
b)
250
200
Von
in
volts
No carrier injection
150
100
50
With carrier injection
0
0
0.5
1
1.5
2
2.5
3
3.5
4
20-5.
IF
2000
toff = trr + t3 = trr + di /dt = trr +
= trr + 8 m s
2.5x108
R
2! t ! IF
-12
2 = 4x10-12(2000)2 = 16 m s
trr =
diR/dt ; t = 4x10 (BVBD)
trr =
(2)(1.6x10-5)(2x103)
= 16 m s ; toff = 8 m s + 16 m s = 24 m s
2.5x108
20-6.
Assume a non-punch-through structure for the Schottky diode.
1.3x1017
Nd = BV
BD
1.3x1017
=
150
= 8.7x1014 cm-3
W d = 10-5 BVBD = (10-5) (150) = 15 microns
20-7.
Vdrift = (100 A) (Rdrift) = 2 V ; Rdrift = 0.02 ohms ; 0.02 =
A =
2x10-3
= 0.42 cm2
-19
15
-2
! (1.6x10 )(1500)(10 )(2x10 )
1
L
q! m n! Nd A
20-8.
È 2! e ˘
˙
Use Eq. (20-9) to solve for Nd ; Nd = [EBD Wd - BVBD] Í
2˙
Í
Î q! Wd˚
(2)(11.7)(8.9x10-14)
5
-3
= Nd = 3.4x1014 cm-3
= [(2x10 )(2x10 ) - 300]
-19
-3
2
(1.6x10 )(2x10 )
W (npt)
(1.6x10
20-9.
W d(npt)
R
A npt = q! m n! Nnpt
W d(pt)
R
=
A pt
q! m n! Npt
)(2x10 )
; Nnpt = Nd of non-punch-throuth (npt) diode
;
Npt = Nd of punch-through (pt) diode
e ! EBD
W d(npt) = ! q! N
; Derived from Eqs. (19-11), (19-12), and (19-13)
npt
e ! EBD
W d(pt) = ! q! N
pt
2! q! Npt! BVBD
2
e ! EBD
È
Í
Í 1! _+!
Î
q! Npt
= e !E
BD
1! -!
2! q! Npt! BVBD˘˙
2
e ! EBD
Nnpt 2! BVBD
Nnpt
EBD
Npt
Npt
1
= W (npt) Wd(npt) N
=x= N
d
npt
npt
˙
˚
q! Nnpt 2! BVBD Npt
= e !E
BD EBD Nnpt
1
; Wd(pt) = Wd(npt) x [ 1! _+! 1! -! x]
If Npt << Nnpt (x << 1) Wd(pt) ≈ 0.5 Wd(npt) ; Eq. (20-10)
1
Limit of x [ 1! _+! 1! -! x] as x approaches is infinite for the plus root and 0.5 for the
minus root. Hence the minus root is the correct choice to use.
1
W
(npt)!
x! [ 1! -! ! 1! -! x]
R
d
A pt =
q! m n! Npt
=
1
W d(npt)! x! [ 1! -! ! 1! -! x] Nnpt
! Nnpt
q! m n! Npt
W d(npt) 1
R
1
= ! q! m ! N
[1 - 1! -! x ] = A
[1 - 1! -! x ]
2
npt x2
n npt x
d
dx
ÈÍ 1
-2
1
˘˙
Î ! x2! ! 1! -! x! ˚ = 0 = x3 [1 - 1! -! x ] + 2! x2! 1! -! x
8
8
Solving for x yields x = 9 i.e. Npt = 9 Nnpt ; Wd(pt) = 0.75 Wd(npt)
R
R
A npt = 0.84 A npt
A
20-10.
e A
Cjo = W (0) ; Area A determined by on-state voltage and current. Depletion-layer
d
width Wd(0) set by breakdown voltage. Wd(0) same for both diodes.
150
1! +! 0.7
W d(150) = Wd(0)
W d(0) =
15
(150)/(0.7)
= (10-5)(150) = 15 m m ;
≈1 m m
W d(150)
Schottky diode area ; Vdrift = 2 volts = q! m ! N ! A
I
n d Schottky F
Drift region doping density Nd same for both diodes. Nd =
= 8.7x1014 cm-3
1.3x1017
150
(1.5x10-3)(300)
ASchottky =
= 1.07 cm2
-19
14
(2)(1.6x10 )(1500)(8.7x10 )
PN junction diode area: Vdrift = 2 volts = K1 IF + K2 (IF)2/3 ; Eq. (20-16)
W d(150)
1.5x10-3
K1 = q! m ! A ! n =
o pn b
(1.6x10-19)(900)(Apn)(1017)
3
K2 =
4
W d(150)
=
3 2 2
q2! m o! nb! Apn! t o
3
10-4
= A
pn
(1.5x10-3)4
2
(1.6x10-19)2! (900)3! (1017)2! (Apn)! (2x10-6)
10-4
-4
-0.67
K2 = 2.4x10 (Apn)
; 2 volts = A (300) + 2.4x10-4 (Apn)-0.67 (300)0.67
pn
0.333
Apn = 0.015 + 0.00154 (Apn)
; Solve by successive approximation ;
Apn ≈ 0.017 cm2
Schottky diode Cjo =
(11.7)(8.9x10-14)(1.07)
10-4
≈ 11 nF = 0.011 m F
PN junction diode Cjo =
(11.7)(8.9x10-14)(0.017)
≈ 180 pF
10-4
20-11.
BVcyl
BVp
1
1
= 2 r 2 (1 + r ) ln (1 + r ) - 2r
BVcyl / BVp
1
•
0.9
•
• •
•
0.8
•
•
0.7
•
0.6
0.5
•
0.4
0.3
0.2
0.1
0
0.1
1
r = R/(2W n )
10
n
20-12.
BVcyl
BVp
950
= 1000 = 0.95 ; From graph in problem 20-11, r
R ≈ 12 Wn
R
≈ 6 = 2! W
n
21-1.
NPN BJT ; BVCEO =
BVCBO
BVCBO
;
PNP
BJT
;
BV
=
CEO
b 1/6
b 1/4
1 JB
0.9
•
*
0.8
0.7
BVCEO
BVCBO
0.6
•
*
•
*
• •
••
••
*
* *
**
*
0.5
•
*
0.4
0.3
PNP
•
*
NPN
• •
• ••
•
* *
* **
*
0.2
0.1
0
1
10
100
21-2.
The flow of large reverse base currents when emitter current is still flowing in the
forward direction will lead to emitter current crowding towards the center of the emitter.
This accenuates the possibility of second breakdown. See Fig. 21-8b.
When emitter-open switching is used, there is no emitter current and thus no emitter
current crowding and second breakdown is much less likely to occur.
21-3.
a)
Idealized BJT current and voltage waveforms in step-down converter
T/2
V
i (t)
C
V
I
d
t d,on
t ri
t fv
(t)
CE
o
t d,off
t rv
t fi
1 T
1
BJT power dissipation Pc = T Ûı ! vCE(t)! iC(t)! dt = {Eon + Esw }fs ; fs = T
0
T
1
40
Eon = VCE,on Io {2 + td,off - td,on} ≈ (2)(40) 2! f = f Joules
s
s
Esw = Eri + Efv + Erv + Efi
Eri =
Vd! Io! tri
2
=
(100)(40)(2x10-7)
= 4x10-4 Joules
2
Vd! Io! tfv
Efv =
2
(100)(40)(1x10-7)
=
= 2x10-4 Joules
2
Vd! Io! trv
Erv =
2
(100)(40)(1x10-7)
=
= 2x10-4 Joules
2
Efi =
Vd! Io! tfi
2
(100)(40)(2x10-7)
=
= 4x10-4 Joules
2
40
Esw = 1.2x10-3 Joules ; Pc = [ f + 1.2x10-3] fs = 40 + 1.2x10-3 fs
s
P
c
80
[watts]
40
f
0
s
33 kHz
b)
Tj = Rq ja Pc + Ta ; Pc,max =
fs,max =
(125! -! 40)
1.2x10-3
= 71 kHz
150! -! 25
1
= 125 watts = 40 + 1.2x10-3 fs,max
21-4.
From problem 21-3, Pc = {Eon + Esw }fs where Esw is proportional to the switching
times. If the switching times vary with temperature then Esw can be written as
0.4
Esw(Tj) = Esw(25 °C){1 + a[Tj - 25]} with a = (125! -! 25) = 4x10-3
110 - 50 = Rq ja {40 + 1.2x10-3[1+0.004(110-25)] (2.5x104)}
Rq ja = 0.75 °C/watt ; This represents an upper limit.
21-5.
Beta begins to drop when the excessd carrier density in the base becomes comparable to
the doping density in the base, i.e. nbase(x) ≈Na in an NPN BJT.
IC =
q! Dn! Na! A
(1.6x10-19)(38)(1016)(1)
=
= 200 A
! Wb
(3x10-4)
21-6.
The diode can carry the larger current. The lateral voltage drops in the BJT base limit the
maximum current that the transistor can carry. These lateral voltage drops lead to emitter
current crowding. The diode has no such limitation.
21-7.
The base doping is not much larger than the collector doping so that the CB depletion
21-7.
The base doping is not much larger than the collector doping so that the CB depletion
layer protrudes a significant amount into the base. This encroachment may stretch across
the base and reach the EB depletion layer before the desired blocking voltage is reached.
At reach-through xp will equal the difference between the base width WB and the baseside protusion of the base-emitter depletion layer width WEB,depl.The reach-through
voltage is approximately estimated as shown below.
Estimate of base-emitter base-side protusion = WEB,depl at zero bias.
2! e ! f c! (NaB! +! NdE)
È NaB! NdE˘
k! T
Í
˙
W o,EB =
; f cE = q ln Í !
! q! NaB! NdE
˙
2
Î
˚
ni
È 1034˘
f cE = 0.26 ln ÍÎ ! 20˙˚ = 0.84 V
10
W o,EB =
(2)(11.7)(8.9x10-14)(0.84)(1019! +! 1015)
= 0.33 microns
(1.6x10-19)(1019)(1015)
Estimate of collector-base base-side protusion of WCB,depl.
V
= xp + xn ;
c
W(V)
xp = protrusion of CB depletion layer into p-type base region. xp = 11 using xp Na
xn Nd (charge neutrality).
CB depletion layer thickness W(V) = Wo,CB
=
1! +! f
2! e ! f cC! (NaB! +! NdC)
È NaB! NdC˘
k! T
Í
˙
; f cC = q ln Í !
W o,CB =
! q! NaB! NdC
˙
2
Î
˚
ni
È 1029˘
f cC = 0.26 ln ÍÎ ! 20˙˚ = 0.54 V
10
W o,CB =
(2)(11.7)(8.9x10-14)(0.54)(1014! +! 1015)
= 2.8 microns
(1.6x10-19)(1014)(1015)
V
{(3 - 0.33)x10-4}(11) = 2.8x10-4 1! +! 0.54 : Solving for V yields V = 59 volts.
Reach-through voltage of 59 V is much less than the expected value of BVBD = 1000 V.
21-8.
BVEBO = 10 V =
1.3x1017
; NaB = acceptor doping density in base = 1.3x1016 cm-3
! NaB
1.3x1017
1/4
1/4
BVCBO = b
BVCEO = (5) (1000) = ≈1500 Volts ≈ ! N
dC
13
-3
NdC = collector drift region donor density = 8.7x10 cn
Set base width Wbase by calculating the protrusion, xp, of the CB depletion layer into the
base at VCB = 1500 volts = BVCBO; Wbase = xp(BVCBO)
Approximate width of CB depletion layer at breakdown WCB(BVCBO) ≈(10-5)(1500)
= 150 m m
xp(BVCBO) =
xn(BVCBO)! NdC
NaB
8.7x1013
= xn(BVCBO)
= xn(BVCBO) 6.7x10-3
16
1.3x10
xp(BVCBO) << xn(BVCBO) so xn(BVCBO) ≈WCB(BVCBO) ≈ 150 m m
Hence xp(BVCBO) = (1.5x10-2 cm)(6.7x10-3) = 1 micron = Wbase
21-9.
Beta = 150 = b D b M + b D + b M = 20 b M + 20 + b M
b M=
150! -! 20
= 6.2
21
21-10.
Must first ascertain the operating states of the two transistors.Two likely choices
including (1) driver BJT saturated and main BJT active and (2) driver BJT and main BJT
both saturated. Initially assume driver BJT saturated and main BJT active.
C
0.02 W
0.6 V
10 I
+
B
B,M
+
0.8 V
I B,M
+
0.8 V
E
10 IB,M + IB,M = 100 A
IB,M = IC,D = 9.1A
IC,M = 91 A
VCE,D = 0.2 +(.02)(9.1) = 0.382 V
VCE,M = VCE,D + 0.8 V = 1.18 v
But a saturated main BJT with I C,M = 91 A
going through 0.02 ohms generates
a voltage drop of 1.8 V which is > 1.18 V.
Hence main BJT must be saturated.
C
0.02 W
0.6 V
0.02 W
0.6 V
+
+
B
+
0.8 V
I
-
C,M
I B,M
+
0.8 V
E
Neglecting IB,D
IC,M + IC,D = 100 A
(.02)I C,M -0.6 = (.02) I C,D +0.2
IC,D = 30 A ; IC,M = 70 A
VCE,M = 0.2 + (70)(.02) = 1.6 V
PDarl = VCE,M [IC,M + IC,D ]
PDarl = (1.6 V)(100 A) = 160 W
E
21-11.
e ! AE
CEBO = W
EBO
;
e ! AC
CCBO = W
CBO
W EBO = zero-bias emitter-base depletion layer thickness
W CBO = zero-bias collector-base depletion layer thickness
2! e ! f cE! (NaB! +! NdE)
È NaB! NdE˘
k! T
Í
˙
; f cE = q ln Í !
! q! NaB! NdE
˙
2
Î
˚
ni
(1019)(1016)˘˙
!
˚ = 0.89 V ;
1020
W EBO =
È
f cE = 0.026 ln ÍÎ
W EBO =
CEBO =
(2)(11.7)(8.9x10-14)(0.89)(1019! +! 1016)
= 0.34 microns
(1.6x10-19)(1019)(1016)
(11.7)(8.9x10-14)(0.3)
= 9.2 nF
3.4x10-5
W CBO =
f cC = 0.026 ln ÍÎ
È
2! e ! f cC! (NaB! +! NdC)
È NaB! ! NdC˘
k! T
Í
˙
;
f
=
ln
q
! q! NaB! NdC
Í !
˙
2
cC
Î
˚
ni
(1.3x1016)(8.7x1013)˘˙
!
˚ = 0.6 V ;
1020
W CBO =
CCBO =
(2)(11.7)(8.9x10-14)(0.6)(1.3x1016! +! 8.7x1013)
= 2.1 microns
(1.6x10-19)(1.3x1016)(8.7x1013)
(11.7)(8.9x10-14)(3)
= 14.8 nF
2.1x10-4
21-12.
Equivalent circuit for turn-on delay time, td,on, calculation.
V
C CB
10 W
+
V
in
+
-
C
BE
in
8V
VBE
-8 V
t
-
È -t ˘
VBE(t) = 8 - 16 exp ÍÎ ! t ˙˚
; t = (10 W )(CBE + CCB)
È 16 ˘
At t = td,on VBE(td,on) = 0.7 V ; td,on = t ln ÍÎ 7.3˙˚
The space-charge capacitances are nonlinear functions of the voltages across them. Need
to find an average value for each of the two capacitors. During the td,on interval, the
voltage VCB changes from 108 V to 100 volts and thus will be considered a constant.
Hence CCB will be given by
CCB =
!
CCBO
VCB
1! +! f
cC
1.5x10-8
=
100
1! +! 0.6
= 1.2 nF
The voltage VBE changes from -8 V to 0.7 volts during the same interval. We must find
the average value of CBE.
ÛÙ
0
!
Ù
ı
CBE =
CBE =
!
CEBO
! dV
VEB EB
1! +! f
cE
8
0
Ûı dV
EB
8
(9.2x10-9)(0.89)
[
8
=
CEBO! f cE È
Í
Î
(-8 )
0
1! +! f ! ! -! !
cE
8 ˘˙
1! +! f
cE˚
8
1! +! 0.89 - 1] = 2.2 nF
È 16 ˘
td,on = (10) [2.2x10-9 + 1.2x10-9] ln ÍÎ 7.3˙˚
= (3.4x10-8)(0.78) ≈27 nanoseconds
22-1.
The capacitance of the gate-source terminals can be modeled as two capacitors connected
electrically in series. Cox is the capacitance of the oxide layer and is a constant
independent of vGS. Cdepl(vGS) is the capacitance of the depletion layer which
increases in thickness as VGS increases as is shown in Fig. 22-6. Any increase in the
depletion layer thickness reduces the value of Cdepl(vGS) and hence the atotal gatesource capacitance Cgs. However once vGS becomes equal to or greater than VGS(th),
the depletion layer thickness becomes constant because the formation of the inversion
layer jillustrated in Fig. 22-6c shields the depletion layer from further increases in vGS
(any additional increase in vGS is dropped across the oxide layer). Thus both
components of Cgs are constant for vGS > VGS(th).
22-2.
a) Idealized MOSFET waveforms shown below. To dimensions the waveforms, we
need the numerical values of the various waveform parameters. The voltage and current
amplitude parameters are given in the problem statement as: Vd = 300 V, VGS(th)
= 4 V, VGS,Io = 7 V, Io = 10 A. To complete the dimensioning, we must calculate the
various switching times.
V
T/2
(t)
CE
i (t)
C
V
I
d
t d,on
V
t ri
t fv
o
V (t)
GS
t d,off
GG
V
GS,Io
V
GS(th)
0
-V GG
td,on estimate - Use equivalent circuit of Fig. 22-12a.
dvGS
vGS
VGG
Governing equation is dt
+ R (C ! +! C ) = R (C ! +! C ) ;
G gs
gd
G gs
gd
Boundary condition vGS(0) = - VGG
Solution is vGS(t) = VGG - 2 VGG e-t/t ; t = RG(Cgs + Cgd) ;
At t = td,on , vGS = VGS(th). Solving for td,on yields
t rv
t fi
È
2! VGG
˘
˙
td,on = RG(Cgs + Cgd) ln ÍÎ ! ! V
!
-!
V
GG GS(th)˚
È (2)(15) ˘
td,on = (50) (1.15x10-9) ln ÍÎ ! (15! -! 4)˙˚ = 58 ns
tri estimate - Use equivalent circuit of Fig. 22-12b.
vGS(t) still given by governing equation given above in td,on estimate. Changing time
origin to when vGS = VGS(th) yields;
vGS(t) = VGG + [VGG - VGS(th)] e-t/t . T he drain current is given by
d(Vd! -! vGS)
10
iD(t) = Cgd
+ gm[vGS(t) - VGs(th)] ; gm = 7! -! 4 = 3.3 mhos
dt
At t = tri, iD = Io. Substituting vGS(t) into iD(t) and solving for tri yields
È
Cgd
˘
(VGG! -! VGS(th)){gm! + ! R (C ! +! C )}
Í
G gs
gd ˙
tri = RG(Cgs + Cgd) ln Î !
˚
gm(VGG! -! VGS(th))! -! Io
È
-10 ˘
Í (15! -! 4)(3.3! +! 1.5x10
˙
-9))˙
Í
(50)(1.15x10
˚
tri = (50)(1.15x10-9) ln Î !
(3.3)(15! -! 4)! -! 10
= 21 ns
tfv estimate - Use equivalent circuit of Fig. 22-12c.
Io
vGS approximately constant at VGS,Io = g
+ VGS(th) during this interval.
m
Governing equation is Cgd
dvDS
dt
È
=-
Î
Í
Io ˘
VGG! -! VGS(th)! -! g
m˙
!
˚
RG
with vDS(0) = Vd.
Solution is given by
È
Io ˘
t
vDS(t) = Vd - ÍÎ VGG! -! VGS(th)! -! g ˙˚ R C
; At t = tfv, vDS = 0.
G gd
m
Solving for tfv yields
tfv =
RG! Cgd! Vd
300
= (50)(1.5x10-10) (15! -! 4! -! 3)
Io
= 300 ns
VGG! -! VGS(th)! -! g
m
td,off estimate - use equivalent circuit of Fig. 22-12d with the input voltagge VGG
reversed.
vGS(t) = - VGG + 2 VGG e-t/t ; At t = td,off, vGS = VGS,Io. Solving for td,off
td,off = RG(Cgs + Cgd) ln
È
= (50)(1.15x10-9) ln Í
Í
Î
Î
Í
È
!
2! VGG
˘
Io ˙
VGG! +! VGS(th)! +! g ˚
m
˘
(2)(15) ˙
= 18 ns
! 10
˙
!
+!
4!
+!
15
˚
3.3
trv estimate - Use equivalent circuit of Fig. 22-12c with the input voltage VGG
reversed. vGS approximately constant at VGS,Io as in previous of tfv. Governing
equation is
VGG! +! VGS,Io
d{vDS! -! VGS,Io}
=
with vDS(0) = 0. Solution given by
Cgd
RG
dt
VGG! +! VGS,Io
t . At t = trv , vDS = Vd . Solving for trv yields
vDS(t) =
RG! Cgd
Vd! RG! Cgd
(300)(50)(1.5x10-10)
=
= 100 ns
trv = V ! +! V
(15! +! 7)
GG
GS,Io
tfi estimate - use equivalent circuit of Fig. 22-12b with the input voltage VGG
reversed. Governing equation the same as in previous calculation of tri. At t = 0, vGS(0)
= VGS,Io. Solution in this caae is given by
vGS(t) = - VGG + [VGS,Io + VGG] e-t/t ; At t = tfi, vGS = VGS(th). Solving for tfi
È VGG! +! VGS,Io ˘
È
˘
˙ = (50)(1.15x10-9)ln Í ! 15! +! 7˙ = 9 ns
tfi = RG(Cgs + Cgd) ln ÍÎ ! V +! V
Î
˚
15!
+!
4
GG
GS(th)˚
b) Estimate the power dissipated in the MOSFET in the same manner as was done for the
BJT in problem 21-3.Waveforms for the MOSFET are the same as for the BJT except for
appropriate re-labeling of the currents and voltages.
Eri = (0.5)(300)(10)(2.1x10-8) = 3x10-5 Joules
Efv = (0.5)(300)(10)(3x10-7) = 4.5x10-4 Joules
Eon = Io VDS,on [0.5 T - td,on + td,off] ; VDS,on = Io rDS,on = (10)(0.5) = 5 V
T >> td,on and td,off
Eon = (10)(300)(0.5)(5x10-5) = 1.25x10-3 Joules
Erv = (0.5)(300)(10)(10-7) = 1.5x10-4 Joules
Efi = (0.5)(300)(10)(9x10-9) = 1.5x10-5 Joules
Pc = (1.95x10-3)(2x104) = 39 watts
22-3.
Use test conditons to estimate Cgd. Then estimate the switching times in the circuit with
the 150 ohm load. Test circuit waveforms are shown below.
V
GG
V (t)
G
t
VGS,Io
V
GS(th)
V
V (t)
GS
GG
t
t d,off
t d,on
t ri = t
t f i = tr v
fv
i (t)
D
V (t)
DS
V
d
Io
t
Equivalent circuit during voltage and current rise and fall intervals:
RG
V (t)
G
+
-
C gd
R
D
C gs
V
d
g (V
- V
)
GS(th)
m GS
Governing equation using Miller capacitance approximation:
vGS
! VG(t)
+
=
; t = RG [Cgs + Cgd{1 + gmRD}] ;
t
t
dt
During tri = tfv interval, VG(t) = VGG. Solution is
dvGS
Vd
vGS(t) = VGG + {VGS(th) - VGG} e-t/t ; At t = tri, VGS = VGS(th) + g R ;
m D
Solving for tri = tfv yields
tri = tfv = t ln
È
Í
Î
VGG! -! VGS(th)
˘
!
Vd ˙
VGG! -! VGS(th)! -! ! ! g R ˚
m! D
During trv = tfi, vG(t) = 0 and solution is vGS(t) = VGS,Io e-t/t .
At t = trv, vGS(t) = VGS(th). Solving for trv yields
È
trv = t ln
Í
Î
!
VGS(th)
ÏÔ
Cgd =
Ì
ÔÓ
È
Í
! ln! !
Î
ÏÔ
Cgd = Ì
Vd ˘
VGS(th)! +! ! g R
m! D˙
ÔÓ ! ln! Î
ÈÍ
˚
. Invert equation for tri to find Cgd. Result is
tri
VGG! -! VGS(th)
˘
! Vd ˙
VGG! -! VGS(th)! -! ! ! g R ˚
m! D
¸Ô
3x10-8
!˘ ! -! ! 5x10-9˝
15! -! 4
Ô˛
! 15! -! 4! -! 1˙˚
Ó
Ì
Ï
¸
! ! -! ! RG! CgsÔ
¸
1
5(1! +! 25)˝˛
˝
Ó
Ì
Ï
1
¸
RG(1! +! gmRD)˝˛
Ô˛
= 2.3x10-9 F = 2.3 nF
Solving for switching times in circuit with RD = 150 ohms.
t = [10-9 + 2.3x10-9 {1 + 150}][100] = 35 m s
È 15! -! 4 ˘
tri = 3.5x10-5 ln ÍÎ ! 15! -! 4! -! 2˙˚
È 4! +! 2˘
= 7 m s ; trv = 3.5x10-5 ln ÍÎ ! 4 ˙˚
= 14 m s
22-4.
Waveforms for vDS(t) and iD(t) shown in previous problem. Power dissipation in
MOSFET given by
1
T
<PMOSFET> = [Eon + Esw] fs ; fs = T ; Eon = [ID]2 rDS,on(Tj) 2 ;
Vd
ÈÍ
Tj! -! 25˘˙
ÈÍ
Tj ˘˙
300
ID = R
= 150 = 2 A ; rDS,on(Tj) = 2 Î 1! +! 150 ˚ = 2 Î 0.833! +! 150˚
D
ÈÍ
Tj ˘˙ 1
1
Eon = (4)(2) Î 0.833! +! 150˚ 2f = {3.32 + 0.027 Tj} f
s
s
tri
1 Û
t t
Esw = T Ùı Vd! ID(1! -! t )(t )dt +
ri ri
0
Esw =
tfi
Vd! ID
1 ÛÙ
t t
)(
)dt
=
V
!
I
(1!
-!
T ı d D
6 [tri + tfi]
tfi tfi
0
(300)(2)
[7x10-6 + 14x10-6] = 2.1x10-3 joules
6
1
<PMOSFET> = {3.32 + 0.027 Tj} f fs + 2.1x10-3 fs
s
<PMOSFET> = {3.32 + 0.027 Tj} +[ 2.1x10-3][104] = 24.3 + 0.027 Tj
PMOSFET
30
25
B
B
B
B
B
20
Watts
15
10
5
0
0
10
20
30
40
50
60
70
Temperature [ °K]
22-5.
V
= on-state voltage of three MOSFETs in parallel = I r
80
90 100
22-5.
Von = on-state voltage of three MOSFETs in parallel = Io reff
r1! r2! r3
reff = r ! r +! r ! r +! r r ; r1 etc. = on-state resistance of MOSFET #1 etc.
1 2!
2 3!
3! 1
ÈÍ
Tj! -! 25˘˙
r1(Tj) = r1(25 °C) Î 1! +! 0.8! ! 100 ˚
r1(105 °C) = 2.95 W
; r1(105 °C) = (1.64) r1(25 °C) etc.
; r2(105 °C) = 3.28 W ;
r3(105 °C) = 3.61 W
(2.95)(3.28)(3.61)
reff(105 °C) = [(2.95)(3.28)! +! (3.28)(3.61)! +! (3.61)(2.95)] = 1.09 ohms
Von2
Io2! reff2
For the ith MOSFET, Pi = 2! r = 2! r
; Assume a 50% duty cycle and ignore
i
i
switching losses.
(5)2(1.09)2
(5)2(1.09)2
(5)2(1.09)2
P1 = (2)(2.95) = 5 W ; P2 = (2)(3.28) = 4.5 W ; P3 = (2)(3.61) = 4.1 W
22-6.
Hybrid switch would combine the low on-state losses of the BJT and the faster switching
of the MOSFET. In order to obtain these advantages, The MOSFET would be turned on
before the BJT and turned off after the BJT. The waveforms shown below indicate the
relative timing. The switch blocks Vd volts in the off-state and conducts Io amps in the
on-state.
VDS,on
V
CE,on
v =v
CE
DS
r I o; r < 1
Io
iD
(1 - r )I o
i
v
C
GS
v
BE
22-7.
1.3x1017
BVDSS ≈ N
= 750 volts ; Ndrift = 1.7x1014 cm-3
drift
-5
W drift ≈ (10 )(750) = 75 microns ;
W d,body = protrusion of drain depletion layer into body region
W drift! Ndrift
(75)(1.7x1014)
≈ N
=
≈0.3 microns
body
5x1016
Even though body-source junction is shorted, there is a depletion layer associated with it
which is contained entirely on the body side of the junction. This must be included in the
estimate of the required length of the body region.
W s,body ≈
2! e ! f c
k! T ÈÍ Na! Nd˘˙
q! Na,body ; f c = q ln ÍÎ ! n 2 ˙˚
i
;
È (1019)(5x1016)˘
˙
f c = 0.026 ln ÍÎ !
20
˚
(10 )
W s,body ≈
= 0.94
(2)(11.7)(8.9x10-14)(0.94)
≈ 0.16 microns
(1.6x10-19)(5x1016)
In order to avoid reach-through , Wbody > Wd,body + Ws,body
= 0.3 + 0.16 = 0.46 microns
22-8.
dvDS
dvGD
≈ Cgd dt ; vDS ≈vGD>> vGS
Displacement current = Cgd dt
dvDS
BJT will turn on if Rbody Cgd dt = 0.7 V
dvDS
0.7
dt > Rbody! Cgd will turn on the BJT.
22-9.
VGS,max = (0.67) EBD tox = (0.67) (5x106) (5x10-6) = 16.7 volts
22-10.
a) iD =
m n! Cox! N! Wcell! (vGS! -! VGS(th))
2! L
(11.7)(8.9x10-14)
Cox = t
=
= 1.04x10-7 F/cm2
10-5
ox
e
2! iD! L
N = m ! C ! W ! (v ! -! V
n ox cell GS GS(th))
! (2)(100)(10-4)
≈5,800 cells
N =
(1500)(1.04x10-7)(2x10-3)(15! -! 4)
100
b) Icell = 5800 = 17 milliamps
22-11.
Von = 4 volts = Ion Ron = (10 A) Ron ; Ron = 0.4 ohms
W drift
Ron = q! m ! N ! A
n d
: Wdrift = 10-5 BVDSS = (10-5)(800) = 80 microns
1.3x1017
Nd = BV
DSS
=
1.3x1017
800
≈ 1.6x1014 cm-3
8x10-3
A=
≈0.5 cm2
(1.6x10-19)(1500)(1.6x1014)(0.4)
10! A
A
A
= 20 2 << the allowable maximum of 200
, so estimate is alright.
2
0.5! cm
cm
cm2
22-12.
Cgs ≈ Cox N Wcell L = (1.04x10-7)(5.8x103)(2x10-3)(10-4) = 121 pF
22-13.
Two overstress possibilities, overvoltage across drain-source terminals because of stray
inductance and excessive power dissipation. Check for overvoltage first.
È 100 ˘
di
˙ = 300 V > BV
VDS(turn-off) = Vd + L dt = 100 + (10-7) ÍÎ !
DSS = 150 V
5x10-8˚
Check for excessive power dissipation.
Pallowed =
Eonfs =
Esw =
Tj,max! -! Ta
150! -! 50
=
= 100 watts ; Pdissipated = [Eon + Esw] fs
1
Rq ,j-a
Io2! rDS(on)
2
(100)2(0.01)
=
= 50 watts
2
Vd! Io
(100)(100)
[(2)(5x10-8) + (2)(2x10-7)]
2
2 [tri + tfi + trv +tfv] =
Esw = 2.5x10-3 joules ; Eswfs = (2.5x10-3)(3x104) = 75 watts
Pdissipated = 50 + 75 = 125 watts > Pallowed = 100 watts
MOSFET overstressed by both overvoltages and excessive power dissipation.
22-14.
Gate current which charges/discharges Cgs and Cgd during turn-on and turn-off is
approximately constant during the four time intervals. However during the current rise
and fall times the voltages VGS and VGD change by only a few tens of volts. However
during the voltage rise and fall times VGD changes by approximately Vd which is much
larger than a few tens of volts. Thus we have:
VGG
Current rise/fall times proportional to [Cgs + Cgd] I
G
Vd
Voltage rise/fall times proportional to Cgd I
G
Cgs roughly the same size as Cgd and Vd >> VGG
Hence voltage switching times much greater than current switching times.
23-1.
vs(t)
; a
vs(t) = 2 Vs sin(w t) ; iL(t) = R
L
< w t < p
p
1 Û
<PSCR> = 2p ı [(1)iL(w t)! +! {iL(w t)}2Ron]! d(w t)
a
Vs
1
{1 + cos(a )} + π
<PSCR> =
2! p RL
È Vs ˘ 2
Í !
˙ R [π - a + sin(2a ) ]
2
R
Î L˚
on
23-2.
Tj,max! -! Ta,max
120 °F = 49 °C ; Tj,max = 125 °C ; <PSCR>|max =
Rq ja
<PSCR>|max =
125! -! 49
= 760 Watts
0.1
Check <PSCR> at a = 0
1
220
[1 + cos(0)] + π
<PSCR> =
2π! (1)
ÈÍ 220˘ 2
sin(0)
-3
˙
Î ! 1 ˚ (2x10 )[π - 0 + 2 ] = 107 watts
<PSCR> = 107 watts less than the allowable 760 watts. Hence trigger angle of zero
where maximum load power is delivered is permissible.
π
1 Û
Average load power <PL> = 2π ı {iL(w t)}2RL! d(w t) ; iL(w t) = 2 (220) sin(w t)
a
π
sin(2a )
1 Û
(220)2
2
2
ı
<PL> = 2π { 2! (220)} sin (w t)! d(w t) = 6.28 [3.14 - a +
2 ]
a
For a = 0 <PL> = 24.2 kW
23-3.
PSCR(t) = instantaneous power dissipated in the SCR during turn-on.
t dI
PSCR(t) = vAK(t) iA(t) = VAK {1 - t } dt t during tf
f
P(t) = power density =
PSCR(t)
= watts per cm2 ; A(t) = conducting area of SCR
A(t)
A(t) = π [ro + us t]2 - π ro2 = π [2 ro us t + (us t)2]
Û
tf
1 Ù
1
d Tj = C ıÛ P(t)! dt = C
vı
v
0
tf
1 VAK dI
d Tj = C 2πr u dt
o s
v
tf
t dI
VAK! {1! -! ! t ! }! dt ! ! t!
f
! dt
π! [2! ro! us! t! +! (us! t)2]
0
Û È
Ù
Ù
ı
0
t
1! -! ! t ˘
us
Í
-1
f ˙
! !
!
dt
;
Let
a
=
a'
=
1,
b
=
,
and
b'
=
ust ˙
tf
2ro
Í
Î 1! +! 2ro˚
tf
ÛÙ È a! +! bt ˘
Integral becomes ı ! ÍÎ ! a'! +! b't˙˚ ! dt ; Using integral tables
0
tf
btf [ab'! -! ab]
ÛÙ È a! +! bt ˘
Í
˙
ı ! Î ! a'! +! b't˚ ! dt = b' +
ln[a' + b' tf] ;
[b']2
0
1
b= 2x10-5
104
4
-1
= - 5x10 sec ; b' = (2)(0.5)
= 104 sec-1
Evaluating the integral yields
tf
È
ÛÙ È a! +! bt ˘
-1
5x104˘˙
Í
Í
-4
˙
ı ! Î ! a'! +! b't˚ ! dt = 4 + Î 10 ! +! !
ln[1 + (104)(2x10-5)] = 9.4x10-6 sec
8
˚
10
10
0
With Cv = 1.75 Joule/(°C-cm3), the expression for d Tj becomes
(103)(! 9.4x10-6) dI
dI
d Tj =
= 125 - 25 = 100 °C ; Solving for dt yields
4
dt
(2π)(1.75)(10 )(0.5)
dI
100
dt = 1.7x10-7 = 590 A/m s
23-4.
Advantages - Shorter N- region length Wd means shorter carrier lifetimes can be
accomodated and thus faster switching times.
Disadvantages - Junction J1 is now a P+ - N+ junction with a low breakdown voltage.
Since J3 already has a low breakdown voltage, the modified thyristor has no significant
reverse blocking capability.
23-5.
ton =
(4! -! 0.5)! cm
us
=
3.5
= 350 microseconds
104
23-6.
Lateral voltage drops caused by base currents cause current density nonuniformities. At
large currents, these nonuniformities become severe and the increasing possibility of
second breakdown limit the total current that the BJT can safely conduct.
In the thyristor, no significant gate current is needed to keep the thyristor on and there is
consequently no lateral current flow and thus lateral voltage drop. The current density is
uniform across the entire cross-sectional area of the thyristor and there is much less
likelyhood of second breakdown.
23-7.
a) Breakover in a thyristor is not due to impact ionization. However in a well-designed
thyristor, the value of the breakover voltage is an appreciable fraction of the actual
avalanche breakdown voltage. Thus an estimate of the n1 thickness and doping level
based avalanche breakdown would be a reasonable first attempt.
Nd =
1.3x1017
= 6.5x1013 cm-3 ; Wd ≈ (10-5)(2x103) = 200 microns
3
2x10
qWd2
(1.6x10-19)(2x10-2)2
b) t = kT(m ! +! m ) =
= 17 microseconds
(1.4x10-23)(300)(900)
n
p
Used (m n + m p) = 900 cm2/V-sec which is value appropriate to large excess carrier
densities (approaching 1017 cm-3)
c) Von = I Rdrift ; Ignore I2/3 contribution as it is usually small compared to the linear
term.
Wd
2
0.02
;
Rdrift ≈ q! (m ! +! m )! n ! A ; 2000 = 10-3 =
-19
(1.6x10 )(900)(1017)! A
n
p b
Solving for A gives A =
0.02
= 1.4 cm2
-19
17
-3
(1.6x10 )(900)(10 )(10 )
2000
Resulting current density is 1.4 = 1430 A/cm2 which is excessively large. Probably
should use nb ≈1016 cm-3 which would give a current density of 140 A/cm2, a more
realistic value.
23-8.
15
3000
Cathode area = 200 = 15 cm2 = 0.65 Asi ; Asi = 0.65 = 23 cm2
23 cm2 = π Rsi2 ; Rsi =
23
π = 2.7 cm
23-9.
dvAK
IBO
dt max ≈ Cj2(0) ; Cj2(0) = zero bias value of junction J2 space charge capacitance
|
e !A
Cj2(0) ≈ W
depl(0)
; Wdepl(0) ≈
2! e ! f j2
q! Nd
NaNd
kT
; f j2 = q ln[ 2 ]
ni
(1014)(1017)
f j2 = 0.026 ln[
] = 0.66 V ;
(1020)
W depl(0) ≈
(2)(11.7)(8.9x10-14)(0.66)
= 2.9 microns
(1.6x10-19)(1014)
(11.7)(8.9x10-14)(10)
= 36 nF
Cj2(0) =
2.9x10-4
dvAK
dt
0.05
|max = 3.6x10
-8
= 1.4x106 V/sec or 1.4 V per microsecond
24-1.
Cross-sectional view of GTO gate-cathode area with reverse gate current flowing.
Gate
Cathode
-i
N
2
R
R
P
2
-
v
G
GK +
+ v
GK -
t
Center
Line
The negative gate current, -iG, flowing through the P2 layher beneath the N2 cathode
layer develops a lateral voltage drop vGK as indicated. Maximum negative vGK = BVJ3
BVJ3
|vGK| = |IG,max| RGK < BVJ3 in order to avoid breakdown or IG,max < R
GK
r p2! W
R
RGK = 2! N = 4! N! L! t ; N = number of cathode islands in parallel.
BVJ3
IG,max = R
GK
IA,max
= b
: Solving for IA,max yields
off
4! N! L! t! b off! BVJ3
IA,max =
r p2! W
24-2.
Assume that the current is communtated from the GTO to the turn-off snubber and
associated stray inductance linearly as a function of time. That is the inductor current
t
iLs = Io t ; Assume that just prior to the end of the current fall time interval, the
fi
voltage across the snubber capacitor has built up to approximately Vd.
vAK,max = 1.5 Vd = Ls
Ls
Vd! tfi
= 2! I
o
diLs
dt
Io
+ vcap = Ls t + Vd ; Solving for Ls yields
fi
24-3.
Equivalent circuit during tgq shown below.
P
N
P
i (t)
G
L
N
G
V
GG+
J3 forward
biased during
t gq
-! VGGIo
diG
LG dt = - VGG- ; iG(t) = L
t ; At t = tgq want iG = - b
; Solve for LG
off
G
b off! VGG-! tgq
LG =
Io
=
(5)(15)(5x10-6)
(500)
Equivalent circuit during tw2 interval.
= 0.75 microhenries
i (t)
G
L
G
-
V
GG+
+
BV
J3
Io
Io
! BVJ3! -! VGG-!
diG
LG dt = BVJ3 - VGG- ; iG(0) = - b
; iG(t) = - b
+
t
LG
off
off
At t = tw2 , iG = 0 ; solving for tw2 yields
Io! LG
tw2 = b
off! [BVJ3! -! VGG-]
(500)(7.5x10-7)
=
= 7.5 microseconds
(5)(25! -! 15)
Chapter 25 Problem Solutions
25-1.
Ron(MOS)
1
proprotional to m
; m n = 3 m p ; Hence
A
majority
Ron(n-channel)
Ron(p-channel)
= 3
A
A
Ron(IGBT)
1
proportional to d n(m +! m ) ; d n = excess carrier density
A
n!
p
d n = d p so p-channel IGBTs have the same Ron as n-channel IGBTs
25-2.
Turn-off waveforms of short versus long lifetime IGBTs
i
D
long lifetime
I
(long)
BJT
I
(short)
BJT
short lifetime
t
Long lifetime IGBT a. BJT portion of the device has a larger beta and thus the BJT section carries the largest
fraction of the IGBT current. Thus IBJT(long) > IBJT(short).
b. Longer lifetime leads to longer BJT turn-off times.
Short lifetime IGBT a. BJT beta smaller. MOSFET section of the device carries most of the current.
b. Shorter lifetime means less stored charge in the BJT section and thus faster turn-off.
25-3.
Collector junction of
pnp BJT section of IGBT
Base of pnp BJT
Emitter of pnp BJT
Body region of
MOSFET section
of IGBT
N-
P
P
+
Drain of
IGBT
V
V
DS2
>V
DS1
DS1
Effective
base width
Significant encroachment intoa the base of the PNP BJT section by the depletion layer of
the blocking junction. The effective base width is thus lowered and the beta increases as
vDS increases. This is base width modulation and it results in a lower output resistance
ro (steeper slope in the active region of the iD-vDS characteristics).
Depletion layer
Collector junction of
pnp BJT section of IGBT
Base of pnp BJT
Emitter of pnp BJT
Body region of
MOSFET section
of IGBT
P
N-
N
V
+
P
+
Drain of
IGBT
DS
Depletion layer
Effective base
width independent
of V
DS
Depletion encroaches into the N- layer but the advance is halted at moderate vDS values
by the N+ buffer layer. The PNP base width becomes constant and so the effective
resistance ro remains large.
25-4.
One dimensional model of n-channel IGBT
25 m m
Source
N
+
19
10
P
17
10
N+
N
14
10
19
10
P
+
Drain
19
10
Reverse blocking junction is the P+ - N+ junction because of body-source short.
1.3x1017
< 1 volt. No reverse blocking capability.
BVRB ≈
1019
Forward breakdown - limited by P - N- junction.
BVFB =
1.3x1017
≈1300 volts ; But Wdepl(1300 V) = (10-5)(1300) = 130 microns
1014
130 microns > 25 micron drift region length. Hence forward blocking limited by
punch-through.
(1.6x10-19)(1014)(2.5x10-3)2
5
-3
= 453 volts
BVFB = (2x10 )(2.5x10 ) (2)(11.7)(8.9x10-14)
25-5.
IGBT current - Ion,IGBT
; Von(IGBT) = Vj + Ion,IGBT Ron,IGBT
Assume Vj ≈0.8 V ; Exact value not critical to an approximate estimate of Ion,IGBT.
3! -! 0.8
Ion,IGBT ≈ R
on,IGBT!
Wd
; Ron,IGBT ≈ q! (m ! +! m )! n ! A
n
p b
7.5x10-3
-5
= 2.6x10-3 W
W d = (10 )(750) = 75 m m ; Ron,IGBT =
(1.6x10-19)(900)(1016)(2)
2.2
Ion,IGBT ≈
≈ 850 amps
2.6x10-3
MOSFET current - Ion,MOS ; Von(MOS) = Ion,MOS Ron,MOS
Von(MOS)
; Ron,MOS =
Ion,MOS = R
on,MOS
Nd =
Wd
q! m n! ! Nd! A
; Wd = 75 m m
1.3x1017
= 1.7x1014 cm-3
750
7.5x10-3
Ron,MOS =
= 0.09 ohms
(1.6x10-19)(1.5x103)(1.7x1014)(2)
3
Ion,MOS = 0.09 = 33 amps
25-6.
Von(PT) = Vj,PT + Ion,PT Ron,PT = Vj,NPT + Ion,NPT Ron,NPT
Ion,PT
Ion,NPT
Ron,NPT
≈ R
since Vj,NPT ≈Vj,PT
on,PT
Ron,NPT
W d,NPT
=
Ron,PT
! Wd,PT ≈2 assuming doping level in PT drift region is much less than
the doping level in the NPT drift region.
Ion,PT
Hence I
on,NPT
≈2
P
25-7.
Cv dT = d
P
Q ; d Q = V d t ; P = power dissipated in IGBT during overcurrent transient.
V = volume in IGBT where power is dissipated.Duration of transient = d t.
P = Iov2 Ron ; Iov =
W drift
! V! Cv! dT
d t! Ron
Ron = q! (m ! +! m )! n ! A ; Iov =
n
p b
Iov =
; V ≈A Wdrift
q! (m n! +! m p)! nb! A2! Cv! dT
d t
(1.6x10-19)(900)(1016)(0.5)2(1.75)(100)
≈2.5x103 amps
-5
(10 )
Estimate is overly optimistic because it ignores any other ohmic losses in the device such
as channel resistance or resistance of the heavily doped source and drain diffusions.
However IGBTs nominally rated at 100 A have repeatedly been tested at 1000 A for 10
microseconds or less and survived.
25-8.
The IGBT has the smaller values of Cgd and Cgs because its effective cross-sectional
area is smaller than that of the MOSFET. The IGBT has a smaller area even though its
current rating is identical to the MOSFET's rating because the IGBT utilizes conductivity
modulation of the drift region to significantly reduce the specific on-state resistance.
25-9.
dvDS
Check dt
dvDS
dt
at turn-off ;
Vd
>!t
off
=
dvDS
dt
Vd
= ! t ; trv < 0.75 microseconds
rv
700
= 2330 V/m s > 800 V/m s limit.
! 3x10-7
Device is overstressed by an overly large
dvDS
dt
.
! tri! +! trv! +! ! tfi! +! tfv
Check switching losses Psw = Vd Io
fs
2
(3x10-7! +! 7.5x10-7)
(2.5x104) = 875 W
Psw = (700)(100)
2
Tj,max! -! Ta
150! -! 25
Allowable power loss =
=
= 250 watts
Rq ja
0.5
Switching losses exceed allowable losses. Module is overstressed by too much
power dissipation.
26-1.
Equivalent circuit for JFET in active region.
+
v
C
GS
+
ro
C GD
v
+
GS
-
Equivelent circuit for JFET
in the blocking state.
m v
GS
D
0
v
-
GS
C GD
C
-V
GS1
+
v
GS
-
Linearized I-V characteristics
i
+
DS
DS
0
V
DS1
V
DS2
-V
GS2
26-2.
Drive circuit configuration
V
DD
R1
R
RL
MOSFET off
VDS = VKG = - VGK =
VDD! R2
R1! +! R2
Negative enough to insure that
the FCT is off.
2
MOSFET on
+
V
drive
-
VDS = VKG = - VGK = 0
and FCT is on.
MOSFET characteirstics:
- High current sinking capability
- Low Ron ; Low BVDss
2
26-3.
Wd2
Vdrift = (m ! +! ! m )! t
n
p
Wd2(Si)
(m n! +! ! m p)|Si! t Si =
EBD! Wd
; BVBD =
; Vdrift,GaAs = Vdrift,Si
2
Wd2(GaAs)
(m n! +! ! m p)|GaAs! t GaAs
(m n! +! ! m p)|Si È EBD(Si) ˘ 2
t GaA
Í
˙
t Si = (m n! +! ! m p)|GaAs Î E (GaAs)˚
BD
(m n + m p)|Si = 2000 cm2/V-sec ; (m n + m p)|GaAs = 9000 cm2/V-sec
EBD(Si) = 300 kV/cm
t GaA
t Si
; EBD(GaAs) = 400 kV/cm
2 È 3˘ 2
= 9 ÍÎ 4˙˚
= 0.125 ; GaAs has the shorter lifetime.
26-4.
EBD = 107 V/cm ; BVBD = EBD tox
103
= 10-4 cm = 1 micron
tox =
7
10
26-5.
IA,max = (105)(1.5x10-2) = 1500 amperes
26-6.
P-MCT fabricated in silicon can turn-off three times more current than an identical
N-MCT due to the difference between the mobilities in the n-channel OFF-FET in the
P-MCT and p-channel OFF-FET in the N-MCT. Hence
IA,max = (3)(105)(1.5x10-2) = 4500 amperes
26-7.
Assume an n-type drift region since m n > m p.
Wd
Rdrift = q! m ! N ! A
n d
Wd
; Rdrift,sp = Rdrift A = q! m ! N
n d
e ! EBD2
Using Eq. (20-1) Nd = 2! q! BV
BD
; Using Eq. (20-3) Wd =
Substituting into the expression for Rdrift,sp yields
2! ! BVBD 1 2! q! BVBD
Rdrift,sp = E
e ! EBD2
BD q! e
! ! ! 4! ! (BVBD)2
=
e ! m n! (EBD)3
2! ! BVBD
EBD
26-8.
(4)(500)2
Silicon : Rdrift,sp =
= 0.024 ohms-cm2
-14
5
3
(11.7)(1500)(8.9x10 )(3x10 )
GaAs: Rdrift,sp =
(4)(500)2
= 0.0016 ohms-cm2
(12.8)(8500)(8.9x10-14)(4x105)3
(4)(500)2
6H-SiC: Rdrift,sp =
= 2.3x10-4 ohms-cm2
(10)(600)(8.9x10-14)(2x106)3
(4)(500)2
Diamond: Rdrift,sp =
= 9.3x10-7 ohms-cm2
-14
7
3
(5.5)(2200)(8.9x10 )(10 )
26-9.
Diamond is the most suitable material for high temperature operation. It has the largest
bandgap (by almost a factor of two) and thus the smallest intrinsic carrier density at any
given temperature. This statement presumes that the phase change listed for diamond in
the table of material properties exceeds the sublimation temperature of SiC (1800 °C).
26-10.
e ! EBD2
Eq. (20-1): Nd = 2! q! BV
BD
5.7x1017
(12.8)(8.9x10-14)(4x105)2
= BV
For GaAs: Nd =
BD
(2)(1.6x10-19)(BVBD)
(10)(8.9x10-14)(2x106)2
1.1x1019
For 6H-SiC: Nd =
= BV
(2)(1.6x10-19)(BVBD)
BD
For diamond: Nd =
(5.5)(8.9x10-14)(107)2
1.5x1020
=
BVBD
(2)(1.6x10-19)(BVBD)
Eq. (20-3): Wd =
2! ! BVBD
EBD
For GaAs: Wd =
2! ! BVBD
= 5x10-6 BVBD [cm]
4x105
2! ! BVBD
= 10-6 BVBD
For 6H-SiC: Wd =
6
2x10
[cm]
2! ! BVBD
= 2x10-7 BVBD
For diamond: Wd =
7
10
[cm]
26-11.
Use equations from problem 26-10.
Material
Nd
Wd
GaAs
2.9x1015 cm-3
10-2 cm
6H-SiC
5.5x1016 cm-3
2x10-3 cm
Diamond
7.5x1017 cm-3
4x10-5 cm
26-12.
Tj = Rq jc Pdiode + Tcase : Rq jc = C.• (k ) -1
k = thermal conductivity and C = constant
(Tj! ! -! ! Tcase)! k
Using silicon diode data: C =
Pdiode
=
(150! -! 50)(! 1.5)
= 0.75 cm-1
200
0.75
0.75
Rq jc(GaAs) = 0.5 = 1.5 °C/W : R q jc(SiC) = 5 = 0.15°C/W
0.75
Rq jc(diamond) = 20 = 0.038°C/W
Tj(GaAs) = (1.5)(200) + 50 = 350 °C : Tj(SiC) = (0.15)(200) + 50 = 80 °C
Tj(diamond) = (0.038)(200) + 50 = 57.4 °C
26-13.
Pinch-off of the channel occurs when the depletion region of the gate-channel (P+N-)
junction is equal to W/2 where W is the width of the channel. Occurs at a gate-source
voltage of -Vp. The other half of the channel is depleted by the depletion region from
the gate-channel junction on the other side of the channel. See Figs. 26-1 and 26-3.
W
2 = Wo
Vp
1! +! f
c
;
È N !N ˘
kT
Í a d˙
f c = q ln Í
˙
Î ni2 ˚
Solving for Vp yields Vp =
Wo =
È W ˘ 2
f c ÍÎ 2! W ˙˚
- f c
o
È (1019)(2x1014)˘
˙
f c = 0.026 ln ÍÎ
˚
1010
Wo =
;
= 0.8 V
(2)(11.7)(8.9x10-14)(0.8)
(1.6x10-19)(2x1014)
= 2.3 microns
È 10 ˘ 2
Vp = (0.8) ÍÎ (2)(2.3)˙˚
- 0.8 = 3.8 - 0.8 = 3 V
2! e ! f c
q! Nd
26-14.
Single cell of the multi-cell JFET shown below. See Fig. 26-1 for a fuller picture of the
multi-cell nature of the JFET. The diagram on the left indicates the various
contributions to the on-state resistance and the figure on the right shows the various
geometrical factors that determine the resistance. Each cell is d centimeters deep in the
direction perpendicular to the plane (page) of the diagram. The gate-source voltage is
set at zero.
source
W
g
Rs
P
+
P
Rc
R
+
P
+
W
W - 2W o
Wo + Wg /2
t
R
l gs
P
+
l gd - W o - W g/2
W + Wg
d
drain
lgs
Rs
10-3
= q! m ! N ! d! W =
= 298 ohms
(1.6x10-19)(1500)(2x1014)(0.07)(10-3)
n d
Rc
lc
= q! m ! N ! d! (W! -! 2W )
n d
o
10-3
= 552 ohms
=
(1.6x10-19)(1500)(2x1014)(0.07)(10-3! -! 4.6x10-4)
Rt estimate. Treat the region of thickness Wo + Wg/2 as though it has an average width
(W! -! 2! Wo)! +! (W! +! Wg)
given by
= W + Wg/2 - Wo. Rt now approximately given by
2
Rt
Rt
Wo! +! Wg/2
= q! m ! N ! d! (W! +! W /2! -! W )
n d
g
o
-3!
(10 +! 5x10-4)
= 351 ohms
=
(1.6x10-19)(1500)(2x1014)(0.07)(10-3! +! 5x10-4! -! 2.3x10-4)
(lgd! -! Wo! -Wg/2)
Rd = q! m ! N ! d! (W! +! W ) =
n d
g
-4!
(35x10 -! 2.3x10-4! -! 5x10-4)
= 412 ohms
Rd =
(1.6x10-19)(1500)(2x1014)(0.07)(10-3! +10-3)
Total resistance of a single cell is Rcell = Rs + Rc + Rt + Rd
lc
Rcell = 298 + 552 + 351 + 412 = 1613 ohms
There are N = 28 cells in parallel so the the net on-state resistance is
Rcell
1613
= 28 = 58 ohms
Ron = N
26-15.
As the drain-source voltage increases, the reverse-bias on the gate-drain pn junction
increases. The depletion region of the two adjacent P+ regions merge and then grow
towards the drain. The drift region of length lgd and doping Nd must contain this
depletion region and will determine the breakdown voltage. The short length of the
drift region suggests that punch-through will limit the breakdown voltage. Check for
this possibility first.
Non-punch-through estimate:
1.3x1017
= 650 V ; Wd > (10-5)(6.5x102) = 65 microns > 35 microns
BV =
14
2x10
Hence this is a punch-through structure. Use Eq. (21-21) and EBD = 2x105 V/cm
(1.6x10-19)(2x1014)(3.5x10-3)2
5
-3
BV = (2x10 )(3.5x10 ) (2)(11.7)(8.9x10-14)
BV = 511 V
= 700 - 189
27-1.
During turn-off of the GTO, Io communtates linearly to Cs.
a.
dvC
dvC
dvAK
Io! t
t
Cs dt = Io t ; dt =
= C !t
< 5x107 V/s
dt
fi
s fi
Maximum
Cs >
dvAK
dt
occurs at tfi. Solving for Cs yields
ÈÍ dvAK˘ -1
˙
Io Î ! dt ˚
=
500
5x107
= 10 microfarads
Rs chosen on basis of limiting discharge current from Cs to safe level when GTO
turns on. ICs,max = IAM - Io - Irr . Assume irr = 0.2 Io. Then
ICs,max = 1000 - 500 -100 = 400 A
! 500
Rs = ! 400 ≈1.3 ohms
Snubber recovery time = 2.3 Rs Cs = (2.3)(10-5)(1.3) = 30 microseconds.
fsw! Cs! Vd2
Power dissipated in snubber PRs ≈
2
b.
PRs = (0.5)(103)(10-5)(500)2 = 1.25 kW
di
27-2.
diA
500
L s dt max = Vd ; Ls ≈
≈1.7 microhenries.
3x108
Voltage across GTO at turn-off = Vd + Io Rs : Assume Io Rs = 0.2 Vd
Rs =
(0.2)(500)
= 0.2 ohms.
(500)
27-3.
vCs(t) = Vd - Vd cos(w ot) + Vd
Cbase
Cs sin(w ot) = Vd + K sin(w ot - f )
vCs,max = Vd + K ; K sin(w ot - f ) = K sin(w ot) cos(f ) - Kcos(w ot) sin(f )
K sin(w ot) cos(f ) - K cos(w ot) sin(f ) = Vd
K cos(f ) = Vd
Cbase
Cs
Cbase
Cs sin(w ot) - Vd cos(w ot)
and K sin(f ) = Vd ;
C
2 + K! sin(f ) 2 = K2 = V 2 base + V 2
K!
cos(f
)
[
]
[
]
d Cs
d
vCs,max = Vd + K = Vd + Vd
Cbase
1! +! C
s
27-4.
a.
Equivalent circuit after diode reverse recovery.
L = 10 m H
+
200 V
i
-
Rs
L
Cs
diR
+
iL(0 ) = Irr ; During reverse recovery L dt = 200 V
diR
Irr
dt = trr
b.
=
200
= 2x107 A/sec ; Irr = (2x107)(3x10-7) = 6 A
-5
10
vCs,max = 500 V = 200 + 200
Cbase
1! +! C
s
Cbase
Cbase
1! +! C
= 1.5 ; C
= 1.5 ≈ 1.25
s
s
È 62 ˘
˙
Cbase = (10-5) ÍÎ
2
(200) ˚
9! nF
Cs = 1.25 ≈7 nF
= 9 nF
27-5.
Use the circuit shown in problem 27-4.
È 62 ˘
˙
Cs = Cbase = (10-5) ÍÎ
2
(200) ˚
= 9 nF
È 200˘
Rs = 1.3 Rbase = (1.3) ÍÎ 6 ˙˚ = 43 ohms
vCs,max = (1.5)(200) = 300 V
27-6.
È L ! I 2! +! C ! V 2˘
Í s rr
s in ˙
˚ f
P = WR fsw = Î
2
sw
WR = (0.5)(10-5)(6)2 + (0.5)(9x10-9)(200)2 = 3.6x10-4 Joules
P = WR fsw = (3.6x10-4 )(2x104) = 7.2 watts
27-7.
a.
BJT waveforms (trv assumed to be zero for Cs = 0)
i
Cs
Io
0
v
t
tfi
CE
Cs = 0
Cs > 0
V
d
t
0
Power dissipation for Cs = 0 is Pc =
Vd! Io! tfi
2
fsw
Pc =
(200)(25)(4x10-7)
(2x104) = 20 W
2
Power dissipation for Cs = Cs1
tfi
Û
Io t2
Vd! Io! tfi
t
Ù
Pc = Wc fsw ; Wc = ı Io(1! -! t )! ! 2! C ! t ! ! d! t = 12
s1 fi
fi
0
(200)(25)(4x10-7)(2x104)
= 3.3 watts
Pc =
12
Factor of six reduction in the turn-off losses.
BJT losses increase at turn-on only becaue of energy stored in Cs being dissipated
in the BJT, but also because the time to complete turn-on is extended as shown in
Fig. 27-14a. This extended duration of traversal of the active region also increases
the turn-on losses.
b.
During the turn-on interval, the collector-emitter voltage is given by (assuming
that the external circuit dominates the transient)
Cs1
dvCE
dt
diC
diC t2
= - dt t - Irr ; vCE(t) = Vd - dt 2! C
s1
t
- Irr C
s1
Seting the expression for vCE(t) equal to zero and solving for the time
D T = t2 - (tri + trr) (see Fig. 27-14a) required for vCE to reach zero yields
Irr
D T = - di /dt +
C
È
I ˘ 2 2! Vd! Cs1
Í ! ! rr ˙ ! +!
diC/dt !
Î diC/dt˚
Note that D T = 0 if Cs1 = 0 which is consistent with the assumption that the
external circuit and not the BJT that dominates the turn-on transient. Extra energy
disspated in the BJT at turn-on due to Cs1 is thus
È Vd diC [Io! +! Irr]! Irr˘
D T
2
˙
Ûı v (t)! i (t)! dt = V I D T + Í 2 ! dt ! ! ! -!
2! Cs1 ˚ D T
CE C
d rr
Î
0
(Io! +! 3! Irr) diC
ÈÍ diC˘ 2 D T4
˙
3
2! Cs1
dt D T - Î dt ˚ 8! Cs1
ÈD T
˘
Í
Û
The increase in the BJT loss is ı vCE(t)! iC(t)! dt˙ fs where fs is the switching
Í
˙
Î 0
˚
frequency. Numerical evaluation of D T gives D T = 0.29 m s (I rr = 10 A and Cs1 =
25 nF).
Evaluation of the loss gives 1.3x10-3 fs = 26.5 watts
27-8.
a.
Ds shorts out the snubber resistance during the BJT turn-off. Hence Cs1 is
directly across the BJT as in problem 27-7a. Thus the loss reduction is the same as
in problem 27-7a.
b. Equivalent circuit during BJT turn-off after free-wheeling diode reverse recovery
is shown below.
Rs
+
v
CE
-
I r r+
di C
dt
t
Cs
+
v
C
-
v (0+ ) = V
C
d
dvC
diC
dvC
vCE = CsRs dt + vC ;; Cs dt = - Irr - dt t
Combining equations and solving for vCE(t) yields
diC t2
diC˘
È Irr
vCE(t) = Vd - Irr Rs - ÍÎ ! C ! +! Rs! dt ˙˚ t - dt 2! C
s
s
At t = D T, vCE = 0 and turn-on is completed.
diC
Irr! +! Rs! Cs! ! dt
D T= +
diC
! dt !
in
Î
Í
Í
È
diC˘
Irr! +! Rs! Cs! ! dt ˙ 2 2! Cs
diC
˙ ! +! ! diC ! [Vd! -! Irr! Rs]
˚
! dt !
dt
Vd
D T goes to zero when Rs = I . hence there is no increase in power dissipation
rr
the BJT due to the presence of Cs.
27-9.
a.
Proposed snubber circuit configuration shown below.
Ls
2 Vs
1
Rs
4
Io
3
Cs
2
Equivalent circuit swith SCRs 3 & 4 on and 1&2 going off or vice-versa.
Continuous flow of load current formces SCRs 1 & 2 to remain on past the time
of natural commutation (when vs(t) goes through zero and becomes negative).
3 or 4
Ls
Irr
Rs
2 Vs
1 or 2
Cs
With 3 & 4 on, 1 & 2 are off, and effectively in parallel with the R s-Cs snubber.
same is true when 1 & 2 are on and 3 & 4 are off. Thus the Rs-Cs snubber
functions as a turn-off snubber.
0.05! Vs
; worst case situation (maximum reverse voltage across SCR
w Ls = I
a1
which is turning off) occurs when SCR which is turning on is triggered with a
di
delay angle of 90°. During reverse recovery of SCR1, L s dt = 2 Vs and
b.
Irr
di
=
dt
trr . Solving for Irr yields
È I
˘
2! w ! trr! Ia1
rr ˙ 2
Í
Irr =
;
C
=
L
=
!
! 0.05
base
s ÍÎ ! 2! V ˙˚
s
! w ! ! Ia1! trr2
! 0.05! Vs
Smallest overvoltage occurs when Cs = Cbase. Putting in numerical values
Cs = 0.9933 Ia1 m F
Rbase =
2! Vs
Irr
! 0.05! Vs
= w !t !I
rr a1
Rs,opt = 1.3 Rbase =
c.
4000
Ia1
=
(0.05)! (230)
3050
= I
-5
(377)! (10 )! Ia1
a1
ohms
ohms
Peak line voltage = 2 (230) = 322 V
Smallest overvoltage = (1.5)(322) = 483 V which occurs when Cs = Cbase
and Rs = 1.3 Rbase. For Ia1 = 100 A
4000
Rs,opt = 1.3 Rbase = 100 = 40 ohms ; Cs = (0.0033)(100) = 0.33 m F
27-10.
The resistor in the BJT/MOSFET snubber must be shorted out during the device
turn-off so that the snubber capacitance is in parallel with the device. The uncharged
capacitor delays the build-up of the large Vd voltage across the BJT/MOSFET until
most of the current has been diverted from the switch. The snubber diode is forward
biased during turn-off, thus providing the shorting of the snubber resistor as required.
The turn-off of the thyristor limits overvoltages arising from the interruption of current
through the stray inductance in series with the thyristor. Lowest overvoltages are
obtained when Rs = 1.3 Rbase and Cs = Cbase. Overvoltages are 70-% larger if Rs is
zero. Hence a diode in parallel with the resistor is not desirable.
27-11.
a.
Check
dvDS
dt
dvDS
dt
>
at turn-off;
dvDS
dt
Vd
=t
; trv < 0.75 microseconds
rv
700
= 930 V/m s > 800 V/m s limit so snubber is needed.
7.5x10-7
Not enough information available to check on power dissipation or overcurrents.
b.
dvDS
dt
Io
100
= C = 400 V/m s ; Cs =
= 0.25 m F
4x108
s
Choose Rs to limit total current ID to less than 150 A
700
700
150 A = 100 + R ; Rs = ! 150! -! 100 = 14 ohms
s
Check snubber recovery time = 2.3 Rs Cs = (2.3)(14)(2.5x10-7) = 8 m s
Off time of the IGBT is 10 microseconds which is greater than the snubber
recovery time. Hence choice of Rs is fine.
28-1.
Schematic of drive circuit shown below.
100 V
V
GG+
100 A
R
+
G
V
DS
V
GG-
vDS(t) waveform same as in problem 22-2.
dvDS
Vd
During MOSFET turn-on dt
= t
< 500 V/m s
fv
Vd
From problem 22-2, t
fv
During MOSFET turn-off,
Vd
From problem 23-2, t
rv
È
Io ˘
VGG+! -! VGSth! -! ! g
Í
m˙
=Î
˚
RG! Cgd
dvDS
dt
È
=Î
Í
Vd
= t
rv
< 500 V/m s
Io ˘
m˙
VGG-! +! VGSth! +! ! g
RG! Cgd
˚
Io
60
gm = V ! -! V
= 7! -! 4 = 20 A/V
GS
GSth
Estimate of RG for MOSFET turn-on:
100
VGG+! -! 4! -! 20
5x108 V/sec >
(RG)(4x10-10)
Io
100
; VGG+,min = VGSth + g
= 4 + 20 = 9 V
m
Choose VGG+ = 15 V to insure that MOSFET driven well into ohmic range to
minimize on-state losses.
15! -! 9
= 30 ohms
RG >
-10
(4x10 )(5x108)
Estimate of RG at MOSFET turn-off:
100
VGG-! +! 4! +! 20
5x108 V/sec >
(RG)(4x10-10)
Choose VGG- = -15 V to insure that MOSFET is held in off-state and to minimize
turn-off times.
15! +! 9
= 115 ohms
RG >
(4x10-10)(5x108)
Satisfy both turn-on and turn-joff requirements by choosing VGG+ = VGG= 15 V and RG > 115 ohms.
28-2.
a.
Circuit diagram shown below.
+
R
G1
Tsw
V = 1000 V
d
-
R
I o = 200 A
Df
G2
Qs
RG2
1000
When FCT is off we need VKG = (1.25) 40 = 31.25 V = (1000) R ! +! ! R
G1
G2
Now R G1 + RG2 = 10-6 ohms so 31.25 = (1000) (10-6) RG2
RG2 = 31.25 kW
and RG1 = 969 kW
b.
MOSFET characteristics
- large on-state current capability
- low Ron
- low BVDSS (BVDSS of 50-100 V should work)
29-1.
Assume Ts = 120 °C and T a = 20 °C.
0.12
; A in m2 ; Eq. (29-18)
Rq ,rad ≈ A
Èd
˘
1
Í vert˙ 1/4
Rq ,conv ≈ (1.34)(A) Î D T ˚
; Eq. (29-20)
0.24
Rq ,conv ≈ A [dvert]1/4 for D T = 100 °C.
A cube having a side of length dvert has a surface area A = 6 [dvert]2
0.4
Rq ,conv ≈
[dvert]1.75
0.02
; Rq ,rad ≈
[dvert]2
Rq ,conv! Rq ,rad!
Rq ,sa = net surface-to-ambient thermal resistance = R
,q conv! ! +! Rq ,rad
0.04
Rq ,sa =
1.75
! [dvert]
! +! 2! [dvert]2
Heat Sink #
1
2
3
5
6
Volume [m]3
7.6x10-5
10-4
1.8x10-4
2x10-4
3x10-4
dv = (vol.)1/3 [m]
0.042
0.046
0.057
0.058
0.067
A = 6 [dv]2 [m]2
0.011
0.013
0.019
0.002
0.027
dv1.75
0.004
0.046
0.0066
0.0069
0.0088
dv2
0.0018
0.0021
0.0032
0.0034
0.0045
Rq ,sa [°C/W]
5.3
4.5
3.1
2.9
2.3
Rq ,sa (measured)
3.2
2.3
2.2
2.1
1.7
Heat Sink #
7
8
9
10
11
12
Volume [m]3
4.4x10-4
6.810-4
6.1x10-4
6.3x10-4
7x10-4
1.4x10-3
dv = (vol.)1/3 [m]
0.076
0.088
0.085
0.086
0.088
0.11
A = 6 [dv]2 [m]2
0.034
0.046
0.043
0.044
0.047
0.072
dv1.75
0.011
0.014
0.013
0.014
0.014
0.021
dv2
0.0058
0.0078
0.0071
0.0073
0.0078
0.012
Rq ,sa [°C/W]
1.8
1.4
1.5
1.4
1.3
0.9
Rq ,sa (measured)
1.3
1.3
1.25
1.2
0.8
0.65
Heat sink #9 is relatively large and cubical in shape with only a few cooling fins.
Heat sink #9 is small and flat with much more surface area compared to its volume.
Large surface-to-volume ratios give smaller values of Rq ,sa.
29-2.
0.24
Rq ,conv ≈ A [dvert]1/4 for D T = 100 °C ; From problem 29-1
Rq ,conv ≈ 24 0 [d vert]1/4 for D T = 100 °C and A = 10 cm2 = 10-3 m2
dvert
Rq ,conv
1 cm
76 °C/W
5 cm
113 °C/W
12 cm
141 °C/W
20 cm
160 °C/W
160
B
B
140
120
B
R q ,conv
100
°C/W
80
B
60
40
20
0
0
2
4
6
8 10 12 14 16 18 20
dvert [cm]
29-3.
1
Rq ,conv ≈ (1.34)(A)
Èd
˘
Í vert˙ 1/4
; Eq. (29-20)
Î D T ˚
Rq ,conv ≈353 [D T]-.25
A = 10 cm2 and dvert = 5 cm
D T
Rq ,conv
60 °C
127 °C/W
80 °C
118 °C/W
100 °C
112 °C/W
120 °C
107 °C/W
140
120
B
B
B
B
100
Rq ,conv
°C/W
80
60
40
20
0
60
70
80
90
D T [°C]
100
110
120
29-4.
R,q rad =
!D T
ÊÁ Ê Ts ˆ 4 ÊÁ Ta ˆ˜ 4 ˆ
˜
Á
˜
5.1! A! Ë ! Ë 100¯ ! -! Ë 100¯ ! ¯
120! -! Ta(° C)
R,q rad = 196 È
ÈÍ Ta(° K)˘ 4! ˘˙
Í
˙
! Î 239! -! Î 100 ˚ ˚
; Eq. (29-17)
; A = 10 cm2 and Ts = 120 °C
Ta
Rq ,rad
0 °C
128 °C/W
10 °C
123 °C/W
20 °C
119 °C/W
40 °C
110 °C/W
140
120
B
B
B
B
R
100
q ,rad
80
[ °C / W ]
60
40
20
0
0
5
10
15
20
25
Ta [°C ]
!D T
30
35
40
29-5.
R,q rad =
!D T
ÊÁ Ê Ts ˆ 4 ÊÁ Ta ˆ˜ 4 ˆ
˜
Á
˜
5.1! A! Ë ! Ë 100¯ ! -! Ë 100¯ ! ¯
R,q rad = 196 È È
ÍÍ
!Î Î
Ts(° C)! -! 40
˘˙
Ts(° K)˘˙ 4!
˚
-! 96˚
100
; Eq. (29-17)
; A = 10 cm2 and Ta= 40 °C
Ts
Rq ,rad
80 °C
114 °C/W
100 °C
120 °C/W
120 °C
110 °C/W
140 °C
101 °C/W
120
B
B
B
B
100
R q ,rad
80
[ °C / W ]
60
40
20
0
80
90
100
110
T s [ °C ]
150! ° C! ! -! 50! ° C!
120
130
140
29-6.
PMOSFET,max =
150! ° C! ! -! 50! ° C!
! 1! ° C/W
Solving for fs yields fs = 50 kHz
= 100 W ; 100 W = 50 + 10-3 fs
29-7.
PMOSFET = 50 + 10-3 • 2.5x104 = 75 W
Rq ,ja = Rq ,jc + Rq ,ca =
150! ° C! ! -! 35! ° C!
! 75! W
Rq ,ca = 1.53 - 1.00 = 0.53 °C/W
= 1.53 °C/W
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