PART 2:
Objectives
We have to gain a practical understanding of State Diagrams and State Tables.
• We have to understand the concept of designing Sequential Circuits using Flip-Flops.
• We have to design and implement a Synchronous Sequential Circuit given a State Diagram.
•
List of Equipment:
Trainer board
2 x IC 7476 JK Flip-Flop
3 x IC 7408 2-input AND gates
3 x IC 7404 Hex inverters (NOT gates)
2 x IC 7432 2-input OR gates
1 x IC 7474 Dual D Flip-Flops
Logisim
F.1 Experimental Data: Constructing a Sequential Circuit using JK Flip-Flops
Present state
A
B
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
Input
X
0
1
0
1
0
1
0
1
Next state
A
B
0
1
1
0
0
1
1
0
X
X
1
0
0
0
X
X
Output
Y
0
1
0
1
0
0
X
X
Flip-flop input functions
JA
KA
JB
KB
0
X
1
X
1
X
0
X
0
1
X
X
X
X
X
X
0
1
X
X
Table F.1.1: State Table for circuit using JK Flip-Flops
X
X
0
0
X
X
0
1
X
X
X
X
JA = X
KB = X
JB = A’X’
KA = X
Y = A’X
Figure F.1.1: Circuit Diagram (JK flip-flop)
F.2 Experimental Data: Constructing a Sequential Circuit using T Flip-Flops
Present state
A
B
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
Input
X
0
1
0
1
0
1
0
1
Next state
A
B
0
1
1
0
0
1
1
0
1
0
0
0
X
X
X
X
Output
Y
0
1
0
1
0
0
X
X
Flip-flop input functions
TA
TB
0
1
1
0
0
0
1
1
0
0
1
0
X
X
X
X
Table F.2.1: State Table for circuit using T Flip-Flops
Figure F.2.1: Circuit Diagram (T flip-flop)
F.3 Experimental Data: Constructing a Sequential Circuit using D Flip-Flops
Present state
A
B
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
Input
X
0
1
0
1
0
1
0
1
Next state
A
B
0
1
1
0
0
1
1
0
X
X
1
0
0
0
X
X
Output
Y
0
1
0
1
0
0
X
X
Flip-flop input functions
DA
DB
0
1
1
0
0
1
1
0
X
X
Table F.3.1: State Table for circuit using D Flip-Flops
1
0
0
0
X
X
DA = A’X+AX’
= A⊕X
DB = A’X’
Y = A’X
IC 7474
SD0 ,SDi  4, 10 
VCC-14
R0, RDi  1, 13 
GND-7
3, 11  Clk
Active High
Figure F.3.1: Circuit Diagram (D flip-flop)
Q/A:
1. Simulate the sequential circuits you built using the T and D Flip-Flops (Fig. F.2.1 and Fig. F.3.1)
using Logisim. If your lab group number is even, submit the screenshots of your circuits with the
Flip-Flop states set to 00 and if your lab group number is odd, submit the screenshots of your
circuits with the states set to 01.
Answer:
Simulation: Sequential circuit using T flip-flop
Simulation: Sequential circuit using D flip-flop
2. Draw the IC diagram for the logic circuit in Figure F.1.1
Answer:
Discussion:
From the first part of this lab, we have got to know about flip-flops and shift register and how this
works. We also got to know about how to construct a JK flip-flop using basic logic gates, how to
construct T and D flip-flops using JK flip-flops and how to create a shift register using D flip-flops.
And from the 2nd part of this lab, we have got to know about how to construct a sequential circuit
using JK, T and D flip flops.
Since we have done some of the works in logisim, we did not face those errors which we could have
faced in the hardware lab. For example- human errors, environmental errors, equipment errors; such
as- we could have faced problem with the clock pulse system and also with faulty IC we could have
faced problems with wires, we could have connected the wires loosely or in the wrong port which
could have made our experiments lengthy and maybe unsuccessful too. But we did not face these
problems online. That is why, our experiment went very smoothly.
[ THANK YOU ]