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Analysis of a Modified
Single Phase Multilevel Cascaded Inverter Circuit
*M.K.A.Ahamed Khan1,Manickam Ramasamy2, Chun Kit Ang3,Lim Wei Hong3, Tran Duc Chung4, Kalaiselvi
Aramugam5,S.Sridevi6
*1
UCSI University, Faculty of Engineering, Corresponding author
2,3,5
UCSI University, FETBE,
Kuala Lumpur-56000, Malaysia, mohamedkhan@ucsiuniversity.edu.my
4
chungtd6@fe.edu.vn, FPT University, Vietnam . 6sridevi@tce.edu,TCE Madurai, India.
Abstract— In this paper a modified circuit of single phase five
level cascaded inverter state of art design topology is discussed.
The modified circuit has reduced number of switches and a
comparison of the total harmonic distortion with various pulse
width modulation techniques was carried out. A multicarrier
sinusoidal pulse width modulation technique is used to control
the distortion in the output of the inverter. Several types of multi
carrier pulse width modulation techniques have been analyzed in
this paper. For higher modulation index value the Phase
Disposition offers the lowest level of Total harmonic distortion.
To validate the objective MATLAB/Simulink simulation software
was used and it has been justified by using the experimental
results.
Keywords- Sinusoidal pulse width modulation(SPWM),
cascaded multi level
inverter (CMLI), and total harmonic
distortion (THD).
I. INTRODUCTION
Inverter is a power converter circuit mainly used to
synthesize the required AC output from DC source. During the
conversion from DC to AC many limitations related to the type
and number of switches is involved [1]. The inverter circuit
considered here has many advantages over other types of
inverters such as reduced harmonic content. In most of the
inverters designed earlier before, the crucial drawback is that
the optimal switching angles could not be calculated in realtime and one has to rely on lookup tables with pre calculated
angles. Though some inverters offer better quality of the
generated waveform and lower switching losses there are also
drawbacks associated with this technology: more switching
devices and associated gate driver circuitry, more complex
modulation and control of the DC-link capacitor voltage
sharing etc,[10]
The state of art design is carried out in various
sections. In the first section a multilevel inverter (MLI) and its
standard circuits are discussed. SPWM techniques are
discussed in the second section. In the third section both the
advantages and the disadvantages of the various Inverter
circuits are discussed. Gate switch is done by using the , the
multicarrier SPWM. Lastly the simulation results and the
analysis of total harmonic distortion are presented.
A. Multilevel Inverters Cascaded
With their own isolated dc bus, cascaded multilevel inverter
is made up from a series connected single full bridge inverters.
Almost a sinusoidal voltage waveform can be obtained from
several separate dc sources[2]. DC sources can be obtained
from batteries, fuel cells and solar cells. Transformer, clamping
diodes or flying capacitors are not required in this inverter
design..
Five different voltage outputs ranging from +2Vdc, +Vdc,
0, –2Vdc and –Vdc can be generated by connecting the dc
sources to the ac output by various combinations of the four
switches. Sum of all the Inverter outputs equals to the output
voltage of an M-level inverter [3]. Each H-bridge unit
generates a quasi-square waveform and switches at its
fundamental frequency and each switching device always
conducts for 180˚ regardless of the pulse width of the square
wave .For high voltage and high power inversion with its
ability to produce better harmonic spectrum this Inverter is
widely used.
B. SPWM Multicarrier Techniques
Level – shifted modulation is considered to avoid the total
harmonic distortion resulting in H –bridge Inverters. It requires
(m-1) triangular carriers[4], all having the same frequency and
amplitude to design a m-level multilevel inverter using levelshifted multicarrier modulation scheme. There are three
alternative carrier disposition Pulse width modulation strategies
are used mainly based on the phase shift angle[5],:
II. MODIFIED SINGLE PHASE INVERTER CIRCUIT
i = 1…n (Total number of full bridge inverters
included) for the n level type.
b) Ia is the cascaded inverter output current.
c) S1i and S2i are the full bridge inverter upper switches.
a)
V DC
S4
S2
Dz
S1
Rload
For each phase of the multilevel cascaded inverter the output
voltage is given by:
V DC
S3
S5
Von = ∑ Voi
Figure 1: Modified single phase inverter with five switches
and two sources.
i = 1,2…..n
(3)
For different type of multicarrier the modulation Index for
SPWM techniques is shown in the Table 1 .
Table 1: Modulation Index
Voltage
APODIndexModulation
2Vdc
Vdc
𝐴𝑟
𝑛′𝐴𝑐
0
π
time
Ma
-Vdc
-2Vdc
Alternative
Phase
Opposition
Disposition
POD-Phase
Opposition
Disposition
PD-Phase
Disposition
𝐴𝑟
𝑛′ 𝐴𝑐
𝐴𝑟
𝑛′ 𝐴𝑐
Where n’ = (n - 1) / 2
Figure 2: Output voltage waveform by the modified inverter
The modified circuit of inverter with less number of
switches, full-bridge inverter, capacitor voltage divider, and an
auxiliary circuit comprising four MOSFET switches is shown
in Figure 1.The inverter topology produces improved output
voltage quality, lesser filter size, less electromagnetic
interferences, and less total harmonics distortion..
and the modulation frequency ratio (Mf) is the ratio
between the carrier frequency (fc) to its reference
frequency (fm) and is given by[8][9] ,
Mf = fc / fm
(4)
IV. OPERATION MODE AND SWITCHING TECHNIQUE
SIMULATION
Ac voltage wave form is produced from using separate dc
sources. Each H-bridge inverter is connected to its own dc
source Vdc. If i stands for one particular H-bridge inverter, to
obtain the total ac voltage produced by the multilevel inverter,
five distinct ac voltages are summed together. A cascaded Hbridges multilevel inverter can produce S’= 4 + (n-1) distinct
levels in the output phase voltage [6][7].
III. MODULATION PARAMETERS AND MODELLING OF HBRIDGE INVERTER
Output voltage of each level is given by
V0i = Vdc (S1i – S2i)
(1)
The input dc current is
Idci = Ia (S1i – S2i )
Where,
(2)
Figure 3: Operation modes of a Modified cascade MLI : (a)
0Vdc (b) Vdc (c) 2Vdc (d) 0Vdc (e) –Vdc (f) -2Vdc
Each H-bridge inverter can produce five different voltages by
closing the appropriate switches: S2 and S4 of H-bridge
inverter are closed, the output voltage is 0 .S2 and S5 are
closed, the voltage is +Vdc. Switch S1, S2 and S5 are closed,
the voltage is +2Vdc. Switch S3 and S5 are closed, the
voltage output and when S4 and S5 of one particular H-bridge
inverter are closed, the voltage output is –Vdc, as S4 and S5
are closed, voltage is -2Vdc.
V. MODIFIED MULTILEVEL INVERTER SIMULATION CIRCUIT
In this section using multicarrier SPWM techniques for the
five level inverter, switching pattern are simulated with the
use of R2012a MATLAB. This circuit is modified from eight
switches .Only MOSFET switches are used as power switch.
Simulations are carried out by varying the subsystem in the
simulation circuit and their corresponding output voltage are
recorded. The multicarrier SPWM techniques such as POD,
APOD, and PD are well discussed and the simulation results
are recorded.
Using FFT Analysis in Simulink the Total Harmonic
Distortion (THD) for all techniques was calculated. The
following values are implemented for simulation results: Vdc=
210V, fc=1200Hz and R =40Ω.
Figure 4 shows the simulation diagram of modified single
phase five level output voltage cascaded multilevel inverter.
Figure 5: Circuit diagram of pulse width modulation of
modified single phase five level output voltage cascaded
multilevel inverter
Table 2 shows the five level output voltage switching
strategy by using five switches.
Table 2: Modified single phase five level output voltage
cascade multilevel inverter Switching states
Voltage
Levels
Switching conditions
Diode Switch1 Switch2
Switch3
Switch4
Switch5
2VDC
Off
On
On
On
Off
Off
VDC
On
Off
On
On
Off
Off
+0
Off
Off
On
Off
On
Off
-0
Off
Off
Off
On
Off
On
-VDC
On
Off
Off
Off
On
On
-2VDC
Off
On
Off
Off
On
On
Figure 6 shows the switching patterns
Figure 4: Modified single phase five level output voltage
cascaded multilevel inverter circuit
Figure 5 shows the Circuit diagram of pulse width modulation
of modified single phase five level output voltage cascaded
multilevel inverter. Table 2 shows the output voltage levels,
according to the on/off switch conditions, .
Figure 6: Pulse generated multicarrier PWM technique output
voltage waveforms.
A. (APOD) PWM Alternative Phase Opposition Disposition
Carrier arrangement is shown in Figure 7. All the carriers
have the same frequency, same amplitude; and they are phase
shifted by 180° with its adjacent carriers.
Figure 9: PD PWM Carrier arrangement
VI. SIMULATION RESULTS OF MODIFIED SINGLE CASCADED
MULTILEVEL INVERTER
Figure 10 shows APOD PWM switching technique five
level output voltage from the modified circuit multilevel
inverter. THD is 36.55% of five-level output voltage from
modified inverter at the modulation index = 0.8 as per Figure
11.
Figure 7: Carrier arrangement for APOD PWM strategy
B. (POD) PWM Phase Opposition Disposition
All the carriers above zero reference value are in phase
but in opposition with those below which is shown in the
Figure 8.
Figure 10: APOD PWM Output voltage waveform
Figure 8: POD PWM Carrier arrangement
C. (PD) PWM Phase Disposition
Figure 11: APOD PWM technique THD value
Here the carriers above and below the zero reference line
are in phase. The carrier arrangement is shown in the Figure 9.
Figure 12 shows the output voltage from the modified circuit
multilevel inverter with POD PWM switching technique. The
THD is 36.42% , modulation index = 0.8 as shown in Figure
13.
Figure 12: Voltage waveform POD PWM
Figure 15: THD for PD PWM technique
From Table 3, the Phase Disposition (PD) has the low
harmonic distortion. Figure 16 shows the summary of THD
for different modulation techniques. It is concluded that the
Phase Disposition (PD) SPWM technique has good harmonic
spectrum with THD (33.53 %) for the modulation index, Ma =
0.8.
Table 3
Figure 13: THD for POD PWM technique
Figure 14 shows the voltage wave form for the inverter
during using PD PWM switching technique. The THD is
33.53% , modulation index = 0.8 as per Figure 15.
MaModulation
Index
0.4
74.18
POD-Phase
Opposition
Disposition
74.18
0.6
42.09
39.34
36.26
0.8
36.55
36.42
33.53
1
29.74
26. 84
25.76
1.2
23.56
22.03
19.78
APOD-Alternative Phase
Opposition Disposition
PD-Phase
Disposition
77.01
THD vs Modulation Index
%THD
80
60
40
APOD
20
POD
0
0.4
0.6
0.8
1
1.2
PD
Ma
Figure 14: Voltage waveform using PD PWM
Figure 16: THD comparison
VII. CONCLUSION
By using state of art design a modified single phase five
level cascade multilevel inverter was designed and the
experimental verification of simulation results is carried out.
To remove the harmonics, SPWM was used and the overall
performance of the system was improved. Results obtained
show the successful harmonics elimination. By utilizing the
different configuration of multilevel SPWM techniques the
harmonics are reduced significantly. For higher modulation
index value the Phase Disposition offers the lowest level of
Total harmonic distortion.
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