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SVM based THD reduction for MLI fed induction motor drive

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THD Reduction in Performance of Multi-Level
Inverter fed Induction Motor Drive
G.Durgasukumar, M.K.Pathak
Abstract— Multi-level voltage source inverters offer several
advantages such as a better output voltage with reduced total
harmonic distortion (THD), reduction of voltage ratings of the
power semiconductor switching devices and also the reduced
electro-magnetic interference problems etc. This paper presents
the application of simplified space vector modulation (SVM)
method for three-level, five-level and seven-level diode clamped
inverters feeding a three-phase Induction motor. The space
vector diagram of the multi-level inverter is decomposed into six
space vector diagrams of two-level inverters. This paper
compares total harmonic distortion values of voltage and current
waveforms of Induction motor to the conventional two-level
inverter drive using diode clamped multi-level inverter (Three,
five and seven level).
Keywords— Five-level inverter, Induction motor, Multi-level
inverter, SVM, Seven-level inverter, Two-level inverter, Threelevel inverter, Total harmonic distortion (THD).
I. INTRODUCTION
In a conventional two-level inverter configuration, the
harmonic reduction of an inverter output current is achieved
mainly by raising the switching frequency. But in high power
applications, the switching frequency of the power device has
to be restricted below 1 KHz due to the increased switching
losses and also the level of dc-bus voltage. On the other hand,
the very high dv/dt generated with high dc-link voltage is
responsible for the electromagnetic interference and motor
winding stress [1]. So from the aspect of harmonic reduction
and high dc-link voltage level, multi-level inverters are more
suitable.
Many researchers have worked on the space vector
modulation of multilevel inverters [2]-[9]. In [2], a method of
SVPWM for high level inverters that represents output vector
in three-dimensional Euclidean space is presented. The
method is based on the fact that increasing the number of
levels by one always forms an additional hexagonal ring of
equilateral triangles, which surrounds the outermost hexagon.
In [3], the hexagon representing space vector diagram is
flatten and the reference voltage vector is normalized in order
to reduce computations of the algorithm. In [4], a SVPWM
with a predictive current control loop have presented. In this
load current is predicted for all output voltage vectors of the
inverter. The current error is calculated and the switching state
is selected when the value of the error is less. In [5], a space
vector modulation allows reduction in the inverter output
voltage distortion due to turn-off, turn-on and dead times of
power modules, without increasing the harmonic content.
G.Durgasukumar and M.K. Pathak are with Departmant of Electrical
Engineering, IIT Roorkee, India. (e-mail: durgadee@iitr.ernet.in and
mukesfee@iitr.ernet.in
In [6], a simple space vector pulse width modulation
algorithms for a multilevel inverter for operation in the overmodulation range have presented.In [7], a relationship
between space-vector modulation and carrier-based pulsewidth modulation for multilevel inverter has presented. In [8],
a generalized method of space vector pulse-width modulation
for multilevel inverter has presented. In this, instantaneous
reference space vector position of a multilevel inverter is not
required. Drawback of this method is it cannot identify the
sector containing the reference space vector.
Although these methods propose general SVPWM
algorithms for multilevel inverter, the coordinate
transformations used in these algorithms are somewhat
complicated. In [9], a new simplified space vector pulse width
modulation (SVM) method for three-level inverter is
proposed. In this paper, a simple SVPWM method for threelevel, above three-level inverter and comparison of total
harmonic distortion presented. By using the new SVPWM
strategy, effective time calculation and switching sequence
selection are easily done like conventional two-level inverter.
Simulation studies are carried out using 3-Phase, 50HP, 400V,
50Hz, and 1500RPM induction machine.
II.
SVM FOR TWO-LEVEL INVERTER
Fig.1(a) represents the typical power stage of the three
phase two level inverter and the equivalent circuits of a threephase induction motor. Van,Vbn,Vcn are the pole voltages
produced in the inverter stage and also the voltages that are
applied to the motor. Eight different switching states (V0-V7)
are possible for the three phase inverter. Note that all the
machine terminals are connected to each other electrically and
none effective voltages are applied to machine when the zero
vectors presented by V0 and V7 are selected.
The remaining six voltage vectors can be selected to apply
an effective voltage to the machine and these vectors can be
located on the vector space represented with the stator fixed dq reference frame as shown in the Fig 1(b). If a constant
reference voltage vector V*or Vref is given in one sampling
period, this vector can be generated using zero vector (V0 or
V7) in combination with only two nearest active vectors (V(n)
and V(n+1)).
These two active vectors are considered as the effective
vectors to generate desired output voltage. From the average
voltage concept, the reference vector can be written as
followings during one sampling period.
‫ כ‬ൌ ሺଵ Ǥ ୬ ൅ ଶ Ǥ ୬ାଵ ሻȀୱ
Where T1, T2 are the applied effective times corresponding
to the active vectors V1-V6.
III. SIMPLIFIED SVM FOR MULTI--LEVEL INVERTER
A. Basic principle
The space-vector diagram of an
ny multi-level inverter is
composed of six hexagons, which
h can be reduced insteps
further into the space-vector diagraams of conventional twolevel inverters. The space vector diagram three-level inverter
and its two level hexagons are show
wn in Fig. 3(a) and 3(b). A
multi-level space-vector plane is traansformed to the two-level
space-vector plane by using the two steps.
1) From the location of a given reference voltage, one hexagon
has to be selected.
2) The original reference voltage veector has to be subtracted
Fig. 1. Two-level inverter and the equivalent circuit of a machine and Space
by the amount of the center voltaage vector of the selected
vector diagram of the effective vectoors
hexagon.
The effective time can be calculated as,
Determination of switching sequeence and the calculation of
the
voltage vector duration time iss done as in conventional
‫כ‬
‫כ‬
ୱ୧୬ቀ
ିቁ
୚ Ǥ୘౩
୚ Ǥ୘౩ ୱ୧୬ሺሻ
య
ଵ ൌ
ଶ ൌ
two
level SVPWM method.
మ
,
మ
୚
୚
ୱ୧୬ቀ ቁ
ୱ୧୬ቀ ቁ
ౚౙ య
య
ౚౙ య
య
T0= Ts-T1-T2
Where T0 is the time corresponding to nulll vector Vdc is the
DC linkage Voltage and Ts is sampling time.
In Fig.2, the relationship between the efffective times and
the actual gating times is depicted when the rreference vector is
located in the Sector-1. In this case the V1 veector is applied to
the inverter during T1 interval, and consequeently V2 vector is
applied during T2 interval. In the three phhase symmetrical
modulation method, the zero sequence vooltage vectors is
distributed symmetrically in one sampling peeriod to reduce the
current ripple. Thus, in general, the switchhing sequence is
given by 0-1-2-7-7-2-1-0 within two sampliing periods. With
the point of view of the upper switchingg devices of one
inverter leg, the former sequence (0-1-2-7 seequence) is called
‘ON’ sequence, and the latter (7-2-1-0) is called ‘OFF’
sequence in this paper.
Fig. 2 Actual gating signal pattern of the space vector PWM
(in the case of the sector -1)
Therefore, the actual switching times correesponding to the
case of sector-1 can be written as
Off Gating Sequence: ON gating Seqquence:
Tga=T0/2
Tga= T0/2+T1+
+T2
Tgb=T0/2+T2
Tgb=T0/2+T2
Tgc=T0/2
Tgc=T0/2+T1+T2
Fig. 3 Space vector diagram of thrree-level inverter and six
two-level hexaagons
B. Correction of reference voltage vector
v
By the location of a reference vo
oltage vector, one hexagon
is selected among the six small heexagons that comprise the
multi-level space-vector diagram. The reference voltage
he selected hexagon. This
vector should lie in the inner of th
procedure divides the multi-level space-vector
s
diagram into
six regions that are covered by eaach small hexagon. If the
reference voltage vector stays in
i the regions that are
overlapped by adjacent small hexago
ons, the multi-level spacevector diagram can have multiple vaalues that are possible. Fig.
4(a) and (b) illustrate two possible ways of selecting the
switching value for a three-lev
vel. Once the value is
determined, the origin of a referencee voltage vector is changed
to the center voltage vector of the selected hexagon. This is
or of the selected hexagon
done by subtracting the center vecto
from the original reference vector, as
a shown in Fig.5. Similar
procedure is adapted for more than th
hree- level also.
In calculating the effective tim
mes, the only difference
between the two-level SVM and th
he multi-level (Three, five
and seven level) SVM is multiplying
g factor 2 ,4 and 6 appears
respectively.
Fig.4 Three-level inverter simplification diagram
(b)
TABLE II
FIVE-LEVL SWITCHING STATES
Fig. 5 Change base vector of original reference voltage vector in three level
Fig. 6. represent circuit diagram of a three, five and sevenlevel inverter and their corresponding switching states of uphase of the inverters are given in Table I, II, III.
Switch
ing
Table
P2
S1u
S2u
S3u
S4u
S5u
S6u
S7u
S8u
on
on
on
on
off
off
off
off
Term
-inal
voltage
2Vdc
P1
off
on
on
on
on
off
off
off
Vdc
0
off
off
on
on
on
on
off
off
0
N1
off
off
off
on
on
on
on
off
-Vdc
N2
off
off
off
off
on
on
on
on
-2Vdc
Switching states
(a)
TABLE I
THREE LEVEL SWITCHING STATES
Switching
symbol
P
O
N
Switching states
S1u S2u S3u S4u
On On Off off
Off On On off
Off Off On on
Terminal
voltage
Vdc
0
-Vdc
(c)
Fig.6 Inverter circuit diagram. (a) Three level,
(b) Five level, (c) Seven level
TABLE III
SEVEN-LEVEL SWITCHING STATES
Switching
symbol
P3
P2
P1
O
N1
N2
S1u
on
off
off
off
off
off
S2u
on
on
off
off
off
off
S3u
on
on
on
off
off
off
S4u
on
on
on
on
off
off
S5u
on
on
on
on
on
off
N3
off
off
off
off
off
Switching states
S6u S7u S8u
on off off
on on off
on
on
on
on
on
on
on
on
on
on on on
off
on
on
S9u
off
off
off
on
on
on
S10u
off
off
off
off
on
on
S11u
off
off
off
off
off
on
S12u
off
off
off
off
off
off
on
on
on
on
Terminal
voltage
3Vdc
2Vdc
Vdc
0
-Vdc
-2vdc
-3Vdc
IV. SIMULATION RESULTS
Speed(RPM)
Torque(N-m)
2) Performance parameters of induction motor:
ic(Amp)
ib(Amp)
ia(Amp)
A. Two-level inverter fed induction motor
Fig.7 shows the simulink model of two-level inverter fed
induction motor drive. The corresponding line-line voltages
and the performance parameters speed, torque (Te) and
currents (ia, ib, ic) are shown in Fig. 8 and Fig. 9 respectively.
2000
0
-2000
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
0
0.1
0.2
0.3
0.4
0.5
0.6
Time(Sec)
0.7
0.8
0.9
1
500
0
-500
500
0
-500
500
0
-500
500
0
-500
Fig. 9. Two level inverter fed induction motor performance parameters
Fig. 7. Two-level inverter circuit fed induction motor simulink model
1) Line-Voltages:
B. Three-level inverter fed induction motor
Fig. 10 shows the simulink model of three-level inverter
fed induction motor drive. The corresponding line-line
voltages and the performance parameters speed, torque (Te)
and currents (ia, ib, ic) are shown in Fig. 11 and Fig. 12
respectively.
Fig. 8. Two-level inverter line-line voltages
Fig. 10. Three-level inverter circuit fed induction motor simulink model
1) Line voltages:
1) Line-Voltages:
500
vab(Volts)
vab(Volts)
500
0
-500
0.1
0.12
0.14
0.16
0.18
-500
0.1
0.2
0
-500
0.1
0.12
0.14
0.16
0.18
vca(Volts)
0
0.12
0.14
0.16
Time(Sec)
0.18
-500
0.1
0.2
0.12
0.14
0.16
0.18
0.2
0.12
0.14
0.16
Time(Sec)
0.18
0.2
-2000
0
0.2
0.4
0.6
0.8
1
500
0
-500
0
0.2
0.4
0.6
0.8
1
-1000
0
0.2
0.4
0.6
0.8
1
ia(Amp)
1000
0
-1000
0
0.2
0.4
0.6
0.8
1
ib(Amp)
1000
0
1000
0
-1000
0
0.2
0.4
0.6
0.8
1
Time(Sec)
Fig. 12. Three-level inverter fed induction motor performance
parameters
C. Five-level inverter fed induction motor
Fig.13 shows the simulink model of two-level inverter fed
induction motor drive. The corresponding line-line voltages
and the performance parameters speed, torque (Te) and
currents (ia, ib, ic) are shown in Fig.14 and Fig.15
respectively.
Fig. 13 Five-level inverter circuit fed induction motor simulink model
2000
0
-2000
Te(N-m)
0
Speed(RPM)
2) Performance parameters of induction motor:
2000
ic(Amp)
Speed(RPM
0.2
Fig. 14. Five-level inverter line-line voltages
2) Performance parameters of induction motor :
Te(N-m)
0.18
0
Fig. 11. Three -level inverter line-line voltages
ia(Amp)
0.16
500
-500
0.1
ib(Amp)
0.14
0
-500
0.1
0.2
500
ic(Amp)
0.12
500
vbc(Volts)
vbc(Volts)
500
vca(Volts)
0
0
0.2
0.4
0.6
0.8
1
0
0.2
0.4
0.6
0.8
1
0
0.2
0.4
0.6
0.8
1
0
0.2
0.4
0.6
0.8
1
0
0.2
0.4
0.6
0.8
1
500
0
-500
1000
0
-1000
1000
0
-1000
1000
0
-1000
Time(Sec)
Fig. 15. Five-level inverter fed induction motor performance parameters
D. Seven-level inverter fed induction motor
Fig. 16 shows the simulink model of two-level inverter fed
induction motor drive. The corresponding line-line voltages
and the performance parameters speed, torque (Te) and
currents (ia, ib, ic) are shown in Fig. 17 and Fig. 18
respectively.
Fig. 16 Seven-level inverter circuit fed induction motor simulink model
1) Line voltages:
1) It saves controller memory in case of experimental
realization because switching sequence is determined
without look-up table.
2) It reduces the execution time off the Multi-level SVPWM
because the effective times of voltage vectors are
calculated in the same manner of
o two-level SVPWM.
3) There are no significant chan
nges in computation with
increase in the level.
Vab(Volts)
500
0
-500
0.1
0.12
0.14
0.16
0.18
8
0.2
0.12
0.14
0.16
0.18
8
0.2
Vbc(Volts)
500
0
-500
0.1
VI.
Vca(Volts)
0
NCES
VII. REFEREN
-500
0.1
0.12
0.14
0.16
Time(sec)
0.18
8
0.2
Fig. 17. Seven-level inverter line-line vooltages
ib(Amp)
ia(Amp)
Te(N-m)
Speed(RPM)
2) Performance parameters of induction mottor:
ic(Amp)
ACKNOWLEDG
GEMENT
The help and support of Mr. Abh
hiram during the course of
this work is acknowledged.
500
2000
0
-2000
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
0
0.1
0.2
0.3
0.4
0.5
0.6
Time(Sec)
0.7
0.8
0.9
1
500
0
-500
1000
0
-1000
1000
0
-1000
1000
0
-1000
Fig. 18. Seven-level inverter fed inductionn motor
performance parameters
E. Comparison of %THD
The %THD values of inverter line voltagees and Currents up
to 1000Hz range is as given below.
TABLE IV
%THD VALUES
Parameters
Vab
Vbc
Vca
ia
ib
ic
2 level
4.58%
4.83%
4.96%
11.86%
13.91%
15.29%
3 level
3.61%
3.76%
4.39%
6.89%
8.23%
7.86%
5 level
1.53%
1.84%
1.43%
4.22%
3.26%
2.41%
7 level
1.23%
1.27%
1.24%
2.77%
2.47%
1.96%
V.CONCLUSION
A comparative study on THD of output line-line voltage
and current waveforms of two-level, three-levvel, five-level and
seven-level three-phase diode clamped invverters has been
presented in this paper using simplifieed space vector
modulation technique. It is observed that as the level of
inverter increases there is an improvement inn the performance
of induction motor compared to the conveentional two-level
inverter. The THD of line-line voltages annd phase currents
decreases with the increase in number of levels of inverter.
The simplified SVPWM offers following advvantages.
[1] X. Wu, Y. Liu, and L. Huang, “A Novel space vector modulation
algorithm for three-level PWM voltage source inverter,” in Proc. IEEE
C
and Power Engineering,
Conf. Computers, Communications, Control
Vol. 3, pp. 1974–1977, Oct. 2002.
[2] N. Celanovic and D. Boroyevich, “A
A fast space-vector modulation
algorithm for multilevel three-phase converters,” IEEE Trans. Ind.
Appl., vol.37, pp.637-641, 2001.
o, and L.G. Franquelo, “New fast
[3] M.M. Prats, R. Portillo, J.M. Carrasco
space-vector modulation for mulltilevel converters based on
geometrical considerations,” in Procc. 28th Annual Conf. Industrial
Electronics Society, Vol. 4, pp. 3134–3
3138, Nov. 2002.
[4] G.S. Perantzakis, F.H. Xepapas and S.N. Manias, “ Efficient predictive
vel voltage source inverters,” in
current control technique for multilev
Proc. 11th EPE European Conf. Pow
wer Electronics and Applications,
Dresden, 2005.
[5] C.Attainese, V.Nardi, and G.Tomassso, “Space vector modulation
algorithm for power losses and THD reduction in VSI based drives,”
Electrical power components and systeems, vol.35, pp.1271-1283, 2007.
[6] Amit Kumar Gupta and Ashwin M. Khambadkone,”
K
A General Space
Vector PWM Algorithm for Multileveel Inverters, Including Operation
in Over-modulation Range,” IEEE Trans.
T
power. Electron., vol. 22,
pp.517-526, March 2007.
yu Lu, “ Comparisons of space[7] Wenxi Yao, Haibing Hu, and Zhengy
vector modulation and carrier-bassed modulation of multilevel
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[8] Aneesh Mohamed, A.S.Anish Gopin
nath, and M.R.Baiju, “A simple
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p.1649-1656, May 2009.
IEEE Trans. Ind. Electron., vol. 56, pp
[9] Jae Hyeong Seo, Chang Ho Choi, and
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545-550, july 2001.
G.Durgasukumar received
d Master’s degrees in Electrical
Engineering from J.N.T.U, Hyderabad (India) and pursuing
his Ph.D.degree in the Elecctrical Engineering Dept, Indian
Institute of Technology, Roorkee, India. His research
interests include power electtronics and electric drives.
Mukesh Kumar Pathak
k was born in Hamirpur (HP),
India, in 1966. He did
d his graduation in Electrical
Engineering from L.D. En
ngineering College, Ahmedabad
(Gujarat), India, in 1986. He
H joined Electrical Engineering
Department of NIT, Kuru
ukshetra (Haryana), India, as a
Lecturer in 1987. In 1989 he joined Electrrical Engineering Department of
NIT, Hamirpur (HP), India, where he serrved till 2007. Presently, he is
working as an Assistant Professor in Electricaal Engineering Department of IIT
Roorkee, India, where he joined in 2007. He obtained
o
both his M.Tech (Power
Electronics, Electrical Machines and Drivees) and Ph.D. degrees from IIT
Delhi, India. He has co-authored a book on
n Electric Machines. He is Life
Fellow of Institution of Engineers (India), Liife member of Indian Society for
Technical Education (ISTE) and Systems Socciety of India (SSI).
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