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CHAPTER 6
CONCLUSION AND SCOPE FOR FUTURE RESEARCH
6.1
CONCLUSION
The different control techniques like Phase Opposition Disposition,
Alternate Phase Opposition Disposition, Third Harmonic Injection Pulse
Width Modulation and Sine Pulse Width Modulation for five level cascaded
multilevel inverter are simulated and compared. A novel modulation
technique is proposed for multilevel voltage source inverter and simulated in
the MATLAB/SIMULINK environment and its performance parameters are
analyzed for different levels of multilevel inverter. The output parameters like
output percentage THD, percentage THDV and percentage THDI are
analyzed.
All the modulation techniques yield more or less the same output
fundamental component only but the lower order harmonic distortion levels
will differ with techniques for the various modulation indexes.
At lower
modulation indexes, the percentage THD levels are higher and it is not
preferred for the practical applications. At higher modulation indexes the
Super Imposed Carrier based inverter contains the output THD of thirty five
percent, POD based inverter contains twenty three percent and the proposed
SVPWM yields the better output with THD of less than ten percent. With
SVPWM the load draws comparatively a smaller load current compared to
other techniques. The output waveforms of the voltage and load current are
also approximated sine wave.
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The cascaded multilevel inverter for different levels are modeled in
the MATLAB/SIMULINK environment. The cascaded inverter is the best
choice when compared to other multilevel topologies due to the absence of
the input voltage unbalance and freewheeling diodes. In the cascaded
multilevel inverter configuration the output percentage THD reaches zero as
the level of the inverter reaches infinity but it is not a feasible solution for
practical realization and hence the level of inverter is limited to five level and
the output percentage THD is controlled with the implementation of the
proposed SVPWM technique in the modern FPGA digital processor.
The code for the proposed hardware is generated in the system
generator environment and downloaded to the XC3S400 FPGA processor.
The three phase five level cascaded multilevel inverter power circuit and the
protection circuit for the same is constructed, tested and integrated with the
digital processor. The integrated module is tested for the lower voltage and
the voltage shall be increased to the desired value. The three phase output
voltages are analyzed and patterns are compared with the simulation outputs.
The output is connected to the three phase AC induction motor and
the output waveforms are analyzed with the FLUKE make power quality
analyzer. The waveforms were captured and they are coinciding with the
simulated values. The three phase voltage of 400 Volts AC is obtained across
the output terminals for the DC input of 432 Volts. The harmonics table is
also obtained for the different load conditions of the three phase induction
motor.
The third order output THDV for the 50Hz output supply voltage of
397V is 4.3% for all the phases and 5.1% for neutral. The fifth order output
THDV for the 50Hz output supply voltage of 397V is 0.6% for all the phases
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and 4.8% for neutral. The seventh order output THDV for the 50Hz output
supply voltage of 397V is in the range of 0.1 to 0.3% for all the phases and
2.7% for neutral. Similarly the third order output THDI for the 50Hz output is
4.3% for all the phases and 4.5% for neutral with the three phase output load
current of 2.25Amperes.
The fifth order output THDI for the 50Hz output supply is in
between 1.5 and 2.8% for all the phases and 8.7% for neutral with the load
currents of 2.25Amperes in each phase. The seventh order output THDI for
the 50Hz frequency is in between 1.5 and 1.8% for all the phases and 8.9%
for neutral with the load currents of 2.25Amperes in all the phases.
The implementation of the proposed technique reduces the THD
value significantly. The evaluated THD values very much satisfying the limits
prescribed by the different standards for THD. The evaluated hardware results
conform to the standards meant for power quality in addition to other
advantages.
6.2
SCOPE FOR FUTURE RESEARCH
The control technique for multilevel power converters can be
further simplified and generalized to different levels and other class of power
converters and inverters. The levels of multilevel configuration can be
increased and further improvements in terms of performance and power
quality issues can be broadly studied and could be implemented with
hardware circuits.
The same cascaded multilevel inverter configuration can be
installed for other applications like SVC system and performance can be
studied for larger AC systems. The proposed system can be designed for
larger electrical drives and parameters can be monitored and varied
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dynamically with high speed network interconnections. Hence the power
quality problems in power distribution can be controlled or completely
eliminated. The effect of EMI is not dealt in this thesis which can be studied
in detail for specific techniques with latest equipment.
The quality of the power supplied to the consumers and electrical
utilities should adhere to the stringent norms prescribed for the power quality.
In order to ensure the same power quality at all levels of consumer usage, the
dedicated low cost integrated chips for these kinds of applications could be
developed and manufactured in large scale. This makes the technology easily
accessible to common man.