University of Southern California USC Viterbi School Of Engineering

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U niversity of S outhern C alifornia
USC Viterbi School Of Engineering
Ming Hsieh Department Of Electrical Engineering
EE 348:
Homework Assignment #06
(Due 03/22/2007)-[Double Assignment]
Spring, 2007
Choma
Problem #23:
In the two-stage feedback amplifier depicted in Figure (P23), the response
to the input signal represented by the Norton equivalent circuit comprised of current Is and
source resistance Rs is the small signal component, say Ios, of the indicated current, Io, conducted
by transistor, M4. The three N-channel transistors are identical, and all transistors, which are biased for operation in their respective saturation regimes, have negligible drain-source channel
conductances, as well as negligibly small bulk-induced threshold voltage modulation. The coupling capacitor, Cc, is sufficiently large to enable its representation as a short circuit for the signal frequencies of interest. Assume that all N-channel transistors are biased identically.
+Vdd
M4
Vbias
Rin
Is
M3
Cc
M2
M1
Rs
Io
Rq
−Vss
Rf
R
−Vss
Figure (P23)
(a). Assuming that resistance Rq is very large, derive an expression for the current gain, Ao =
Ios/Is, first for the case of infinitely large resistance Rf and thence for finite Rf. The gain for
infinitely large Rf is known as the open loop current gain, while for finite Rf, the gain is referred to as the closed loop current gain. Comment on the relative values of the closed and
open loop current gains.
(b). Derive an expression for the closed loop input resistance, Rin. Once again, assume that Rq
is a very large resistance.
(c). If the coupling capacitance, Cc, is emulates a short circuit for radial frequencies larger than
ωL, exploit preceding results to stipulate a design guideline for selecting this capacitance.
(d). What effective small signal resistance, Rd1, is established between signal ground and the
drain terminal of transistor M1?
(e). What effective small signal resistance, Rs1, is established between signal ground and the
source terminal of transistor M2?
(f). What effective small signal resistance, Rd2, is established between signal ground and the
EE 348
USC Viterbi School of Engineering
J. Choma
drain terminal of transistor M2?
Problem #24:
In the source-degenerated, common source amplifier depicted in Figure
(P24), the feedback resistance, Rss, is 50 Ω, the drain circuit load resistance, Rl, is 1.3 KΩ, and
the Thévenin equivalent signal source resistance, Rs, is 75 Ω. The two resistances, R1 and R2,
which are used to deliver the proper biasing voltage to the gate-source terminals of the transistor,
are 1 MEG Ω and 500 KΩ, respectively. The indicated coupling capacitance, Cc, which serves
to isolate the signal voltage, Vs, from circuit standby voltages, is chosen large enough to emulate
a short circuit over the signal passband of interest. At the quiescent operating point forged by
the power supply voltage, Vdd, and the two circuit resistances, R1 and R2, the transistor operates
in saturation and delivers a forward transconductance, gm, of 35 mmhos, a drain-source channel
resistance, ro, of 18 KΩ, and a bulk transconductance coefficient, λb, of 0.07. The queries that
follow focus on the determination of the effective forward transconductance, Gm = Ios/Vs, where
Ios is the small signal component of the indicated current, Io. In this problem, only low signal
frequencies are of interest so that all internal device capacitances can be tacitly ignored.
+Vdd
Rl
Rin
Rs
Rl
Rout
Io
Cc
+
Vs
R2
Rss
−
Figure (P24)
(a). With Rss set to zero, derive expressions for the small signal values of the effective forward
transconductance, Gmo, driving point input resistance, Rino, and driving point output resistance, Routo. These three metrics are open loop values of the forward transconductance, input resistance, and output resistance, respectively.
(b). Repeat the preceding part of this problem for the case of nonzero and finite Rss. The resultant metrics derived are closed loop parameters. Compare the closed and open loop values
of transconductance, input resistance, and output resistance.
(c). Numerically evaluate Gm, Rin, and Rout and from these disclosures, give appropriate analytical approximations of these three circuit performance indices.
(d). If the lowest signal frequency of interest is 10 MHz, what is a suitable value for capacitance Cc?
Problem #25:
Figure (P25) is the basic schematic diagram of the Wilson current amplifier,
which fundamentally functions as a common gate amplifier, but with potentially greater than
unity current gain. The applied input excitation is a current source whose quiescent component
is IQ and whose small signal component is Is. The Thévenin equivalent resistance of the input
source is denoted as Rs. The response to small signal input current Is is the small signal component, say Ios, of the indicated output port current Io, which is seen as flowing through a load resistance, Rl. All three transistors are biased for operation in their saturated domains. These tranHomework #06
60
Assigned: 03/06/07
EE 348
USC Viterbi School of Engineering
J. Choma
sistors are identical, save for differences in their gate aspect ratios. In particular, the gate aspect
ratio, η2 = W2/L2, of transistor M2 is identical to that of transistor M1, but η2 is k-times larger
than the gate aspect ratio, η3 = W3/L3, of transistor M3. In the following queries, bulk-induced
threshold modulation in all transistors can be ignored, and the drain-source channel resistance of
transistor M2 can be taken as infinitely large. Do not ignore channel resistances in either M1 or
M3.
+Vdd
Rl
Rout
Rin
IQ + Is
M1
Rs
M3
M2
Io
Rg2
Cl
Figure (P25)
(a). Why is it acceptable to ignore the channel resistance in transistor M2, but not in either
transistors M1 or M3?
(b). Derive an expression for the low frequency, small signal current gain, Ios/Is. Simplify this
expression for the case of large device channel resistances.
(c). Derive expressions for the low frequency, small signal driving point input and output resistances, Rin and Rout, respectively. Simplify these expressions for the case of large device
channel resistances.
(d). Repeat Part (c) for the determination of the indicated resistance Rg2, established between
signal ground and the gate terminal of transistor M2. Simplify this result for the case of
large device channel resistances.
(e). Determine the net effective capacitance that appears between the following circuit nodes:
i.
the drain of transistor M1 and ground;
ii. the source of transistor M1 and ground;
iii. the gate-source terminals of transistor M1;
iv. the gate of transistor M1.
Problem #26:
The Wilson amplifier addressed in the preceding problem is connected in
cascode with a PMOS common source amplifier, as shown in Figure (P26). The signal component, Vs, of the net input excitation, VQ + Vs, delivers a small signal voltage component, Vos, to
the indicated net output port voltage, Vo. Use the results of Problem #24 to give an expression
for the low frequency voltage gain, Vos/Vs. Do not ignore the channel resistance of transistor
M4.
Homework #06
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Assigned: 03/06/07
EE 348
USC Viterbi School of Engineering
J. Choma
+Vdd
Rl
M4
RS
Vo
M1
+
M3
VQ + Vs
−
Cl
M2
Figure (P26)
Problem #27:
In the PMOS common source amplifier of Figure (P27), the transistor has a
gate aspect ratio, W/L, of 20/3, a threshold voltage, Vhp, of 700 mV, and a channel length modulation voltage, Vλ, that can be taken to be infinitely large. Assume that the bulk-induced threshold modulation voltage, Vθ, is 0 volts. Also, measurements taken in the laboratory confirm that
Kp = μpCox = 30 μA/V2. The indicated load resistance, Rl, is 10 KΩ, while the source resistance,
Rs, is 300 Ω.
+2.5 V
Rs
Rout
+
Vs
Vo
−
Rd
+
Vbias
Rl
Id
−
−2.5 V
Figure (P27)
(a). Compute the values of resistance Rd and bias voltage Vbias so that the transistor conducts a
static drain current, Id, of 500 μA when the static value of the output voltage, Vo, is 0 V.
[Assume that the operating point corresponding to the computed input bias voltage prevails for the following three parts of this question.]
(b). Give a general expression for, and compute the value of, the small signal Thévenin output
port resistance, Rout.
(c). Give a general expression for, and compute the value of, the small signal low frequency
voltage gain, Av = Vo/Vs.
(d). Give a general expression for, and compute the value of, the small signal low frequency
transconductance, Gm.
Problem #28:
In the NMOS source follower of Figure (P28), the transistor has a gate aspect ratio, W/L, of 10, a threshold voltage, Vhn, of 700 mV, and a channel length modulation
Homework #06
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Assigned: 03/06/07
EE 348
USC Viterbi School of Engineering
J. Choma
voltage, Vλ, of 20 V. Assume that the bulk-induced threshold modulation voltage, Vθ, is 0 volts.
Also, measurements taken in the laboratory confirm that Kn = μnCox = 50 μA/V2. The indicated
load resistance, Rl, is 100 Ω, while the source resistance, Rs, is 300 Ω. The current sink, Iss, is a
source of constant current.
+2.5 V
Rs
+
Rout
Vs
−
Iss
+
Vo
Rl
Vbias
−
−2.5 V
Figure (P27)
(a). Compute the value of the bias voltage Vbias so that the indicated output voltage, Vo, is 0 V
when Iss = 100 μA.
[Assume that the operating point corresponding to the computed input bias voltage prevails for the following three parts of this question.]
(b). Give a general expression for, and compute the value of, the small signal Thévenin output
port resistance, Rout.
(c). Give a general expression for, and compute the value of, the small signal low frequency
Thévenin voltage gain, Ath; that is, the voltage gain of the circuit with the load resistance,
Rl, open circuited.
(d). Give a general expression for, and compute the value of, the small signal low frequency
voltage gain, Av = Vo/Vs.
Homework #06
63
Assigned: 03/06/07
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