EDN Access--05.22.97 Embedded gain
supercharges FET-transimpedance amplifier
Michael Steffes, Burr-Brown Corp - May 22, 1997
Combining a broadband, unity-gain-stable, FET-input voltage-feedback op amp with a current-feedback op amp considerably increases the transimpedance bandwidth or, alternatively, the transimpedance gain for a fixed-bandwidth design.
A broadband, unity-gain-stable, FET-input op amp is an attractive option for low-noise-transimpedance de-signs. You can easily increase the closed-loop transimpedance bandwidth by including an embedded-gain stage inside the loop. This broadband embedded amplifier also improves the output slew rate and signal distortion. Alternatively, you can use the embedded gain to increase the transimpedance gain at a
fixed bandwidth. If the feedback-resistor-noise term dominates the total output noise, this design can improve the sensitivity and hold the closed-loop bandwidth fixed. Simple equations make both designs easy to implement.
The circuit in Figure 1 retains all of the noise benefits of a FET input and expands the achievable transimpe-dance gain or bandwidth. The noninverting amplifier inside the loop of the FET-input op amp essentially increases the gain-bandwidth product (GBP) for the input stage's voltage-feedback op amp. The entire open-loop gain of the input op amp shifts up by the gain, AV, of this second stage.
To successfully apply this design technique, you have to consider the phase shift that this second stage adds inside the loop. However, neglecting this added phase from the second stage for the moment, shifting up the open-loop gain of the input op amp at the very least increases the minimum stable gain for the combined amplifiers by the same amount. One of the key design features of a transimpedance
configuration is that the noise gain intersects the open-loop response at a high gain set by 1+CS/CF. A Bode plot illustrates this characteristic for Figure 1 (Figure 2). In this case, the single-pole open-loop response of the FET op amp shifts up by 20log(AV). Notice that the loop-gain crossover point (where the total forward-open-loop response intersects 1/feedback ratio) occurs at a high gain, AM, and a low
frequency, FC=AV3GBP/AM.
Generally, in a transimpedance design you place P1 given two constraints: the open-loop characteristic and a Z1 that is set by the source capacitance and the desired transimpedance gain, RF. The resulting transfer function is a simple, second-order lowpass response, which has the characteristic frequency, FO, in Figure 2. Also, to a good approximation, Q=P1/FO (Reference 1). This simple result allows you to place
P1 to achieve any desired Q. When you select Q=0.707, a maximally flat, second-order closed-loop response results in a closed-loop, -3-dB bandwidth equal to the second-order characteristic frequency, F-3 dB=FO.
The Bode plot provides additional insight. Essentially, the added gain inside the loop moves the input op amp away from unity-gain stability. This movement is acceptable as long as AM at loop-gain crossover is higher than the original minimum stable gain of the input stage's op amp times the embedded gain and as long as the embedded-gain stage adds minimal phase shift at FC. A wideband current-feedback op
amp shows approximate gain-bandwidth independence and exceptional phase linearity. Thus, you can evaluate its added phase shift by simply thinking of this second stage as an added constant time delay, TD, inside the loop. The added phase shift at loop-gain crossover, over a range of AV values, then approximately equals
(1)
Adding this phase to the open-loop phase of the input op amp gives you an idea of the completed circuit's phase margin. Considering only the forward-path phase shift and ignoring the phase of the feedback network is an acceptable approximation, because you generally set P1 below FO. This setting brings back the phase shift of the feedback loop to nearly zero at FC. Earlier discussions of this embedded-amplifier
circuit (Reference 2) suggest that the second amplifier must be significantly faster than the input-stage op amp to ensure loop stability. A fast embedded amplifier generally ensures that the phase shift of the first amplifier effectively swamps any added delay of the second stage, particularly for low-voltage-gain applications. However, the most critical feature for stability is the added phase shift of the second
amplifier at loop-gain crossover. Because crossover for a transimpedance design normally occurs at a relatively low frequency, when AM is already high to satisfy minimum gain-stability criteria, this additional phase shift inside the loop does not necessarily significantly reduce the phase margin. Thus, you can use two amplifiers of comparable speed in this design.
Design for maximum bandwidth
The circuit in Figure 1 has a second-order, lowpass, closed-loop transimpedance response when you model the forward path as one dominant pole at low frequency. (vA is the dominant open-loop pole in radians.) Two simple expressions (using the terms in Figure 2's Bode plot) describe this second-order response. An approximate solution for Q and FO is as follows (Reference 1):
(2)
and
(3)
These two equations enable a general-design methodology to achieve any desired second-order lowpass response. To simplify this discussion, consider a design goal of a maximally flat Butterworth response. This design point is unique because when you achieve the required Q of 0.707 for a Butterworth response, the closed-loop -3-dB bandwidth equals the characteristic frequency, FO. Working with this constraint
and combining equations 2 and 3,
(4)
According to this equation, you would simply increase P1 to increase the closed-loop transimpedance bandwidth (with the appropriate adjustment in AV). If the desired transimpe-dance gain, RF, is fixed, the only way to increase P1 is to decrease the feedback-compensation capacitor, CF. Parasitics limit how much you can decrease the value of CF. If RF is fixed by the desired gain and you select a minimum CF, you can
determine the maximum P1 and thus the achievable closed-loop bandwidth. Solving Equation 2 for the required AV at this maximum P1 and then simplifying using Equation 4 gives
(5)
Rewriting this equation in terms of the minimum CF yields
(6)
You can use the last part of this equation to gain some insight into this design for maximally flat bandwidth. Dividing AV out and resolving the first and last terms of the equation gives
(7)
You can easily interpret this equation with the help of Figure 2's Bode plot. Starting from a design with no embedded gain, AV=1, consider a P1 setting equal to FC/2 for a given input-stage GBP and a Z1 set by RF and CS. When these settings yield a design for P 1 with a greater-than-minimum realizable CF, you can further increase the bandwidth by reducing CF to its minimum value and adding gain AV inside the loop
to take the closed-loop response back to a flat Butterworth response, Q=0.707. When you maximize P1 by reducing CF to its minimum, you can recover a maximum flat bandwidth by increasing AV until FC=2P1(MAX) (Equation 7).
Neglecting the phase-margin effects of the higher poles of the input-stage op amp as well as the delay through the embedded-gain stage, the closed-loop F-3 dB=1.4143P1. These neglected forward-path terms cause a decrease in phase margin, which produces a further increase in bandwidth at the possible expense of some peaking in the closed-loop response.
This analysis gives a simplified approach to the design for this embedded-gain transimpedance amplifier. Once the design is complete, you need to confirm
• That AM=1+CS/CF is greater than AV times the original minimum stable gain for the input op amp and
• That the open-loop phase of the input stage plus the phase shift added by the embedded gain at FC is less than 1308 at FC. (This approximate limit prevents excessive frequency-response peaking.)
Both of these considerations are constraints on the design technique but not on the circuit itself. Including the higher order poles of the input stage and the effect of the delay through the embedded op amp in the analysis could certainly improve the accuracy (though not the simplicity) of the design.
Design example for maximum bandwidth
A design with the goal of a maximally flat 40-kV transimpedance bandwidth from a 7-pF detector diode demonstrates the significant increase in transimpedance bandwidth that this technique provides. This example uses a Burr-Brown (Tucson, AZ) OPA655 wideband, unity-gain-stable, FET-input op amp for the input stage and an even faster OPA658 current-feedback op amp for the embedded-gain stage. The box,
"Design specifications and results," summarizes the key amplifier specifications, design targets, and expected results with and without the embedded-gain stage.
The design assumes an additional 2 pF of parasitic capacitance at the input to the OPA655. The computed compensation capacitance is the total value necessary, including any parasitics. The minimum target for CF is actually just the anticipated parasitic capacitance for the resistor itself. The value for CF in the design without the embedded gain results from setting P1=Q3FO=0.7073FO.
Note that the noise gain at crossover using the embedded OPA658 is AM=46V/V. Because the OPA655 is unity-gain stable, the new minimum stable gain for the combined amplifiers is 7.63 when the OPA658 adds a gain of 7.63 inside the loop. Also, because crossover occurs at a much higher noise gain than 7.63, the circuit is stable if the embedded
amplifier does not add too much phase shift. Estimating the delay through the OPA658 at 1.6 nsec and using Equation 1 at the loop-gain crossover frequency of 39 MHz gives an added phase shift inside the loop of 228. Adding this phase to the 1008 of phase shift for the OPA655 open-loop response (from the data sheet) still leaves 588 of phase margin for the loop gain (180-100-22=588). Because the simplified
design already targets complex poles using a single-pole op-amp model and no embedded-amplifier delay, you can expect the non-908 phase margin to extend this closed-loop response and possibly introduce some peaking in the final closed-loop response.
Two circuits compare the designs with and without the embedded-amplifier stage. Using only the input-stage OPA655, the design for Figure 3 sets CF to place P1=0.707FO, so that the circuit produces a Butterworth response. Using the embedded OPA658 gain stage, the design for Figure 4 reduces CF to its minimum value and adds AV, according to Equation 5, to shift the open-loop response to make FC=2P1,
according to Equation 7.
Embedded gain transforms the response
Adding the wideband-gain stage inside the loop of this transimpedance amplifier significantly increases the closed-loop bandwidth (Figure 5). The circuit exhibits even broader bandwidth than the simplified theory predicts because of the 588 loop-gain phase margin. However, the overall response is still flat and increases the bandwidth four times more than OPA655 could deliver by itself.
Adding a gain of 7.63 inside the loop transforms the OPA655 from a 240-MHz-GBP, unity-gain-stable op amp to the equivalent of a 1.8-GHz-GBP, FET-input op amp that is no longer unity-gain-stable. However, you do not need unity-gain stability for the transimpedance configuration. In fact, you can achieve a considerable increase in bandwidth by including this embedded-gain stage and carefully moving P1.
An additional benefit of using the OPA658 as the output stage is a significant increase in the available slew rate at the output. Whereas the unity-gain-stable OPA655 has a respectable 290V/µsec slew rate, the current-feedback OPA658 has a much higher 1700V/µsec slew rate. As long as AV is greater than the ratio of the two slew rates (1700/290=5.9 in this case), the slew-rate limit moves to the output stage.
Although the closed-loop bandwidth in this example limits the pulse-transition time to well below the available 1700V/µsec slew rate, this additional slew-rate margin can significantly improve harmonic distortion for frequency-domain applications.
The embedded amplifier does not directly add to the output noise. The input noise of the second amplifier is divided by the open-loop gain of the first stage before it contributes to the total-equivalent-input noise voltage. Extending the bandwidth, however, increases the input-referred current-noise contribution due to the differentiated input-voltage noise of the FET op amp. The total-equivalent-input spot-current
noise that you can place in parallel with the diode source such that this noise integrates to the same total-output-voltage noise as all of the actual noise sources is as follows (Reference 1):
(8)
in which F is the maximum frequency of output-noise integration and ENI and INI are the op amp's input-voltage noise and input-current noise, respectively.
For the design using the FET-input OPA655, you can drop the INI2 term in this equation. The last term, which is the input-referred effect of the voltage noise differentiated by the noise gain shown in the Bode plot, often dominates. Equation 8's simple expression for the total input-referred noise holds only if the F term is less than P1 in the Bode plot. In general, for noise-power-limiting reasons, system designers
postfilter the system bandwidth so that F is less than P1. Evaluating Equation 8 for the circuit of Figure 3 for F=P1=7.2 MHz gives IN=1.55 pA/ˆHz. Re-evaluating Equation 8 for the design of Figure 4 for F=P1=19.9 MHz gives IN=3.95 pA/ˆHz.
Because the last term in Equation 8 dominates the noise in this design, increasing the bandwidth increases the equivalent input-referred spot-current noise in nearly the same ratio (19.9/7.2'3.95/1.55). As is often the case in a broadband-transimpedance design, a low input-voltage noise for the op amp is essential to an overall low-noise design (Reference 1). The relatively low input-voltage noise for the OPA655 (6
nV/ˆHz) is critical to holding the integrated noise low as the bandwidth increases.
Until this point, the design procedure operates on the assumption of a fixed RF. Based on this assumption, the procedure involves reducing CF to its minimum value to increase P1 and then adjusting AV to achieve a maximally flat Butterworth closed-loop response. Alternatively, you can fix the desired transimpedance bandwidth at some value and use the embedded gain to increase RF. Continuing with the assumption
that a Q of 0.707 is desirable, Equation 4 implies that to hold a constant F-3 dB, P1 must remain fixed.
This requirement means that, from an initial design point without the embedded amplifier, you can increase RF and decrease CF to hold P1 fixed. Again, you can apply this approach only to the point of a minimum realizable CF. Going back to the Bode plot (Figure 2), reducing CF to a minimum value sets AM to a maximum value of AM(MAX)=1+CS/CF(MIN). Starting with Equation 5, you can derive a solution for the
required AV by first evaluating Z1 as follows:
(9)
Thus, Z1 equals the noise-gain crossover frequency divided by the high-frequency noise gain. When Q=0.707, Z1 also equals the closed-loop -3-dB frequency times Q divided by AM(MAX). (In other words, FC=P1/Q2=2P1 when Q=0.707.)
Substituting the last expression in Equation 9 for Z1 into the last part of Equation 5 gives an expression for the required AV that allows you to increase RF to its maximum value (constrained by a minimum CF) and hold P1 fixed:
(10)
You can graphically interpret this equation using Figure 2's Bode plot: Decreasing CF to its minimum value and changing RF to hold a constant P1 amounts to shifting up AM and holding a constant corner at P1. Z1 moves down in frequency as you increase AM. To move up the open-loop gain to get back to where FC=2P1 (Equation 7), you must set AV according to Equation 10.
Starting from the design in Figure 3 and reducing CF to 0.2 pF increases AM from 1+9 pF/0.55 pF=17.4 to 1+9 pF/0.2 pF=46. Equation 10 gives the required embedded gain to hold a constant frequency response as 237.24 MHz346/240 MHz=2.78. RF can increase by the ratio of the initial design's CF value to the minimum CF value. Therefore, RF(MAX)=40 kV3(0.55 pF/0.2 pF)=110 kV.
Checking the phase margin at FC for this maximum-trans-impedance-gain design, the minimum stable gain for the combined amplifiers has increased to 2.78. However, this number is far less than the AM(MAX) of 46 at crossover. FC now occurs at 2.783240 MHz/46=14.5 MHz. At this frequency, the OPA658 adds an additional 8.08 of phase shift (Equation 1). Neither the high-frequency poles of the input stage nor the
added phase shift of the embedded-gain stage should significantly move the actual performance from the predictions of this simplified analysis. Note that an FC of 14.5 MHz is exactly two times a P1 of 7.24 MHz as Equation 7 requires.
Although this embedded gain certainly increases the achievable transimpedance gain, given the amplifiers and original design point selected, it is not clear that embedded gain improves the circuit's sensitivity. If the contribution of the op amp's voltage-noise term dominates the total input-referred current noise (as it does here), the input noise will not change with increasing RF (Equation 8). Re-evaluating
Equation 8 with an increased RF but with no change in the last term to F=P1=7.24 MHz gives an input-referred current noise of 1.47 pA/ˆHz. This noise level is a slight decrease from the computed value of 1.55 pA/ˆHz for the circuit in Figure 3.
Thus, although this embedded-gain stage can deliver more transimpedance gain, you can just as easily add the gain outside the loop as a postamplifier after the circuit of Figure 3, because neither approach changes the input sensitivity. However, for designs in which the input-referred current noise of the feedback resistor dominates, using this embedded-gain approach to increase RF is a better way to improve the
sensitivity for a fixed desired bandwidth.
References
1. Steffes, Michael, "Control frequency response and noise in broadband, photodetector, transimpedance amplifiers," EDN, July 4, 1996, pg 113.
2. Kalthoff, Tim, Tony Wang, and R Mark Stitt, "Classical op amp or current-feedback op amp? This composite op amp gives you the best of both worlds," Application Bulletin AB-007A, Burr-Brown Corp, 1990.
Design specifications and results
Target design:
RF=40 kilohms.
Diode capacitance=7 pF.
Total input CS=2 pF+7 pF=9 pF.
Key OPA655 characteristics
(FET-input-voltage feedback):
GBP=240 MHz (unity-gain stable).
Slew rate=290V/µsec.
Input-voltage noise (ENI)=6 nV/square root(Hz).
Input-current noise (INI)=1.3 fA/square root(Hz).
Parasitic input capacitance=2 pF.
Anticipated closed-loop results
without the embedded amplifier:
Q=0.707.
FO=F-3 dB=10.3 MHz.
Required CF=0.55 pF.
Key OPA658 characteristics
(wideband-current feedback):
Approximate propagation
delay=1.6 nsec.
Bandwidth>200 MHz for AV&10.
Slew rate=1700Vµsec.
Anticipated closed-loop results
with the embedded amplifier:
Target minimum CF=0.2 pF.
Q=0.707.
FO=F-3 dB=28 MHz (Equation 4).
Required AV=7.63 (Equation 5).
Maximum noise gain AM=46.
Loop-gain crossover FC=39 MHz.
OPA658 phase at crossover=22°
(Equation 1).
Author's biography
Michael Steffes is a strategic marketer for high-speed signal-processing components at Burr-Brown Corp (Tucson, AZ). He has a BSEE from the University of Kansas--Lawrence and an MBA from Colorado State University--Fort Collins, and he has participated in the development of numerous amplifier ICs. His spare-time interests include history, classic literature, travel, and running.
Copyright c 1997 EDN Magazine, EDN Access . EDN is a registered trademark of Reed Properties Inc, used under license. EDN is published by Cahners Publishing Company , a unit of Reed Elsevier Inc.