ENT 162 –Analog Electronics
School of Mechatronic Engineering, UniMAP
Solution Tutorial 2
BJTs, Transistor Bias Circuits, BJT Amplifiers FETs and FETs Amplifiers
Part 1: BJTs, Transistor Bias Circuits and BJT Amplifiers
1. Explain the purpose of a thin, lightly doped base region.
2. Why is the base current in a transistor so much less than the collector current?
3. Given IE=5.34 mA and IB=475 µA. Calculate the value of IC.
4. Given IC=5.35 mA and IB=50 µA. Calculate αDC.
5. Calculate each current in Figure 1 and the value of βDC.
Figure 1
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1
Sem 2, 2009/2010
ENT 162 –Analog Electronics
School of Mechatronic Engineering, UniMAP
6. Calculate VCE, VBE and VCB for both circuits in Figure 2.
Figure 2
7. Determine whether or not the transistors in Figure 2 above are saturated.
8. A certain transistor is to be operated at a collector current of 50 mA. How high can VCE
reach without exceeding a PD(max) of 1.2 W.
9. A 50 mV signal is applied to the base of a properly biased transistor with r’e = 10 Ω and
RC = 560 Ω. Calculate the signal voltage at the collector.
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Sem 2, 2009/2010
ENT 162 –Analog Electronics
School of Mechatronic Engineering, UniMAP
10. The transistor in Figure 3 has a βDC = 50. Calculate the value of RB required to ensure
the saturation when VIN =5 V. What value of VIN be to cutoff the transistor? Assume
VCE(sat) = 0 V.
VCC
+15 V
1.2 kΩ
Figure 3
11. Calculate the value of the βDC of the transistor shown in Figure 4.
Figure 4
12. Refer to the transistor data sheet in appendix; calculate whether or not the transistor
is saturated in circuit as shown in Figure 5 based on the maximum specified value of
hFE.
Figure 5
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Sem 2, 2009/2010
ENT 162 –Analog Electronics
School of Mechatronic Engineering, UniMAP
13. Calculate the Q-point for a biased transistor as shown in Figure 6. Given IB = 150 µA
and βDC = 75.
1.0 kΩ
VCC
18 V
Figure 6
14. Determine whether the transistor in Figure 7 is biased in cutoff, saturation or the
linear region. Keep in mind that IC = βDC IB is valid only in the linear region .
Figure 7
15. Calculate all transistor terminal voltages with respect to ground in Figure 8. Do not
neglect the input resistance at the base or VBE.
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Sem 2, 2009/2010
ENT 162 –Analog Electronics
School of Mechatronic Engineering, UniMAP
16. Consider circuit as shown in Figure 9
(a) Analyze the circuit to determine the correct voltages at the transistor terminals
with respect to ground. Assume βDC = 100.
(b) To what value can RE be reduced without the transistor going into saturation?
(c) Taking VBE into account, how much will IE change with temperature increase from
25 oC to 100 oC? The VBE = 0.7 V at 25 oC and decrease 2.5 mV per degree Celcius.
Neglect βDC.
(a)
Figure 9
(b)
(c)
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Sem 2, 2009/2010
ENT 162 –Analog Electronics
School of Mechatronic Engineering, UniMAP
17. A collector-feedback circuit uses an npn transistor. Given VCC = 12 V, RC = 1.2 kΩ and
RB = 47 kΩ. Sketch the circuit and calculate the collector current and the collector
voltage if βDC = 200.
18. A certain transistor has a dc beta (hFE) of 130. Given IB = 10 µA and αDC = 0.99,
calculate r’e.
19. Sketch the dc equivalent circuit and the ac equivalent circuit for the unloaded
amplifier in Figure 10.
Figure 10
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Sem 2, 2009/2010
ENT 162 –Analog Electronics
School of Mechatronic Engineering, UniMAP
20. Refer to the amplifiers circuit in Figure 11, calculate the following dc values:
(a) VB
(b) VE
(c) IE
(d) IC
(e) VC
(f) VCE
10 kΩ
Figure 11
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Sem 2, 2009/2010
ENT 162 –Analog Electronics
School of Mechatronic Engineering, UniMAP
21. From Problem 20 above, calculate the following ac values:
Rin(base)
(b) Rin
(c) Av
(d) Ai
(e) Ap
22. Refer to the unloaded emitter-follower circuit as shown in Figure 12.
(a) Calculate the exact voltage gain
(b) Calculate the total input resistance
(c) Calculate the dc output voltage
Figure 12
(a)
(b)
(c)
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Sem 2, 2009/2010
ENT 162 –Analog Electronics
School of Mechatronic Engineering, UniMAP
23. Calculate Rin(emitter) , Av, Ai and Ap for the unloaded amplifier in Figure 13.
Figure 13
24. Match the following generalized characteristics with the appropriate amplifier
configuration.
(a) Unity current gain, good voltage gainm very low input resistance
(b) Good current gain, good voltage gain, low input resistance
(c) Good current gain, unity voltage gain, high input resistance
25. Figure 14 shows the two stage, capacitively coupled amplifier circuit. Calculate the
following values:
(a) Voltage gain of each stage
(b)Overall voltage gain
(c) Express the gains in (a) and (b) in dB
Figure 14
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Sem 2, 2009/2010
ENT 162 –Analog Electronics
School of Mechatronic Engineering, UniMAP
26. Express the following voltage gains in dB:
(a) 12
(b) 2500
27. Express the following voltage gains in dB as standard voltage gains:
(a) 6
(b) 40
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Sem 2, 2009/2010