International Conference on Engineering Trends and Science & Humanities (ICETSH-2015)
Harmonic Reduction Technique Using Controller in SPM
Cascaded Multilevel Inverter
K. Gobi1
C.Salom Jerlin2
Abstract—A single phase nine level cascaded type multilevel
inverter with identical DC supply voltages is designed and
presented to reduce harmonic components of the output
voltage. To keep the output voltage sinusoidal and to have
low harmonics, sinusoidal PWM control scheme is proposed.
The conventional PI and fuzzy controller are designed for
closed loop control of cascaded multilevel inverter to reduce
the harmonics. The comparison is made for open loop and
closed loop with PI and fuzzy controller. The comparison
results reveal that the THD is reduced to about 5% with
fuzzy control compared to open loop and also increases the
order of lower harmonics.
Index Terms—Multi-level inverter, Harmonics, Total
Harmonic Distortion (THD), Lower Order Harmonic (LOH),
Fuzzy Logic Controller (FLC).
I. INTRODUCTION
T
HE Pulse Width Modulated (PWM) inverters can
control their output voltage and frequency
simultaneously and also they can reduce the harmonic
components in load currents. These features have made
them suitable in many industrial applications such as
variable speed drives, uninterruptible power supplies, and
other power conversion systems. However, the reduction
of harmonic components in output voltage is still the focus
of major interest to alleviate the influences of electromagnetic interferences or noise and vibrations.
Dr.D.Mary3
One aspect, which sets the cascaded H-bridge apart from
other multilevel inverters, is the capability of utilizing
different DC voltages on the individual H-bridge cells. The
cascaded topology has many inherent benefits with one
particular advantage being its modular structure. In
particular, the cascaded inverter has been reported for use
in applications such as medium voltage industrial drives,
electric vehicles and grid connection of photovoltaic cell
generation systems.
Under these technical backgrounds, this paper presents a
single phase cascaded nine level inverter with identical DC
voltage sources proposing PWM scheme. The proposed
inverter can reduce the harmonic components using
sinusoidal PWM technique [4] compared with that of
traditional full-bridge PWM inverter and cascaded nine
level inverter under the condition of identical DC sources
without sinusoidal PWM technique. The comparison is
also made for open-loop and closed-loop implementing
sinusoidal PWM technique. The control scheme involves
the generation of PWM pattern for the range of modulation
index (m) between 0.1 to 1. The closed loop control of
cascaded multilevel inverter is done by implementing
conventional PI controller and fuzzy controller. The results
are compared by measuring THD and they are presented in
this paper.
II. INTEGRATED POWER BRIDGE
The popular single-phase inverters adopt the full
bridge type using approximate sinusoidal modulation
technique as the power circuits. The output voltage of
them has three values: zero, positive and negative supply
DC voltage levels. Therefore, the harmonic components of
their output voltage are determined by the carrier
frequency and switching functions [1].
The multilevel inverters have been attracting
increasing interest recently due to the increased power
ratings, improved harmonic performance, and reduced
voltage stress across the switches. Decreased voltage stress
leads to a corresponding decrease of dv/dt which can be
achieved with the multiple DC levels that are available for
synthesis of the output voltage waveforms [2].
A. Structure of Power Bridge
The topology of the cascaded bridges used in this paper
is shown in Figure1. Each bridge module comprised four
Metal Oxide Semiconductor Field Effect Transistors
(MOSFETs). Each bridge is energized by separate DC
sources. The cascaded multi-level inverter consists of a
series of H-bridge (single-phase, full-bridge) inverter
units. As mentioned, the general function of this multilevel inverter is to synthesize a desired voltage from
several separate DC sources which may be obtained from
batteries, fuel cells, solar cells or ultra capacitors.
1 K.Gobi, Assistant Professor, Department of Electrical and Electronics
Engineering, OAS Institute of Technology and Management, Trichy.
2. C.Salom Jerlin, Assistant Professor, Department of Electrical and
Electronics Engineering, Assistant Professor, Department of Electrical
and Electronics Engineering, OAS Institute of Technology and
Management, Trichy,
3. Dr.D.Mary , Professor, Department of Electrical and Electronics
Engineering, Government College of Technology, Coimbatore-13,Tamil
Nadu, India.
Figure 1: Structure of single-phase nine level cascaded H-bridge inverter.
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International Conference on Engineering Trends and Science & Humanities (ICETSH-2015)
Each separate DC source is connected to a single-phase
4. For an output voltage level V0= V1+V2+V3+V4, all
full-bridge inverter. Each inverter level can generate three
the switches as mentioned in step 3 and M41 are turned
different voltage outputs +Vdc, 0 and –Vdc. The ac output
on
of each level’s full bridge inverter is connected in series
such that the synthesized voltage waveform is the sum of Table-I shows the voltage levels and their corresponding
all the individual inverter outputs. A general example Switch states. State condition 1 means the switch is on,
phase voltage waveform for a nine level cascaded inverter and 0 means the switch is off. Each switch is turned on
is shown in Figure2. The maximum output phase voltage only once per cycle. The above steps show the voltage
is given by
levels and switch states for positive half cycle of the
V0max= V1+V2+V3+V4
output voltage.
Where V1, V2, V3 and V4 are the individual DC source
voltages fed to the four H-bridges of the cascaded
III. BLOCK DIAGRAM OF THE
multilevel inverter.
PROPOSED SCHEME
Block diagram (Figure 3) of the circuit shows the
control of nine level multilevel inverter using sinusoidal
PWM technique in open loop.
Figure 2: Nine level inverter output voltage
With enough levels and an appropriate switching
algorithm, the multilevel inverter results in an output
voltage that is near sinusoidal. Each of the active devices
in nine level inverter is switching only at the fundamental
frequency.
B. Operational Principles
The output voltage of the nine level cascaded
multilevel inverter using PWM technique is shown in
Figure2. The steps to synthesize the nine level voltages are
as follows.
TABLE. I
OUTPUT VOLTAGE LEVELS AND THEIR SWITCHING STATES.
OUTPUT VOLTAGAE V0
SWITCHES
M11
M12
M13
M14
M21
M22
M23
M24
M31
M32
M33
M34
M41
M42
M43
M44
V1
V1+V2
1
1
0
0
0
1
0
0
0
1
0
0
0
1
0
0
1
1
0
0
1
1
0
0
0
1
0
0
0
1
0
0
V1+V2+
V3
1
1
0
0
1
1
0
0
1
1
0
0
0
1
0
0
V1+V2+V3
+V4
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1. For an output voltage level V0 = V1, the Switches
M11, M12, M22, M32 and M42 are turned on.
2. For an output voltage level V0 = V1+V2, all the
switches as mentioned in step 1 and M21 are turned on.
3. For an output voltage level V0 = V1+V2+V3, all the
switches as mentioned in step 2 and M31 are turned on.
ISSN: 2348 – 8379
Figure 3: Block diagram of the circuit in open loop
Four equal DC supply voltages is given to the four Hbridges of the cascaded multilevel inverter which is then
connected to the load. The gating signals are generated by
comparing reference sine wave with carrier wave. The
generated gating signals are given to the switches of the
cascaded multi-level inverter to obtain the required output
voltage.
IV. SWITCHING FUNCTION
A. Sinusoidal Pulse Width Modulation scheme
Four switching elements and four diodes in the
conventional full-bridge inverter are connected to each DC
power supply of equal value. Equal DC supply voltages
are fed to the Four H-bridges. In this SPWM method the
four different levels of triangular carrier wave of higher
switching frequency are compared with the sinusoidal
wave of particular amplitude [5]. Thus the eight gating
signals are generated, four pulses for positive half cycle
and other four for negative half cycle. These gating signals
are given to the switches to obtain the required output
voltage. All the switches are utilized and hence the switch
utilization is better.
V. HARMONIC ANALYSIS
A key issue in designing an effective multilevel
inverter is to ensure that the total harmonic distortion in
the voltage output waveform is small enough. It is
assumed that DC sources are nominally equal. That is,
given a desired fundamental output voltage, the problem is
to find the voltage levels that produce the fundamental
while not generating specifically chosen harmonics. The
DC sources are chosen as 90V.
A. Total Harmonic Distortion
It is a measure of closeness in shape between a
waveform and its fundamental component [6].
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International Conference on Engineering Trends and Science & Humanities (ICETSH-2015)
Where Vi = Voltage of the ith harmonic component.
V1 = Fundamental component of the output
Voltage.
Figure 8: Frequency Spectrum of the output voltage.
B. Modulation Index (m)
Modulation index is defined as
Where Ar = Amplitude of the reference wave
Ac = Amplitude of the carrier wave
VI. SIMULATION
A. Sinusoidal PWM Technique
This PWM scheme uses four levels of carrier wave to
be compared with fixed amplitude of sine wave. All the
carriers are in phase (PD technique) [7]. The Simulated
circuit is shown in Figure6.
B. The proposed scheme in closed loop
In closed loop the control of inverter can be
performed using conventional PI controller and Fuzzy
Logic Controller. The output voltage of the cascaded
inverter is compared with reference sine wave and the
output error is given to the PI controller to generate the
gating signals. The simulated circuit with PI controller is
shown in Figure9. Figure 10 shows the simulated output
voltage and current with
m = 0.825. The Frequency
spectrum of the output voltage is shown in Figure 11.
The THD is measured for various values of m. The
THD is found to be 4.21% for m = 0.825. From the
Frequency spectrum it shows that all the lower order
harmonics 5, 7, 9, 11, 13 are eliminated.
Figure 6: Simulated circuit with SPWM technique in open loop
Figure 9: Simulated circuit of the inverter (PI controller)
The gating signals generated using SPWM are given to
the switches to obtain the output voltage. Figure7 shows
the simulated output voltage and current for m = 0.825.
Figure8 shows the frequency spectrum of the output
voltage.
By varying the modulation index (m), RMS voltage
can be varied and THD can be measured accordingly [8].
The THD is obtained as5.56% for
m = 0.825. The
Frequency spectrum shows that all the odd order
harmonics are eliminated.
Figure 10: Simulated output voltage and current with m = 0.825 (PI
Controller)
Figure 7: Simulated Output voltage and current with
SPWM for m = 0.825
Figure 11: Frequency spectrum of the output Voltage.
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International Conference on Engineering Trends and Science & Humanities (ICETSH-2015)
linguistic sets of Negative small (NS), Positive small (PS)
VII. FUZZY LOGIC CONTROLLER
The Structure of Fuzzy Logic Controller is shown in and Zero (Z). The output variable uses the three singleton
fuzzy sets of Positive Big (PB), Negative Big (NB) and
Figure 12. It consists of three basic building blocks [10].
Zero (Z). The linguistic control rules are established
Fuzzification
analyzing the error and its variation. These control rules
Fuzzy Inference (decision making)
can be expressed as
Defuzzification
IF e is NS, THEN output is Z;
IF e is Z THEN output is Z;
IF e is Z THEN output is NB;
IF e is PS THEN output is Z;
IF e is PS THEN output is NB;
The symbol “IF” of the rules is called the premise,
while the symbol “THEN” is the consequence [11]. The
fuzzy logic controller used is of sugeno type. The output of
the fuzzy controller is crisp and thus a combined output
fuzzy set must be defuzzified.
Figure 12: Fuzzy Controller Structure
During the Fuzzification section the input data are
classified into suitable linguistic values or sets. Fuzzy
inference engine generates the fuzzy rules and according
to those control rules and linguistic variable definition the
control action is derived. Defuzzification takes the fuzzy
output of the rules and generates the “crisp” numeric value
used as the control input to the multilevel inverter [10].
The overall architecture of the inverter topology with
Fuzzy Controller structure is given in Figure 13.
Figure 15: Simulated output voltage and current for m=0.825
with fuzzy controller.
Figure 13: Architecture of inverter topology with Fuzzy
Controller Structure.
The output voltage of the inverter is compared with
the reference sine wave to compute the error (e). The error
is given as input to the Fuzzy controller. The output
obtained from the fuzzy controller is again compared with
the reference sine wave to get the duty cycle (sine wave).
Figure 16:Frequency Spectrum of the output voltage for m = 0.825
The simulated output voltage and current for m =
0.825 is shown in Figure 15 and the corresponding
frequency spectrum of the output voltage is shown in
figure 16. The THD is found to be 2.62% for m = 0.825.
VIII. COMPARISON RESULTS
The Final results are obtained by comparing open and
closed loop operation of cascaded multilevel inverter being
used with sinusoidal PWM technique. The modulation
index can be varied from 0.775 to 1. Table II indicates the
THD values for modulation index (m) between 0.775 to 1
for open and closed loop. Figure16 shows the graph of
THD (%) Vs modulation index (m).
Figure 14: Simulated circuit with Fuzzy Logic Controller
The simulated circuit is verified through Matlab 7.2
which is shown in Figure 14. The input error has three
ISSN: 2348 – 8379
The Total Harmonic Distortion (THD) is compared
for open and closed loop with PI and Fuzzy controller for
particular modulation index, m = 0.825. The comparison is
shown in Table. III.
TABLE. II
THD VALUES FOR M VARIED BETWEEN 0.775 TO 1
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International Conference on Engineering Trends and Science & Humanities (ICETSH-2015)
proposed. Equal voltage sources are proposed for the
Total Harmonic Distortion (THD)
inverter. A complete analysis of the nine level cascaded
Open
Closed
Closed
multilevel inverter has been presented for open and closed
Modulation
Loop with
Loop with
loop with PI controller and Fuzzy Logic Controller and a
loop
Index (m)
comparison has been brought out. The simulation results
(SPWM) PI control
Fuzzy
show that Total Harmonic Distortion is reduced to about
control
5% by closed loop with Fuzzy control compared to open
0.775
7.70%
6.22%
3.15%
loop. Also all the lower order and higher order harmonics
0.8
6.21%
5.43%
2.97%
are eliminated using Sine PWM technique. Hence the
sinusoidal PWM technique is advantageous than other
0.825
5.56%
4.21%
2.62%
harmonic elimination techniques.
0.85
4.73%
3.83%
2.68%
REFERENCES
0.875
3.35%
3.06%
2.73%
0.9
2.92%
2.78%
3.63%
0.925
2.76%
2.79%
3.40%
0.95
2.85%
2.81%
3.25%
1
2.40%
2.68%
4.19%
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
Figure17: Variation of Modulation Index Vs THD (%)
From the table II and Figure 17 the comparison of open
loop, closed loop with PI and Fuzzy controller for different
values of m using Sinusoidal PWM technique is presented.
Hence fuzzy logic controller gives better response than
other controllers.
[10]
TABLE. III
COMPARISON OF THD VALUES FOR M = 0.825
[12]
Operation
control
Total Harmonic
Distortion
(THD)%
Modulation
Index (m)
Open loop
(SPWM)
Closed loop With
PI controller
Closed loop with
Fuzzy controller
0.825
5.56%
0.825
4.21%
0.825
2.62%
[11]
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Using Sinusoidal PWM the harmonic content is lowered
with higher switching frequency. The switching frequency
can also be increased effectively to eliminate the specified
harmonics [13].
IX. CONCLUSION
A new harmonic reduction method of Sinusoidal PWM
technique in cascaded multilevel inverter has been
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