International Journal of Electrical and Computing Engineering
Vol.1, Issue 5, May 2016
ISSN (Online): 2349 - 8218
Simulation and Analysis of Z Source Multilevel Inverter
with Reduced Number of Switches
1
Nimitha Muraleedharan, 2Remani T
1
Student, 2Professor
Department of Electrical and Electronics Engineering
Gec thrissur
Abstract— Nowadays for high power and high voltage
applications multilevel inverters are widely used due to low
harmonic distortion, lower electromagnetic interference and
reduced switching losses. A new inverter topology based on
mixture of cascaded basic units and one H-bridge unit is
introduced. It has reduced number of switches as compared to
conventional cascaded H-bridge multilevel inverter, and can be
extended to any number of levels. Since the output voltage is
limited to dc source voltage summation, a Z source network is
introduced between the source and the inverter circuit. By
properly controlling the shoot-through period of Z source
network, we can boost the output voltage as desired. The
performance of proposed topology and its controller are
validated
with
simulation
results
using
the
MATLAB/SIMULINK software.
photovoltaic, wind and fuel cells can be used as DC source to
a multilevel inverter system for high power applications.
This paper presents a new topology of a cascaded
multilevel inverter that has fewer semiconductor switches and
gate driver circuits with higher number of steps in the output.
The remaining paper is organized as: Section II gives a brief
explanation about the working of proposed multilevel inverter.
Section III describes the working and design of the proposed Z
source multilevel inverter. Section IV presents the simulation
results of the new cascaded Z source multilevel inverter
topology. Section V concludes the paper.
Index Terms— Multilevel inverter, Z source inverter, Power
electronics, SPWM.
II. PROPOSED MULTILEVEL INVERTER
I. INTRODUCTION
A. Working
Voltage source inverter (VSI) is a device which converts DC
power into AC power of desired output voltage and frequency.
It is most commonly used in induction heating, adjustable
speed AC drives, UPS systems, electronic frequency changer
circuits and flexible AC transmission systems. It is used to
link commercial, industrial and residential loads to the AC
line. But a conventional VSI output is limited to two levels
due to the fact that power switches connect to either the
positive or to the negative DC bus. In order to increase the
output voltage levels, a new class of inverters known as
Multilevel inverters are used [1,8]. It synthesizes a desired
output voltage from several levels of input DC voltage
sources. As the number of DC voltage source increases, the
inverter output voltage waveform approaches nearly
sinusoidal waveform. But its increases the cost and
complexity of the system due to increased number of switches
and their drive circuits. As compared to traditional two-level
inverters, the multilevel inverters have more advantages,
which include lower semiconductor voltage stress, better
harmonic performance, low electromagnetic interference and
lower switching losses. Renewable energy sources such as
In order to reduce the overall number of switching
devices in conventional cascaded multilevel inverter
topologies, a new topology has been proposed. The circuit
configuration of the new 5-level inverter is shown in Fig.2. It
has four main switches in H-bridge configuration S3, S4, S5,
and S6 and two auxiliary switches S1 and S2. The number of dc
sources (two) is kept unchanged as in similar 5-level
conventional cascaded H-bridge multilevel inverter. Like
other conventional multilevel inverter topologies, the
proposed topology can be extended to any required number of
levels.
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International Journal of Electrical and Computing Engineering
Vol.1, Issue 5, May 2016
ISSN (Online): 2349 - 8218

When switch S1, S4, S5 is conducting, the output
voltage is –Vdc
Fig.2.a. Proposed 5 level multilevel inverter
The inverter can operate in four different modes according to
the polarity of the load voltage and current.
 When switch S1, S3, S6 is conducting, the output
voltage is +Vdc.
Fig.2.d. Switching combination required to generate output voltage level
-Vdc

When switch S1, S2, S4, S5 is conducting the output
voltage is -2Vdc.
Fig.2.b.Switching combination required to generate output voltage level +V dc

Fig.2.e. Switching combination required to generate output voltage level
-2Vdc
When switch S1, S2, S3, S6 is conducting, the output
voltage is +2Vdc.
TABLE 1: OPERATING MODE OF THE PROPOSED MLI
Fig.2.c. Switching combination required to generate output voltage level
+2Vdc
2
OUTPUT VOLTAGE
LEVEL
CONDUCTING
SWITCHES
+Vdc
S1,S3,S6
+2Vdc
S2,S3,S6
-Vdc
S1,S5,S4
-2Vdc
S2,S5,S4
International Journal of Electrical and Computing Engineering
Vol.1, Issue 5, May 2016
ISSN (Online): 2349 - 8218
TABLE 2: COMPARISON OF NUMBER OF COMPONENTS
NUMBER
OF
SWITCHES
INVERTER
5 LEVEL
7 LEVEL
9 LEVEL
11 LEVEL
8
10
12
14
6
7
8
9
TYPE
CASCADED
H-BRIDGE
PROPOSED
Fig.3.b.Proposed Z source 5 level multilevel inverter
TOPOLOGY
III. Z SOURCE MULTILEVEL INVERTER
In the proposed multilevel inverter the output voltage is
limited to dc source summations. In order to boost the
output, a Z source network is introduced between the dc
source and the inverter circuit. This two-port impedance
network consist of inductors L1 and L2 and capacitors C1
and C2 connected in X shape. The Z-source inverter uses the
shoot-through state to boost the DC bus voltage by gating on
both the upper and lower switches of a phase leg. During
non-shoot through mode the input voltage appears across the
capacitor and no voltage appears across the inductor (just a
pure DC current flow through the inductors). During shootthrough time, the capacitor is connected in parallel to the
inductor and the inductor voltage is same as capacitor
voltage and inductor current increases linearly. The inductor
is charged by the capacitor during shoot-through state and
this boosted voltage appears across the inverter.
Fig.3.c. Z-source in shoot- through state
Fig.3.d. Z-source in non-shoot-through state
During shoot through state, from the equivalent circuit:
During non-shoot through state, from the equivalent circuit:
Fig.3.a Z- source network
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International Journal of Electrical and Computing Engineering
Vol.1, Issue 5, May 2016
ISSN (Online): 2349 - 8218
Since the average voltage of inductor is zero:
Considering the Shoot-Through-1 period:
Therefore,
The job of the inductor is to limit the current ripple during
shoot-through state. The capacitor of the Z source network
from equation (a) is obtained as:
Where Tns is the non-shoot through time period and T sh is the
shoot through time period.
Substituting the above equation in equation 1, we get:
Since during shoot through period,
substituted as
.




1
 Vdc
Vin  
 1  2  Tsh  



 T 

=
can be
The capacitor absorbs the current ripple and achieves quite a
stable voltage. The inductor of the Z source network from
equation (b) is obtained as:




1

B
 1  2  Tsh  



 T 

Since during shoot through period,
substituted as
.
Where
current.
and
Capacitor voltage from equation 2:
Tsh
,where D is the duty ratio.
T
We know, Voltage across the inductor is given by:
Similarly inductor current:
Current through the capacitor:
Where, input current can be obtained as:
With linear waveforms:
4
=
and
can be
are the capacitor voltage and inductor
Where, B is the boost factor.
D
and
International Journal of Electrical and Computing Engineering
Vol.1, Issue 5, May 2016
ISSN (Online): 2349 - 8218
IV. SIMULATION RESULT
Simulation was done for a 5 level proposed Z source multilevel
inverter in MATLAB/SIMILINK using the following
parameters:
i.
Input voltage, Vd = 100 V
ii.
Shoot through time period, T sh =0.345 ms
iii.
Modulation index, M=0.8
iv.
Switching frequency, Fs =1 Khz
v.
R load =100Ω
Fig.4.c.Capacitor Voltage
From the design, the value of Z source network capacitor is
obtained as C=600µf and inductor value is obtained as
L=6Mh.
Fig.4.d.For Modulation Index, M=0.85 Output Voltage
Fig.4.a.Output Voltage
Fig.4.e.For Modulation Index, M=0.9 Output Voltage
Thus we can see that as the modulation index increases, the
shoot through time period decreases and hence the output
voltage also decreases.
Fig.4.b.Inductor Current
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International Journal of Electrical and Computing Engineering
Vol.1, Issue 5, May 2016
ISSN (Online): 2349 - 8218
REFERENCES
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Fig.4.f. FFT analysis of output voltage with filter
TABLE 2: COMPARISON OF OUTPUT VOLTAGE
DC
INPUT
OF 100 V
Output
voltage
PROPOSED
MULTILEVEL
INVERTER
100 V
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PROPOSED Z SOURCE
MULTILEVEL INVERTER
M =0.8
M= 0.85
M=0.9
222 V
150 V
120 V
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V. CONCLUSION
In this paper, a new cascaded inverter topology has been
proposed which has superior features over conventional
cascaded multilevel inverter topologies in terms of the fewer
power switches, control requirements, cost, and reliability.
Since the output voltage in the proposed multilevel inverter is
limited to DC source summation, a Z source network is
introduced between the DC source and the inverter circuit. By
properly controlling the shoot through period of the Z source
network we can boost the output voltage by a boost factor of
3. Simulation of proposed Z source five level multilevel
inverter is done for an input of 100V in
MATLAB/SIMULINK and the results are shown.
[10] Sadigh A K, Dargahi V, Abarzadeh, M, Dargahi, S, "Reduced
DC voltage source flying capacitor multicell multilevel inverter:
analysis and implementation," Power Electronics, IET , vol.7,
no.2, pp.439,450, February 2014.
[11] F. Z. Peng, J. S. Lai, J. W. McKeever and J. VanCoevering, “A
multilevel voltage-source inverter with separate dc sources for
static var generation”, IEEE Trans. Ind. Applications, vol. 32,
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[12] Mariusz Malinowski, K. Gopakumar, Jose Rodriguez and
Marcelo A. Perez “A Survey on Cascade Multilevel inverters”,
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