Proceedings of International Conference on Materials for the Future - Innovative Materials, Processes, Products and Applications – ICMF 2013
438
Single Phase Five-Level Inverter Topology for PV
System
P. S. Soumya and Binitha Joseph 
Abstract—In this paper a modified single phase five level
inverter for grid connection of the PV system is presented.
Sinusoidal pulse width modulation (SPWM) is used to
generate the switching pulses for the inverter. The modulation
technique utilizes two reference signals and one carrier
signal. Both the reference signals are identical but having an
offset value equivalent to the carrier signal. As the level of the
multilevel inverter (MLI) increases, the harmonic reduction is
reduced. Proportional plus Integral (PI) controller is used for
controlling the grid current. The system operates near unity
power factor. The system model is simulated and is compared
with the conventional three level PWM inverter.
Keywords— PV, Multilevel Inverter, PWM, PI Controller,
Current Control
T
I.
INTRODUCTION
HE current trend across developed economies tips the
scale in favor of Renewable Energy. Recent advancements
in solar photovoltaic technology and constant incubation of
projects have brought around tremendous growth in the solar
PV market as well, which is projected to surpass other
renewable energy sources in the coming years. PV inverter
plays a major role in PV system which converts the dc output
power of the PV in to ac power to be fed into the grid. As the
level of the inverter increases, its harmonic content and, hence,
the size of the filter used and the level of electromagnetic
interference (EMI) generated by switching operation of the
inverter are reduced.
The three common topologies for multilevel inverters are
1)diode clamped (neutral clamped), 2) capacitor clamped
(flying capacitors), and 3) cascaded H-bridge inverter.
Generally used modulation and control strategies are multilevel
sinusoidal(PWM), multilevel selective harmonic elimination,
and space-vector modulation.
Fig 1 Reference and Carrier Signals
P.S. Soumya, M.Tech student, Dept.of Electrical and Electronics
Engineering, Govt. Engineering College, Thrissur, India. E-mail:
pssoumya88@gmail.com
Binitha Joseph, Assistant Professor, Dept.of Electrical and Electronics
Engineering, Govt. Engineering College, Thrissur, India. E-mail:
binitha.j2008@gmail.com.
Conventional single-phase three-level inverter with fullbridge configuration by using approximate sinusoidal
modulation technique as the power circuits. The output voltage
is having three values as: zero, positive (+Vdc), and negative
(−Vdc) supply dc voltage (Vdc is the supply voltage). The
harmonic components of the output voltage are determined by
the carrier frequency and switching functions. Therefore, their
harmonic reduction is limited to a certain degree.
In order to overcome this limitation, higher level inverters
are adapted. This paper presents a five-level PWM inverter
whose output voltage is having the following five levels: zero,
+1/2Vdc, Vdc, −1/2Vdc, and −Vdc. As the number of output
levels increases, the harmonic content can be reduced. This
inverter topology uses two reference signals, instead of one
reference signal, and one carrier signal to generate PWM
signals for the switches. Both the reference signals Vref1 and
Vref2 are identical to each other, but having an offset value
equivalent to the amplitude of the carrier signal Vcarrier, as
shown in Fig. 1.
This paper presents modified cascaded H-bridge inverter
with lesser number of switches as compared with the
conventional H-bridge inverter. Conventional H-bridge
inverter contains the series connection of single-phase
inverters with separate dc sources (SDCSs). In order to reduce
the overall number of switching devices in conventional
multilevel inverter topologies, a new topology has been
proposed. Conventional Cascaded H-Bridge inverter uses
8switches for five-level inverter. The new topology reduces
the number of switches to 5 in the case of five-level inverter.
Here no separate SDCSs are needed, instead capacitor voltage
divider is used.
As the inverter is used in a PV system, a proportionalintegral (PI) current control scheme is employed to keep the
output current sinusoidal and to have high dynamic
performance under rapidly changing atmospheric conditions
and to maintain the power factor at near unity. The two main
tasks of the control system are maximization of the energy
transferred from the PV arrays to the grid, and generation of a
sinusoidal current with minimum harmonic distortion, also
under the presence of grid voltage harmonics. Simulation
results are presented to validate the proposed inverter
configuration.
II.
PROPOSED FIVE LEVEL INVERTER TOPOLOGY
The proposed single-phase five-level inverter topology is
shown in Fig. 2. The inverter consists of a full-bridge
configuration with an auxiliary circuit. PV arrays are
connected to the inverter via a dc–dc boost converter. Because
the proposed inverter is used in a grid-connected PV system,
ISBN 978-93-82338-83-3 © 2013 Bonfring
Proceedings of International Conference on Materials for the Future - Innovative Materials, Processes, Products and Applications – ICMF 2013
utility grid is used instead of load. In order to ensure the
power flow is only from PV to the grid, the PV output voltage
is boosted to √2 times the grid voltage. A filtering inductance
Lf is used to filter the current injected into the grid which
makes the injected current must be sinusoidal with low
harmonic distortion. In order to generate sinusoidal current,
sinusoidal PWM is used. Sinusoidal PWM is obtained by
comparing a high-frequency carrier with a low-frequency
sinusoidal signal, which is the modulating or reference signal.
The carrier has a constant period; therefore, the switches have
constant switching frequency. The switching instant is
determined from the crossing of the carrier and the modulating
signal.
III.
PRINCIPLE OF OPERATION OF THE PROPOSED
INVERTER
PV arrays supply voltage to the grid. PV output voltage is
boosted by a dc–dc boost converter to exceed√2Vg. The
voltage across the dc-bus capacitors is Vdc. The proposed
inverter is to generate five levels output voltage, i.e., 0,
+Vdc/2, +Vdc, −Vdc/2, and –Vdc as in Fig. 6(c). As shown in
Fig. 2, auxiliary circuit which consists of four diodes and a
switch S1 is used between the dc-bus capacitors and the fullbridge inverter. Proper switching control of the auxiliary
circuit can generate half level of PV supply voltage, i.e.,
+Vdc/2 and −Vdc/2.
In order to generate the switching pulses for the inverter,
two reference signals Vref1 and Vref2 are to be compared
with the carrier signal at a time. If Vref1 exceeds the peak
amplitude of the carrier signal Vcarrier, Vref2 will be
compared with the carrier signal until it reaches zero. At this
point onward, Vref1 takes over the comparison process until it
exceeds Vcarrier. This will lead to a switching pattern, as
shown in Fig. 3. Switches S1–S3 will be switching at the rate
of the carrier signal frequency, whereas S4 and S5 will operate
at a frequency equivalent to the fundamental frequency. Table
I illustrates the level of Vinv (inverter output voltage) during
S1–S5 switch on and off.
439
Fig.3 Switching Pulses for S1, S2, S3, S4 and S5
Table1 Inverter Output Voltage During S1 –S5 On And Off
S1
S2
S3
S4
S5
Vinv
on
off
off
off
on
Vdc/2
off
on
off
off
on
Vdc
off
off
on
on
or
or
or
or
(on)
(on)
(off)
(off)
on
off
off
on
off
-Vdc/2
off
off
on
on
off
-Vdc
off
IV.
0
CONTROL SYSTEM IMPLEMENTATION
The feed back control algorithm in this paper uses PI
controller. The schematic representation of the system is as
shown in Fig. 4, the current injected into the grid, also known
as grid current Ig, is sensed and fed back to a comparator to
compare with the reference current Iref . Iref is obtained by
sensing the grid voltage and converting it to reference current
by multiplying it with constant m. The constant m is the
conductance corresponding to the maximum power. It is
obtained from the maximum power point tracking (MPPT)
algorithm using incremental conductance method. This
ensures that Ig is in phase with grid voltage Vg and always at
near-unity power factor.
Fig. 2 Proposed Five-level Inverter
Fig. 4 Schematic Representation of the System with PI
controller
ISBN 978-93-82338-83-3 © 2013 Bonfring
Proceedings of International Conference on Materials for the Future - Innovative Materials, Processes, Products and Applications – ICMF 2013
The incremental conductance algorithm is used to extract
maximum power from PV arrays and deliver it to the inverter.
The instantaneous current error is fed to a PI controller. The
integral term in the PI controller improves the tracking by
reducing the instantaneous error between the reference and the
grid current. The resulting error signal u which forms Vref1
and Vref2 is compared with a triangular carrier signal, to
produce PWM signals for the inverter switches.
V.
SIMULATION RESULTS
In order to verify that the proposed inverter can be
practically implemented in a PV system, simulations were
performed by using MATLAB SIMULINK. The PWM
switching strategy used in this paper is shown in Fig.1. It
consists of two reference signals and a triangular carrier
signal. Both the reference signals are compared with the
triangular carrier signal to produce PWM switching signals for
switches S1−S5 as in Fig. 3
Fig. 5 shows the simulation diagram of the proposed fivelevel inverter with PI controller. One leg of the inverter is
operating at a high switching rate equivalent to the carrier
frequency, whereas the other leg is operating at the rate of
440
fundamental frequency (i.e., 50 Hz). The switch at the
auxiliary circuit S1 also operates at the rate of the carrier
signal. The modulation index M determines the shape of the
inverter output voltage Vinv and the grid current Ig. Fig. 6
shows Vinv and Ig for different values of M.
The boost output voltage is set at 400 V (>√2Vg; in this
case, Vg is 240 V) in order to inject current into the grid. Fig.
6(a) shows that Vinv is less than √2Vg due to M being less
than 0.5. The inverter action cannot take place at this
condition because the current will be injected from the grid
into the inverter, rather than the PV system injecting the
current into the grid. Over modulation condition, which
happens when M >1.0, is shown in Fig.6(b). It has a flat top at
the peak of the positive and negative cycles because both the
reference signals exceed the maximum amplitude of the
carrier signal. To optimize the power transferred from PV
arrays to the grid, it is recommended to operate at 0.5 ≤ M ≤
1.0. Vinv for optimal operating condition is shown in Fig.
6(c). As Ig is almost a pure sine-wave, the THD can be
reduced compared with that under other values of M. THD
analysis and grid voltage and current are shown in Fig. 7 and
Fig.8.
Fig. 5 Simulation of the Five-level Inverter with PI Controller
(b)
(a)
ISBN 978-93-82338-83-3 © 2013 Bonfring
Proceedings of International Conference on Materials for the Future - Innovative Materials, Processes, Products and Applications – ICMF 2013
(c)
Fig6. (a) Vin for M<0.5, (b) Vin for M>1, (c) Vin for
0.5≤M≤1
441
Fig.8 Grid Voltage and Current
The results of the five level inverter are compared with
that of the three level inverter in terms of THD. The same
control strategy is used for the three level inverter. Fig.9
shows the simulation diagram of the three level inverter with
control algorithm with PI controller. Here no auxiliary circuit
is used and hence one dc-bus capacitor is used. The resulting
waveforms are shown in Fig.10 and Fig.11. The grid current is
almost identical to that of the five level.
Fig. 7 THD Analysis of Vin for 0.5≤M≤1
Fig.9 Simulation of Three-level Inverter with PI Controller
ISBN 978-93-82338-83-3 © 2013 Bonfring
Proceedings of International Conference on Materials for the Future - Innovative Materials, Processes, Products and Applications – ICMF 2013
VI.
442
CONCLUSION
This paper presented a single-phase five-level multilevel
inverter for PV application. The PWM technique utilizes two
reference signals and a carrier signal to generate switching
signals for the inverter. Results indicate that the THD of the
five-level inverter is much lesser than that of the conventional
three-level inverter. Furthermore, both the grid voltage and the
grid current are in phase at near-unity power factor.
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Fig.11 Grid Voltage and Current
The efficiency is also compared. As expected efficiency
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For the three level inverter the efficiency is 88.15% and for
the five level inverter, it is 83.25%. As the level of the inverter
increases, number of the switching devices also increases. It
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inverter, the auxiliary circuit in between the dc-dc converter
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causes the reduction in efficiency of the five level inverter.
However the THD of the proposed inverter is lower when
compared to that of the conventional three-level PWM
inverter, which is an important element for grid-connected PV
systems.
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ISBN 978-93-82338-83-3 © 2013 Bonfring