International Journal of Applied Sciences, Engineering and Technology Vol. 02, No. 01, Jan-Dec 2013 Performance of a 5-Level Hybrid Multilevel power conversion System Fed Induction Motor Drive S. ANUSHA and P. V. V. RAMA RAO Department of Electrical & Electronics Engg. Shri Vishnu Engg. College for Women, A.P., India Email: s.anusha202@gmail.com, hodeee@svecw.edu.in Abstract: The Multilevel inverters (MLI) are a new breed of power converter that is suited for high power applications. This paper presents three-phase cascaded hybrid multilevel inverter for 5-level has been developed from a conventional cascaded multilevel inverter. It consists of a standard 3-leg inverter (one leg for each phase) and H bridge in series with each inverter leg with separate dc voltage source, the three-phase induction motor as a load. Also the proposed topology can reduce the number of power switches compared to a traditional cascaded multilevel inverter. The modified PWM technique is introduced to the hybrid multilevel inverter topology which reduces the number of controlled switches used in the system. Due to the involvement of high number of switches thereby the harmonics, switching losses, cost and the THD is increased. This proposed topology increases the level with less number of switches. It dramatically reduces the switches for high number of levels that reduces the switching losses, cost and low order harmonics. Simulation has been carried out in MATLAB/simulink to study the performance of the proposed topology Keywords: Cascaded H-bridge, Hybrid 5-level inverter, SPWM technique, Modified PWM technique. Introduction: Use of multilevel inverters has become popular in recent years for high-power applications [1], and is very promising in ac drives, when both reduced harmonic contents and high power are required. A multilevel inverter is a power electronic system that synthesizes a desired output voltage from several levels of dc voltages as inputs [2]. By synthesizing the AC output voltage from several levels of DC voltages, staircase output voltage waveform can be produced. This allows for higher output voltage and simultaneously lowers the stress on the semiconductor devices. Among the various topologies of the multilevel inverters; cascaded H-bridge and the hybrid inverter requires two DC sources [3]. The number of power switches required for the multilevel inverters is shown Fig.1. Several well known pulse width modulation methods have been developed for the multilevel inverter structures [4], which are as follows: Selective Harmonic Elimination PWM (SHEPWM), Space Vector PWM (SVPWM) and Sinusoidal PWM (SPWM) [5]. Among these PWM methods the SPWM is the most popular one and its popularity is partially due to its simplicity. Fig 1.One phase of a 5-level Inverter a. Cascaded H-bridge b. Hybrid 5-level inverter inverter Table I: Components of a Single-Phase 5-Level Inverter Types of No of No of multilevel switches capacitors inverter Cascaded H-bridge 8 - Cascaded hybrid 6 2 The SPWM for multilevel inverters are categorized in to two methods: Single Carrier SPWM (SCSPWM) and Sub Harmonic SPWM (SHSPWM). The modified PWM technique [6] requires a one reference and a carrier signal, it is a combination of both sine and the triangular wave. Three-phase induction motors are commonly used in many industries. Generally, DC motors were the work horses for the Adjustable Speed Drives (ASDs) due to their excellent speed and torque response [8]. But they have the inherent disadvantages of commutator and brushes, which undergo wear and tear. Most of the cases AC motors are preferred due to its low cost, less maintenance, lower weight and higher efficiency. The advantages of multilevel inverters is their smaller output voltage step, which results in high capability, lower harmonic components, lower switching losses, better electromagnetic compatibility and high power quality [12]. Also it can operate at both fundamental switching frequency and high switching frequency PWM. Today, multilevel inverters are extensively used in medium voltage levels with high-power applications IJASET 020102 Copyright © 2013 BASHA RESEARCH CENTRE. All rights reserved. S. ANUSHA, P. V. V. RAMA RAO [13]. The field applications include use in laminators, pumps, conveyors, compressors, fans, blowers and mills. In this paper hybrid multilevel inverter is proposed developed from a conventional cascaded H-bridge inverter and a modified PWM technique is also developed to generate the gate pulses. Cascaded Five-Level Inverter: A cascaded H-bridge inverter for five levels is shown in Fig.2. Normally, each phase of a three-phase cascaded multilevel inverter requires “n” DC sources for 2n+1 level. Each separate dc source is connected to a single H-bridge inverter. Vdc Vdc , 0, . Therefore the output voltage of the 2 2 inverter is a combination of V1 and V2 that has 5 Vdc Vdc possible values 0, , Vdc , , Vdc , the 2 2 to switching pattern is given in table II. The model output voltage as shown in Fig.3. Fig.3. Output waveform of a 5-level inverter Fig.2. Three-phase cascaded H-bridge multilevel inverter Table II Switching pattern at 8 switches S.No Switches Output Voltage Levels 1 0 2 V Fig.4. Subsystem to generate gate pulses in Simulink using SPWM technique dc 3 4 5 2 Vdc Vdc 2 Vdc Fig.5.Generation of pulses using SPWM technique A five-level cascaded H-bridge multilevel inverter has two H-bridges for each phase. The output voltage of the first H-bridge is denoted by V1 and the output of the second H-bridge is denoted by V2 , so that the output voltage of the cascaded multilevel inverter is the sum of the two voltages Vo V1 V2 . By opening and closing of the first bridge appropriately the output voltage V1 Vdc Vdc , 0, .while the output 2 2 voltage of the second bridge V2 can be made equal can be made equal to Carrier based sinusoidal pulse width modulation (SPWM) is a popular method in industrial applications. SPWM is used to generate the PWM pulses. The multicarrier PWM method uses several triangular carrier signals, keeping only one modulating sinusoidal signal. If an ‘n’ level inverter is employed, ‘n-1’ carriers will be needed. The carrier will have the same frequency and the same peak to peak amplitude as shown in Fig.5. At every instant the reference is continuously compared with each of the carrier signal, and then the active device corresponding to that carrier is switched on, and if the reference is less than a carrier signal, then the active device corresponding to that carrier is switched International Journal of Applied Sciences, Engineering and Technology Vol. 02, No. 01, Jan-Dec 2013, pp 6-11 Performance of a 5-Level Hybrid Multilevel power conversion System Fed Induction Motor Drive off. The simulink model to generate the PWM pulses is shown in Fig.4. Methodology: The topology of the proposed hybrid multilevel inverter is illustrated in Fig.6, includes a standard three leg inverter (one leg for each phase) and H-bridge in series with each inverter leg. Before continuing discussion, it should be noted that the word main inverter is used to refer to the six-switch three-phase inverter and the word auxiliary inverter is referred to four-switch H-bridge inverter. Since the low switching losses during PWM operation is required, the main inverter will operate on square wave mode and auxiliary inverter will operate on PWM mode as depicted in Fig.8. The application of hybrid multilevel inverter with DC source applied in vehicle applications. Hybrid Five-Level Inverter: The topology of the proposed hybrid multilevel inverter is shown in Fig.6 which includes a complete and a simplified single-phase topology. It includes a standard 3-leg inverter (one-leg for each phase) and H-bridge in series with each inverter leg. The bottom is one leg of a standard 3-leg inverter with a dc power source ( ), the top is a H-bridge is connected in series with a 3-leg inverter use a separate dc power source ( ). achieve as shown in Fig.3, when the output voltage Vo V1 V2 is required to be zero, one can either set Vdc Vdc and V2 2 2 Vdc . V2 2 V1 or V1 Vdc 2 and Table III Switching Pattern at 6 Switches S. No On switches Voltage levels 1 Sa1Sa 2 S6 0 2 Sa1Sa 3 Sa 5 3 Sa1Sa 2 Sa 5 4 5 Sa1Sa 3 Sa 6 Sa 3 Sa 4 Sa 6 Vdc 2 Vdc Vdc 2 Vdc Fig.7. Logical diagram The referent sinusoidal PWM (SPWM) used for the auxiliary inverter is modified by using equation (1)-(4). The multiplexing signals from (3) and (4) are used to fabricate PWM signals by using logic diagram as shown in Fig.7. Fig. 6.Topology of a five level three phase cascaded hybrid multilevel inverter The output voltage S a 5 closed or V1 of this leg is either Vdc when 2 Vdc when S a 6 closed. This leg is 2 connected in series with a full H-bridge inverter, then the output voltage V2 of the H-bridge inverter is either Vdc 2 when S a1 , S a 4 when S a1 , S a 3 or S a 2 , S a 4 closed, or closed, 0 Vdc when S a 2 , 2 S a 3 closed the switching pattern is given in table III. An example output waveform that this topology can f t ma .sin t 1 1 2 f t ; f t 1 Tp 2 2 Tc 1 1 2 f t ;0 f t 2 2 1; f t 0 A1 0; f t 0 1 1; f t 2 A2 0; f t 1 2 International Journal of Applied Sciences, Engineering and Technology Vol. 02, No. 01, Jan-Dec 2013, pp 6-11 (1) (2) (3) (4) S. ANUSHA, P. V. V. RAMA RAO Where is a referent signal, is modulation index(0.0/1.0-1.0/1.0) is a multiplexing signal 1, is a multiplexing signal 2 is pulse width of PWM (0.0-1.0) Fig.9. Three-phase cascaded H-bridge 5-level inverter Fig.8. Modulating signals of both main and auxiliary inverter Table IV Fabricated PWM Signal for Proposed Hybrid Multilevel Inverter Sn SA1 SA2 SA3 SA4 SA5 SA6 Hybrid PWM mixing operator A1 Ā1 PWM * ((A2*A1) + (Ā2* Ā1)) PWM’ + ((A2*A1) + (Ā2* Ā1)) PWM * ((A2*A1) + (Ā2* Ā1)) PWM’ + ((A2*A1) + (Ā2* Ā1)) Simulation Results: A three- phase cascaded H-bridge five level inverter with dc source simulated and is shown in Fig. 9 and corresponding five level output voltage waveform is shown in the Fig.11. Similarly a three-phase cascaded H-bridge five level inverter using sinusoidal PWM technique is simulated and is shown in Fig.10 and the corresponding five level output voltage wave form is shown in the Fig.12. Table V Voltages of 5-Level Inverter Types of Voltage Voltage Voltage multilevel V1 V2 V0=V1+V2 inverters Cascaded H50 50 100 bridge Cascaded 50 50 100 hybrid Fig.10. Three-phase cascaded H-bridge 5-level inverter using SPWM Technique Fig.11. Output voltage waveform of a three-phase cascaded H-bridge 5-level inverter Fig.12. Output voltage waveform of a three-phase cascaded H-bridge 5-level inverter using SPWM technique A three-phase cascaded hybrid 5-level inverter simulated is shown in Fig.14 and corresponding 5-level output voltage wave form as shown in the Fig. 16. Similarly a three-phase cascaded hybrid 5-level inverter using modified PWM technique simulated and is shown in the Fig 15 and the corresponding 5-level output voltage waveform as shown in the Fig. 17 and the line-line output voltage waveform as shown in the Fig.18. International Journal of Applied Sciences, Engineering and Technology Vol. 02, No. 01, Jan-Dec 2013, pp 6-11 Performance of a 5-Level Hybrid Multilevel power conversion System Fed Induction Motor Drive motor. The speed of the rotor is nearly 155.3rad/sec as per the results of speed-time curve, shown in Fig.19 and the torque during simulation as shown in Fig.20. Fig.14. Three-phase cascaded hybrid 5-level inverter Fig.19. Speed-time curve Fig.20. Torque with respect to time Fig.15. Three-phase cascaded hybrid 5-level inverter using Modified PWM technique Fig.16. Output voltage waveform of a three-phase cascaded hybrid 5-level inverter Fig.17. Output voltage waveform of a three-phase cascaded hybrid 5-level inverter using SPWM technique Fig.18. Line-line output voltage waveform of a cascaded hybrid 5-level inverter. A three-phase asynchronous motor is connected to the proposed circuit shown in the Fig.14. The circuit is simulated to show the performance characteristics of Conclusion: A three-phase cascaded H-bridge 5-level inverter and a three-phase cascaded hybrid 5-level inverter are connected to a three-phase induction motor used as a load to observe the performance characteristics of the motor. This paper has demonstrated the state of the art of modified multilevel inverter topologies with reduced number of switches. This multilevel inverter structure and its basic operations have been discussed. The modified PWM technique has also been developed to reduce the switching losses. From the simulation results, several features of the proposed modulation strategy the output waveform are observed. Also the proposed topology can reduce the number of required power switches compared to a traditional cascaded H-bridge 5level inverter to get the same output voltage waveform. Thus the complexity and the cost of the circuit are decreased. References: [1] J.Rodriguez, J.Lai, and F.peng, “Multilevel inverters: a survey of topologies, control and applications,” IEEE Transactions on Industry applications, Vol.49, no.4, Aug.2002, pp.724-738. [2] F.Z.Peng, J.W.Mckeever, D.J.Adams, ”cascaded multilevel inverter for utility applications,” IEEE IECON, vol.2, July 2000, pp.437-442 [3] P. Hammond, “A new approach to enhance power quality for medium voltage ac drives,” IEEE Trans. on Ind. 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