Proceedings of the International Conference on Emerging Trends in Engineering and Management (ICETEM14)
INTERNATIONAL
JOURNAL OF ELECTRICAL
ENGINEERING
&
32-41, December,
2014, Ernakulam, India
TECHNOLOGY (IJEET)
ISSN 0976 – 6545(Print)
ISSN 0976 – 6553(Online)
Volume 5, Issue 12, December (2014), pp. 32-41
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IJEET
©IAEME
MODIFIED CASCADED MULTILEVEL INVERTER WITH
GA TO REDUCE LINE TO LINE VOLTAGE THD
JULYMOL JOSEPH1,
1,2
ARYA PRAKASH 2
EEE Department, Sree Narayana Gurukulam College of Engineering, Kadayiruppu,India,
ABSTRACT
The major problems associated with multilevel inverters are the harmonic content present at the output of the
inverter and the requirements of large number of switches, which will increase the switching losses, thereby reduce the
efficiency and overall cost of the inverter is increased. In this paper, an H-bridge inverter topology with reduced switch
count technique is introduced. This technique reduces the number of controlled switches used in conventional multilevel
inverter. To establish a single phase system, the proposed multilevel inverter requires one H-bridge and a multi
conversion cell. A multi conversion cell consists of three equal voltage sources with three controlled switches and three
diodes. This paper is based on 7-level inverter and the line voltage THD minimization can be achieved by using Genetic
Algorithm (GA) optimization technique.
Keywords: Multilevel inverter, Cascaded Multilevel Inverter, H-bridge Inverter, Genetic algorithm (GA), Line-voltage
total harmonic distortion (THD), THD minimization.
I. INTRODUCTION
An inerter is a power electronic device, which is used to convert DC power to AC power at desired output
voltage and frequency [1], [2]. A two-level inverter has demerits like less efficiency, high cost and high switching
losses. To overcome these demerits, multilevel inverters are proposed. The concept of multi level inverter has been
introduced since 1975 began with 3- level inverter [3]. The different multilevel inverter topologies are diode clamped,
flying capacitor and cascaded multilevel inverter [4]. By comparing these topologies we can found that cascaded
multilevel inverter with separate DC sources is more efficient than other structures. The separate DC sources, which may
be obtained from batteries, fuel cells or solar cells.
Multilevel inverter output voltage produces a staircase waveform, this waveform looks like a sinusoidal
waveform. The multilevel inverter output voltage having less number of harmonics compared to the conventional bipolar
inverter output voltage. If the multilevel inverter output increases to N-level, the harmonics reduced to zero. In this paper
harmonic reduction in 7 level inverter is discussed. The THD minimization is achieved by using Genetic Algorithm (GA)
optimization technique. GA is an efficient method, by which the switching angles are determined so as to minimize the
waveform THD while the desired fundamental component is generated. Phase voltage has a simple and unique
waveform, and its THD can be easily formulated [5], compared to the line - to- line voltage which changes the form as
switching angles vary. Therefore, in THD minimization of a multilevel inverter’s output, it is quite common to apply the
minimization algorithm on the phase voltage [6], [7]. In three-phase three-wire applications, however, the inverter lineto-line voltage is of the main concern, since it determines the load-voltage harmonic contents.
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Proceedings of the International Conference on Emerging Trends in Engineering and Management (ICETEM14)
32-41, December, 2014, Ernakulam, India
The rest of this paper is organized as follows. Section II discuss about cascaded multilevel inverter. In Section
III, is devoted to describing briefly about modified cascaded multilevel inverter. In Section IV the stepped waveform of a
multilevel inverter’s output voltage and its harmonic components are described. In Section V the THD minimization
strategy is explained, and then, it is applied to the phase voltage and line voltage of the inverter in Section VI, followed
by discussion and comparison of the results in Section VII. Finally, there is a conclusion in Section VIII.
II. CASCADED MULTILEVEL INVERTER (CMLI)
The output voltage of cascaded multilevel inverter is equal to sum of the output voltages of the individual
bridges and can be controlled to produce a staircase waveform. The general structure of cascaded multilevel inverter for a
single phase system is shown in Figure 1. Each separate voltage source Vdc1, Vdc2, Vdc3 is connected in cascade with
other sources via a special H-bridge circuit associated with it. Each H-bridge circuit consists of four active switching
elements that can make the output voltage either positive or negative polarity; or it can also be simply zero volts which
depends on the switching condition of switches in the circuit. This multilevel inverter topology employs three voltage
sources of unequal magnitudes. It is fairly easy to generalize the number of distinct levels [8],[9]. The S number of
sources or stages and the associated number of output level can be written as follows,
N=2S+1 ..............................................................................................................(1)
(a)
(b)
Fig 1: conventional cascaded multilevel inverter, (a) single phase, (b) 3 phase
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Proceedings of the International Conference on Emerging Trends in Engineering and Management (ICETEM14)
32-41, December, 2014, Ernakulam, India
Fig 2: typical output waveform for cascaded multilevel inverter
Figure 2 shows the typical output voltage waveform of a seven level cascaded multilevel inverter with three separate
DC sources.
III. MODIFIED MULTILEVEL INVERTER
This inverter consists of a multi conversion cell and an H bridge. A multi conversion cell consists of three separate
voltage sources (Vdc1, Vdc2, Vdc3), each source connected in cascade with other sources via a circuit consists of one
active switching element and one diode that can make the output voltage source only in positive polarity with several
levels[10]. Only one H-bridge is connected with multi conversion cell to acquire both positive and negative polarity. By
turning on controlled switches S1 (S2 and S3 turn off) the output voltage +1Vdc (first level) is obtained. Similarly
turning on of switches S1, S2 (S3 turn off) +2Vdc (second level) output is produced across the load. Similarly +3Vdc
levels can be achieved by turning on S1, S2, S3 switches as shown in Table I. The S number of DC sources or stages and
the associated number of output level can be calculated by using the equation as follows,
N=2S+1 .......................................................................................................... (2)
Fig 3: Topology for modified cascaded multilevel inverter (single phase)
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Proceedings of the International Conference on Emerging Trends in Engineering and Management (ICETEM14)
32-41, December, 2014, Ernakulam, India
Conventional 7 level cascaded H bridge inverter using 12 switches per phase, but proposed modified cascaded
multilevel inverter using only seven switches per phase. This is the main advantage of modified cascaded multilevel
inverter.
TABLE 1: Basic Operation of Proposed Multilevel Inverter
SI.NO:
1
2
3
4
5
6
7
Multi-conversion Cell
ON switches
S1,S2,S3
S1,S2,D3
S1,D2,D3
D1,D2,D3
S1,D2,D3
S1,S2,D3
S1,S2,S3
OFF switches
D1,D2,D3
S3,D1,D2
S2,S3,D1
S1,S2,S3
S2,S3,D1
S3,D1,D2
D1,D2,D3
H-Bridge
ON switches
Q1,Q2
Q1,Q2
Q1,Q2
Q1,Q2
Q3,Q4
Q3,Q4
Q3,Q4
OFF switches
Q3,Q4
Q3,Q4
Q3,Q4
Q3,Q4
Q1,Q2
Q1,Q2
Q1,Q2
Voltage
level
+1Vdc
+2Vdc
+3Vdc
0
-1Vdc
-2Vdc
-3Vdc
The switching table for modified cascaded multilevel inverter is shown in Table I. It depicts that for each
voltage level; only one of the switches is in ON condition among the paralleled switches. Multi conversion cell converts
DC voltage into a stepped DC voltage, which is outputted as a stepped or approximately sinusoidal AC waveform by the
H-bridge inverter. In this H-bridge, for positive half cycle, switches Q1 and Q2 will be turned on, similarly for negative
half cycle switches Q3 and Q4 must be in ON condition. Figure 2 shows the typical output voltage waveform of a seven
level cascaded multilevel inverter with three separate DC sources.
Fig 4: Typical output voltage waveform of a modified cascaded multilevel inverter
Table II shows that the modified cascaded multilevel inverter involves only seven switches whereas
conventional inverter comprises twelve switches, but in both cases input voltage at each stage and output level are same.
Therefore the proposed modified cascaded multilevel inverter has less switching losses, simple control circuit and less
complexity than conventional cascaded multilevel inverter.
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Proceedings of the International Conference on Emerging Trends in Engineering and Management (ICETEM14)
32-41, December, 2014, Ernakulam, India
TABLE II: Comparison of Conventional and Modified Cascaded Multilevel Inverter
SI
NO:
1
2
Name of topology
Cascaded multilevel
inverter
Modified cascaded
multilevel inverter
Total number of
DC input(S)
Number of
phase voltage
level(N)
Number of
line voltage
level
Number of
switches
used
Number of
switches for
7 level
3
2S+1=7
2N-1=13
4S
12
3
2S+1=7
2N-1=13
S+4
7
IV.MULTILEVEL INVERTER’S OUTPUT VOLTAGE
Fig. 5 shows a half cycle of a typical stepped waveform of the phase voltage of a seven-level inverter. The other
half cycle is the same but in the opposite direction. Assuming a symmetrical waveform, only three angles α1,α2, and α3
are required to determine the whole cycle of the waveform[11], where α1, α2, and α3 are the switching angles of the
three H-bridges in cascaded multilevel inverter as well as the switching angles of multi-conversion cell in modified
cascaded multilevel inverter, forming the seven-level inverter.
Fig 5: half cycle of the phase voltage waveform of 7 level inverter
Fourier analysis of such a waveform yields the following expression for the rms value of fundamental and
harmonic components of the phase voltage;
..................................................(3)
Because of quarter-wave symmetry in the waveform, it contains odd-order harmonics only. The fundamental voltage
at n=1;
...............................................................................(4)
The rms value of phase voltage as;
............................................................(5)
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Proceedings of the International Conference on Emerging Trends in Engineering and Management (ICETEM14)
32-41, December, 2014, Ernakulam, India
The line voltage Vab is obtained by subtracting Vb from Va. Because of symmetry, the fundamental
components of the phase voltages Va and Vb have the same amplitude and 120o phase difference. Therefore, the rms
value of the line-voltage fundamental component is √3 times that of the fundamental component of the phase voltage
VL1=√3V1
V.THD MINIMIZATION
THD minimization is achieved by reducing the harmonic component at the inverter’s output voltage. The aim is
to determine the optimum switching angles that generate an output voltage with the required fundamental component and
the possible minimum THD. This is a problem to be solved by an optimization algorithm. Conventional method using
Newton-Raphson method. This method is derivative dependant and it needs good initial guess [12] and no guarantee to
be optimum. Providing a good guess is very difficult in most cases. It has computational burden and is time consuming.
More than one solution is possible with different modulation indices. The limitations of the Newton Raphson method is
eliminated by using Genetic algorithm based optimization technique. Genetic algorithm optimization technique is applied
to MLI to determine optimum switching angles.
VI. GENETIC ALGORITHM
One of the most important problems of power inverter is finding the desired harmonic frequency for
representing the transmitted signal with low power consuming, so, to eliminate specific order harmonics, the switching
angles must be calculated. Genetic Algorithm (GA) is a method used for solving both constrained and unconstrained
optimization problems based on natural selection, the process that drives biological evolution. GA has been introduced
since 1960 by John Holland & David Goldberg. GA is used which is a simple, powerful, and evolutionary technique,
inspired from the laws of natural selection and genetics. It is a general-purpose stochastic global search algorithm, with
no need of functional derivative information to search for the solutions that minimize (or maximize) a given objective
function. GA reduces the computational burden and search time, while solving complex objective functions [13].
Algorithm
1.
Find the no: of variables specific to the problem, this will be the no: of genes in a chromosome.
2.
Set the population size & initialize the population with random angles between 0 & (π/2).
3.
If α1< α2< α3<.... αm<(π/2) for getting quarter wave symmetry, then go to next step otherwise repeat above.
4.
Computation of fitness function F(α).
5.
Pick the best individuals.
6.
Create new set of values using crossover & mutation process.
7.
When solution is converged, and then finds the switching angles, otherwise repeat for next generation.
Fitness function = √( V52+ V72)..................................................................................(6)
This fitness function is used to minimize the lower order harmonics (ie; 5th & 7th ). In three phase application the
effect of third order harmonics and their multiples (ie,9,15,21 etc) are negligible. This is the reason for selecting 5th and
7th harmonic component for THD minimization.
VII. SIMULATION RESULTS
Simulation done on both conventional and proposed topologies of cascaded multilevel inverter. Without
applying any optimization techniques the switching angles are calculated by trial and error method. In this method the
switching pulses for each switch can be varied manually in each simulation and they are tabulated. From the table we can
found that the output waveform THD is varies with the variation of switching pulses or we can say that the output
voltage THD is a function of switching angles. After applying GA, with appropriate fitness function the optimum
switching angles for minimum THD can be calculated.
GA Result
Number of iterations = 200
Optimum firing angles are
α1 = 0.1364118 rad =7.816o
α2 = 0.271989 rad =15.584o
α3 = 0.65 rad =37.24o
V1=607.3(peak), 429.4(rms)
THD=7.33%
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Proceedings of the International Conference on Emerging Trends in Engineering and Management (ICETEM14)
32-41, December, 2014, Ernakulam, India
Fig 6: simulation model
Fig 7: switching pattern
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Proceedings of the International Conference on Emerging Trends in Engineering and Management (ICETEM14)
32-41, December, 2014, Ernakulam, India
Fig 8: phase voltage waveform
Fig 9: line voltage waveform
Fig 10: FFT analysis without THD minimization
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Proceedings of the International Conference on Emerging Trends in Engineering and Management (ICETEM14)
32-41, December, 2014, Ernakulam, India
In FFT analysis without THD minimization the switching angles are calculated randomly.
Fig 11: FFT analysis with THD minimization
By applying switching angles obtained from GA in Fourier analysis, we can found that the lower order
harmonics have lesser magnitude as well as higher order harmonics have higher magnitude. Again the higher order
harmonics can be effectively reduced by proper filter design.
TABLE III: FFT Analysis with THD Minimization
Measured fundamental
Measured
Magnitude of harmonic component (% of fundamental)
component
V1
V5
V7
V11
V13
V17
GA Result
α1=0.1364118
=7.816o
rad
α2 = 0.271989
=15.584o
rad
α3 = 0.65 rad =37.24o
429.4
0.18
0.22
0.75
4.87
1.65
Calculated
Magnitude of harmonic component (% of fundamental)
Calculated fundamental
component
V1
428.84
V5
V7
V11
V13
V17
0.05
0.47
0.88
4.7
1.516
VIII. CONCLUSION
This paper revealed that proposed modified multilevel inverter topology with reduced number of switches can
be implemented for industrial drive applications. This multilevel inverter structure and its basic operations have been
discussed elaborately. A detailed procedure for calculating required voltage level on each stage has been conversed. As
conventional seven level inverter involves twelve switches, it increases switching losses, cost and circuit complexity The
proposed inverter engages only seven switches with three diodes, which reduces switching losses, cost and circuit
complexity. Moreover it effectively diminishes lower order harmonics. Therefore effective reduction of total harmonics
distortion is achieved. This thesis work concentrate on the reduction of usage of number of switches and THD
minimization of 7 level inverter. This work can be extended to 9 level or higher levels, because as the number of levels
increases the THD value reduced to zero. Also we can improve the circuit with minimum number of switches, as the
number of switches reduces the switching losses will be reduced thereby the efficiency can be improved.
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Proceedings of the International Conference on Emerging Trends in Engineering and Management (ICETEM14)
32-41, December, 2014, Ernakulam, India
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