International Journal of Emerging Technology and Advanced Engineering
Website: www.ijetae.com (ISSN 2250-2459, ISO 9001:2008 Certified Journal, Volume 2, Issue 12, December 2012)
A New Multilevel Topology For Induction Motor Drive
k.Srinivas1, k. Ramesh babu2, CH. Rambabu3
1,2,3
Department of Electrical and Electronics Engineering, Sri Vasavi Engineering College, Tadepalligudem (A.P), India
They generate smaller Common Mode (CM) voltage,
thus reducing the stress in the motor bearings in addition
using ophisticated modulation methods CM voltages can be
eliminated. They can operate with a
lower switching
frequency.
Three different topologies have been proposed for
multilevel inverters: Diode Clamped (Neutral Clamped),
Flying Capacitor and Cascaded Multi cell separate dc
sources, in addition several modulation and control
strategies have been adopted for multilevel inverters [1]
In the higher levels large number of components are
require such as Clamping diodes (for NPC), Clamping
capacitors (for FC ), number of DC sources (for cascaded
H-Bridge) and Complicated PWM strategies. But in this
paper proposed topology require fewer components, free
from voltage imbalancing problems and reduced
complexity when compared to other topologies.[2]
Abstract— Use of multilevel inverters has become popular
in recent years for high power applications and an effective
and practical solution for increasing power and reducing
harmonics of AC waveforms. By synthesizing the AC output
voltage from several levels of DC voltages, stair case output
waveform can be produced. This allows for high output
voltage and simultaneously lowers the stress on the
semiconductor device, complexity of control and introduce
voltage unbalancing problems. In this paper the proposed
topology requires less number of switches, free from voltage
imbalancing problems and reduced complexity when
compared to other topology of available multilevel inverters
Neutral Point Clamped and Flying Capacitor. This topology
shown the requirement of components and compared to other
topologies to show the superiority. The simulation results of
proposed topology three phase five-level and seven-level
multilevel inverter fed induction motor drive are verified
using MATLAB. The THD
between five-level and sevenlevel inverter is compared it can be observed that in the
higher levels THD is reduced.
II. NEW MULTILEVEL TOPOLOGY
Keywords— Multilevel inverter, new multilevel topology,
spwm
In ordinary multilevel inverters specified
switching
devices are used to generate multilevel positive and
negative half cycles or multilevel sinusoidal wave form. In
this paper as shown in the block diagram of fig.1 the
proposed topology generate multilevel positive half cycle
only, no need to generate negative half cycle. The positive
half cycle can be converted in to negative half cycle by
means of full bridge converter. So in the proposed topology
the requirement of switching devices are reduced to
generate multilevel sinusoidal wave form.[3],[4].
I. INTRODUCTION
In recent years, industry has begun to demand higher
power equipment, which now reaches as the megawatt
level. Controlled Ac drives in the megawatt range are
usually connected to the medium voltage grids (2.3, 3.3,
4.16, or 6.9kv). For these reasons, a new family of
multilevel inverters has emerged as the solution for
working with higher voltage levels [1]. In a medium
voltage and high power applications two level inverter
have some limitations in operating at high frequency
mainly due to switching loses and constraints of devices
voltage\ power ratings [6] For a medium voltage grid it is
troublesome to connect only one power semiconductor
switches directly. As a result, multilevel power converter
structure has been introduced as an alternative in high
power and medium voltage situations [7, 8, and 9].
The
most
attractive
features
of
multilevel
inverters are as follows.
They can generate output voltage with extremely low
distortion. They draw input current with very low
distortion.
DC
Power
supply
Positive
level
generator
Full
Bridge
Converter
PWM controller
Fig.1 Block diagram of New Multilevel Topology
323
Load
International Journal of Emerging Technology and Advanced Engineering
Website: www.ijetae.com (ISSN 2250-2459, ISO 9001:2008 Certified Journal, Volume 2, Issue 12, December 2012)
Operation of three phases Five-level multilevel inverter
using New Multilevel Topology for induction motor drive:
Operation of new topology can be explained with the
help of fig.2 and Table.1. By proper switching
combinations of the switches S1 to S4 the positive half
cycle can be generated. Switches SH1 and SH2 are
complementary in full bridge converter, similarly SH2 and
SH3 are also complementary. When SH1 and SH2 are
switched on together positive half cycle can be obtained to
the load. When SH3 and SH8 switched on together positive
half cycle to be converted in to negative half cycle to the
load. This topology requires half of the fundamental output
whereas output for negative half cycle is automatically
generated by switching of full bridge converter.
The proper switching combination of switches S1 to S6
as shown in Table.2 the positive half cycle can be
generated. This positive half cycle can be converted in to
negative half cycle by means of full bridge converter
circuit.
In seven level inverter modified full bridge converter
circuit is used to reduce the switching devices requirement.
Generally in fig.2 full bridge converter need 12 switches to
generate positive or negative half cycle. In seven level
inverter circuit of fig.3 modified full bridge converter need
only 10 switches to generate positive and negative half
cycle to the load. When compared to other available
topologies of multilevel inverters as shown in Table.3 this
new topology require less device count.
Fig.2 Simulink diagram of Five-level multilevel inverter for Induction
motor drive
TABLE1
Switching states for five level inverter
Fig.3 Simulink diagram of Seven-level multilevel inverter for
Induction motor drive
Output
voltage
S1
S2
S3
S4
0
0
1
1
0
Vdc
0
1
0
1
2Vdc
1
0
0
1
TABLE.2
Switching states for Seven-level inverter
Operation of three phases Seven-level multilevel inverter
using New Multilevel Topology for induction motor drive:
The new topology of seven level inverter is shown in
Fig.3.
324
Output
voltage
S1
S2
S3
S4
S5
S6
0
0
1
1
0
0
0
Vdc
0
1
0
1
0
0
2Vdc
1
0
0
0
1
0
3Vdc
1
0
0
0
0
1
International Journal of Emerging Technology and Advanced Engineering
Website: www.ijetae.com (ISSN 2250-2459, ISO 9001:2008 Certified Journal, Volume 2, Issue 12, December 2012)
TABLE.3
Number of components for three phase inverter
Inverter
Type
NPC
Flying
capacitor
Cascaded
H-bridge
New
topology
Main
switches
6(N-1)
6(N-1)
6(N-1)
3((N-1)+2)
Main
diodes
6(N-1)
6(N-1)
6(N-1)
3((N-1)+2)
Clamping
diodes
3(N1)(N-2)
0
0
0
DC bus
capacitors
3(N-1)
3(N-1)
3(N-1)/2
(N-1)/2
Flying
capacitors
0
3(N-1)(N2)
0
0
Total
numbers
3(N2+2N3)
3/2((N-1)
27/2(N-1)
(13N+33)/2
The five-level Phase voltage is shown in fig.6 (b). The
fig.6(c), (d), (e) are the Induction motor RYB currents in
Amperes, speed in R.P.M and Electromagnetic Torque in
Newton meter respectively.
Line current (A)
Fig.5 (a)
Phase voltage (V)
Fig.5 (b)
(N+8))
IRYB (A)
III. SIMULATION RESULTS
In the proposed topology, in the carrier based
implementation, the phase disposition PWM scheme is
used. In phase disposition technique the carrier wave form
are in phase with reference wave form. The proposed
topology will require (N-1)/2 carriers only and are just
positive as shown in fig.4.
Fig.5 (c)
Speed (R.P.M)
Fig.5 (d)
Electromagnetic Torque Te (N*m)
Fig.4: Phase disposition PWM
The performance of three phase induction motor fivelevel inverter is shown in fig.5. The Line current is shown
in fig.5 (a). The five-level Phase voltage is shown in fig.5
(b). The fig.5(c), (d), (e) are the Induction motor RYB
currents in Amperes, speed in R.P.M and Electromagnetic
Torque in Newton meter respectively. Similarly the
performance of three phase induction motor seven level
inverter is shown in fig.6 The Line current is shown in
fig.6 (a).
Fig.5 (e)
Fig.5 Simulation Results for Three-phase 5- level inverter induction
motor load
325
International Journal of Emerging Technology and Advanced Engineering
Website: www.ijetae.com (ISSN 2250-2459, ISO 9001:2008 Certified Journal, Volume 2, Issue 12, December 2012)
TABLE 4:
Modulation Index Vs THD of five-level and seven-level inverters
Line current (A)
Modulation
Index
THD of five-level
THD of sevenlevel
1.0
12.48
8.94
0.9
17.32
16.84
0.8
24.41
22.26
0.7
26.28
19.49
0.6
18.72
17.24
0.5
20.10
16.47
0.4
34.37
25.36
0.3
36.21
26.42
0.2
37.84
27.92
Fig.6 (a)
Phase voltage (V)
Fig.6 (b)
IRYB (A
Fig.6 (c)
Speed (R.P.M)
Fig.6 (d)
Electromagnetic Torque Te (N*m)
Fig.7 THD Vs MI of five and seven-level inverter
Fig.6 (e)
V. CONCLUSION
Fig.6 Simulation Results for Three-phase 7- level inverter induction
motor load
In this paper, a new multilevel topology in five-level and
seven-level inverter fed induction motor drive is
implemented. In seven-level inverter circuit modified full
bridge converter is used for reducing the switching devices
and higher reliability. Here SPWM controller has less
complexity when compared to other topologies. The THD
is compared of five-level and seven-level inverters.
IV. THD COMPARISION
The comparison between the THD of both three phase
five-level and seven-level inverter with respect to
Modulation index is shown in fig.7. It can be observed that
in the higher levels the THD of the multilevel inverter is
reduced.
326
International Journal of Emerging Technology and Advanced Engineering
Website: www.ijetae.com (ISSN 2250-2459, ISO 9001:2008 Certified Journal, Volume 2, Issue 12, December 2012)
Authors‘ Profile
It can be observed that in the higher levels THD is
reduced. The simulation results of proposed topology of
three phase five level and seven level inverter fed induction
motor drive are verified using MATLAB
Mr. k. srinivas received the Bachelor of
Technology degree in Electrical &
Electronics Engineering from JNTU
Kakinada in 2008. Currently he is
pursuing master in technology in Sri Vasavi Engineering
College, Tadepalligudem, A.P. His areas of interests are
in Power Systems, Power Electronics
REFERENCES
[1 ] J.Rodriguez, J.-S Lai and F . Z Peng , ‗‘Multilevel inverters : a
survey of topologies, controls, and applicatiosn,‘‘ IEEE Trans. Ind .
Electron., vol .49, pp.724-738, 2002.
[2 ] J.S Lai and F. Z. Peng, ‗‘Multilevel level converters –A new breed
of power converters ,‘‘ IEEE Trans . Ind . Applicat., vol . 32 , pp
.1098-1107, May/June 1996.
[3 ] E.Najafi, A.H.M.Yatim and A.S. Samosir. ―A new topologyreversing voltage (RV) for multi-level inverters.‖ 2nd International
conference on power and energy (PECon 08),pp 604-608, December
2008 Malaysia
[4 ] Hemant joshi, P.N Tekweni and Amar Hinduja. ‖Multilevel inverter
for induction motor drive : using reversing voltage topology‖ 978-14244-7398@2010 IEEE
[5 ] Performance evaluation of inverted sine PWM Technique for an
Asymmetric cascaded multilevel inverter. © 2005 - 2009 JATIT
[6 ] Jose Rodriguez, Leopoldo G. Frequelo, Samir Kouro, Jose I. Leon,
Ramon C. Portillo, Ma Angeles Martin Prats and Marcelo
Perez.―Multilevel Converters: An Enabling Technology for Highpower Applications‖ IEEE Proceedings, vol. 97, no. 11, pp17861817, Nov2009.
[7 ] J.S Lai and F. Z. Peng, ‗‘Multilevel level converters –A new breed
of power converters ,‘‘ IEEE Trans . Ind . Applicat., vol . 32 , pp
.1098-1107, May/June 1996.
[8 ] J.Rodriguez, J.-S Lai and F . Z Peng , ‗‘Multilevel inverters : a
survey of topologies, controls, and applicatiosn,‘‘ IEEE Trans. Ind .
Electron., vol .49, pp.724-738, 2002.
[9 ] L. M. Tolbet, F. Z . Peng, and T. G Habetler, ‗‘Multilevel
converters for large electric drives, ‗‘ IEE Trans. Ind . Applicat., vol,
35, 36-44, 1999.
Mr. K. Ramesh Babu received the
Bachelor of Technology degree in
Electrical & Electronics Engineering
from JNTU in 2007 and Master‘s
degree from JNTU Hyderabad in 2010. Currently,
working as an Assistant Professor in
Sri Vasavi
Engineering College, Tadepalligudem, A.P. His areas of
interests are in power systems, Power electronic control
of drives.
Mr. Ch. Rambabu received the Bachelor
of Engineering degree in Electrical
&Electronics Engineering from Madras
University, in 2000 and Master‘s degree
from JNTU Anantapur in 2005.He is a
research student of JNTU Kakinada. Currently, he is an
Associate Professor at Sri Vasavi Engineering College.
His interests are in power system control, Power
Electronics and FACTS
327