iC-HG EVAL HG21M HIGH-SPEED MODULE FOR SMD VCSEL

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iC-HG EVAL HG21M
preliminary
HIGH-SPEED MODULE FOR SMD VCSEL ARRAYS
Rev A1, Page 1/3
ORDERING INFORMATION
Type
Package
Options
Order Designation
iC-HG
HG21M
(DIL28)
-
iC-HG iCSY HG21M
Figure 1: HG21M Package (DIL28)
PIN CONFIGURATION
Figure 2: Top view / Dimensions in mm
No
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Name
GND
GND
GND
GND
nc
nc
nc
nc
nc
nc
nc
nc
RCI36
POTVDD
Copyright © 2015 iC-Haus
Function
Ground, Analog Ground
Ground, Analog Ground
Ground, Analog Ground
Ground, Analog Ground
not connected
not connected
not connected
not connected
not connected
not connected
not connected
not connected
Current Control Voltage 36
Potentiometer 12 36 VDD
No
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Name
POTVDD
RCI12
POTGND
POTGND
EN46
EN35
EN2
EN1
ELVDS
NER
VDD
LDA
LDA
LDA
Function
Potentiometer 12 36 VDD
Current Control Voltage 12
Potentiometer 12 36 GND
Potentiometer 12 36 GND
Input Channel 4 + 6
Input Channel 3 + 5
Input Channel 2
Input Channel 1
TTL/LVDS Input Selector
Error Monitor Output
Supply Voltage
Anode Laser Diode
Anode Laser Diode
Anode Laser Diode
http://www.ichaus.com
preliminary
iC-HG EVAL HG21M
HIGH-SPEED MODULE FOR SMD VCSEL ARRAYS
Rev A1, Page 2/3
SMD POSITIONS
Figure 3: SMD Positions
NOTE: Module must be baked (min. 24 h at 100 °C)
before exposing to high temperature processes (e.g.
reflow soldering) to avoid delamination, PCB/VIA damages, and popcorning.
The PCB has a very low thermal resistance that makes
manual soldering of SMT devices difficult.
Figure 4: Details of the VCSEL pad
ABSOLUTE MAXIMUM RATINGS
Item Symbol
No.
Parameter
Conditions
Unit
TG1 Ta
Operating Ambient Temperature Range
-20
85
°C
TG2 Ts
Storage Temperature Range
-20
85
°C
Min.
Typ.
Max.
preliminary
iC-HG EVAL HG21M
HIGH-SPEED MODULE FOR SMD VCSEL ARRAYS
Rev A1, Page 3/3
SCHEMATICS
J1
25
1 CVDD2
100nF
2
J1
15
1 CLAS7_8
1 CVDD1
1μF
2
J1
14
R
1kΩ
POT36
C
L
R
1kΩ
POT12
C
L
2
RPOT12
1
1kΩ
J1
18
2
J1
26
2 100nF
RPOT36
1
1kΩ
1
1
RCI12
RCI36
100Ω
100Ω
2
2
RSHRT1
2
1
0Ω X
U1
iC-HG
18
VDD
1
REN12
100Ω
2
&
LDK2 25
&
1
REN36
100Ω
2
LDK3 23
J1
12
&
Components marked with 'X'
are not assembled
AGND3 24
LDK4 13
5 CI4
16 EN4
J1
19
AGND2 26
3 CI3
17 EN3
J1
20
AGND1 28
2 CI2
20 EN2
X 1
RSHRT2
0Ω
2
X 1
RSHRT3
0Ω
2
LDK1 27
1 CI1
21 EN1
J1
22
J1
21
J1
27
1 CLAS1_6
J1
13
RCVPOT 1
4.7μF
2
J1
16
J1
17
2 100nF
A
D1
X
C
J1
28
&
J1
11
J1
10
J1
9
J1
8
AGND4 12
LDK5 11
6 CI5
J1
7
J1
6
J1
5
15 EN5
&
AGND5 10
LDK6 9
7 CI6
14 EN6
J1
23
19 ELVDS
&
LVDS
/TTL
AGND6 8
NER 22
PWR & TEMP
MONITOR
J1
24
SUB
GND
EPAD
4
J1
4
J1
3
J1
2
J1
1
Figure 5: Circuit diagram
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