IJIRST –International Journal for Innovative Research in Science & Technology| Volume 1 | Issue 12 | May 2015
ISSN (online): 2349-6010
Analytical Study and Hardware Implementation
of Diode Clamped Multilevel Inverter for Electric
Drive Applications
Aswathy S Vijayan
Student
Department of Electronic & Electrical Engineering
Adi Shankara Institute Of Engineering And Technology,
Kerala, India
Divya K S
Student
Department of Electronic & Electrical Engineering
Adi Shankara Institute Of Engineering And Technology,
Kerala, India
Minu Yacob
Student
Department of Electronic & Electrical Engineering
Adi Shankara Institute Of Engineering And Technology,
Kerala, India
Sreehari S
Assistant Professor
Department of Electronic & Electrical Engineering
Adi Shankara Institute Of Engineering And Technology,
Kerala, India
Abstract
The multilevel inverters have drawn tremendous interest in the power industry. The unique structure of multilevel voltage source
inverter allows them to reach high voltages with low harmonics without the use of transformers or series-connected synchronized
switching devices. A diode clamped multilevel inverter is used .For these type of inverters as the number of levels is high enough
,the harmonic content will be low enough to avoid filters. The inverter efficiency is higher and it is having simple control
methods than all other types of multilevel inverters. A nine level multilevel inverter is used here. A comparative study on the
THD of nine level diode clamped inverter has been carried out. The diode clamped inverter provides multiple voltage levels from
a nine level unidirectional voltage balancing method. Multicarrier SPWM control is used to obtain high quality sinusoidal output
voltage with reduced harmonics. It is an effective replacement for the conventional method which has high switching losses and
poor drive performance. It reduces the total harmonic distortion and enhances performance of any drive system. Variation in the
performance characteristics of the induction motor has been done by connecting it with multilevel inverter. The effectiveness of
the system is verified through simulation using MATLAB Simulink package and hardware implementation has been done.
Keywords: THD, Multilevel Inverter, Diode clamped, MLI, DCMLI
_______________________________________________________________________________________________________
I.
INTRODUCTION
Multilevel inverter technology has emerged recently as a very important alternative in the area of high-power medium-voltage
energy control. Multilevel inverters include a combination of power semiconductors and capacitor voltage sources. The output of
which generate voltages with stepped waveforms.[2] In MLI the commutation of the switches allows the addition of the
capacitor voltages, which reach high voltage at the output, while the power semiconductors should only withstand reduced
voltages.
By increasing the levels of inverters, the THD (Total Harmonic Distortion) values of inverters will be reduced, by using
multilevel an approximate of sinusoidal wave by increasing the levels and also the losses will be reduced. They have a wide
range of application in grid interconnection and in renewable energy. Compared with the traditional two-level voltage inverter,
the main advantages of the multilevel inverter are a smaller output voltage step, lower harmonic components, a better
electromagnetic compatibility and lower switching losses.
Here in this paper, a three-phase diode clamped multilevel inverter fed induction motor is described. The diode clamped
inverter provides multiple voltage levels from a nine level unidirectional voltage balancing method . The voltage across the
switches has only half of the dc bus voltage it effectively double the power rating of voltage source inverter for a given
semiconductor device. The proposed multilevel inverter can reduce the total harmonic contents by using SPWM modulation
technique. It generates motor currents of high quality. As the number of levels increases the ripples and distortions in the
induction motor can be reduced by effective modulation technique.
II.
CONVENTIONAL METHOD
In the conventional technique normal PWM method is used. In the conventional method voltage and current are of poor qualities
and the switching frequency causes more amount of switching losses. These drawbacks are rectified using three phase DCMLI.
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Analytical Study and Hardware Implementation of Diode Clamped Multilevel Inverter for Electric Drive Applications
(IJIRST/ Volume 1 / Issue 12 / 020)
The voltage quality and current quality are better and the switching losses are reduced when compared to the old technique. Also
the THD is found to be better.
III.
PROPOSED SYSTEM
A. Proposed Scheme:
The block schematic of multilevel inverter fed three phase induction motor is show in Fig1. The complete system will consist of
two sections that is a power circuit and a control circuit. The power section consisting of three phase diode clamped multilevel
inverter, a power rectifier and a filter capacitor. The motor is connected to the multilevel inverter. An ac voltage is fed to a three
phase diode rectifier, in order to produce dc output voltage across a capacitor filter. Here the capacitor filter, removes the ripple
contents present in the dc output voltage. Through a capacitor filter the pure dc voltage is applied to the three phase inverter.
Fig. 1: Block diagram of MLI
B. Diode Clamped Multilevel Inverter:
In this proposed topology, if „m‟ is the no. of levels, then it consists of (m-1) capacitors, 2(m-1) switches, and (m-1)(m-2)
clamping diodes in which the diode is used as the clamping device to clamp the dc bus voltage so as to achieve steps in the
output voltage. The voltage across each capacitor for an m level diode clamped inverter at steady state is V dc/m-1 .Although each
active switching device is only required to block Vdc/n-1, there are different ratings for clamping diodes.
Fig. 2: Single phase nine level diode clamped multilevel inverter
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Analytical Study and Hardware Implementation of Diode Clamped Multilevel Inverter for Electric Drive Applications
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Fig. 3: Output waveform of single phase nine level DCMLI
IV.
SIMULATION OF DCMLI
The proposed system consists of two simulation parts: simulation of nine level multilevel inverter, without modulation and with
sinusoidal pulse width modulation.
Fig. 4: Three phase nine level diode clamped inverter
Fig. 5: Output Waveform of three phase nine level diode clamped inverter
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Analytical Study and Hardware Implementation of Diode Clamped Multilevel Inverter for Electric Drive Applications
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Fig. 6: Three phase nine level diode clamped inverter with SPWM technique
Fig. 7: Output waveform of three phase nine level diode clamped inverter with SPWM technique
Fig. 8: THD analysis of diode clamped inverter without modulation strategies
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Analytical Study and Hardware Implementation of Diode Clamped Multilevel Inverter for Electric Drive Applications
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Fig. 9: THD analysis of diode clamped inverter with sinusoidal modulation
Table - 1
THD analysis of nine level diode clamped inverter
THD ANALYSIS
WITHOUT MODULATION
23.31%
WITH MODULATION
13.20%
Fig. 10: Three phase nine level diode clamped inverter without SPWM technique connected to motor
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Analytical Study and Hardware Implementation of Diode Clamped Multilevel Inverter for Electric Drive Applications
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Fig. 11: Electromagnetic torque and stator flux output of DCMLI
Fig. 12: Three phase nine level diode clamped inverter with SPWM technique connected to motor
Fig. 13: Torque, stator flux & rotor speed output for three phase 9 level DCMLI with SPWM technique
The simulation by connecting an induction motor in nine level inverter without modulation and with spwm technique shows
that there is a reduction in the ripple content when using a modulation strategy. The speed of an induction motor drive can be
controlled by incorporating modulation techniques with MLI.
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Analytical Study and Hardware Implementation of Diode Clamped Multilevel Inverter for Electric Drive Applications
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V.
HARDWARE SETUP
HARDWARE SPECIFICATIONS
MOSFET
IRF3710
Optocoupler
TLP250
PIC
16F676
Battery
12V
Diode
Capacitor
400µF
Fig. 14: hardware set up of five level diode clamped multilevel inverter
Fig. 15: Pulse Input to the Mosfet Switches
Fig. 16: Output waveform of a five level MLI
VI.
SUMMARY AND RESULT
This paper presents the simulation of three phase nine level diode clamped multilevel inverter without modulation and with
sinusoidal pulse width modulation. The results of both are compared. It is observed that the Total Harmonic Distortion produced
by nine level multilevel inverter with SPWM modulation is less than that of without modulation. Therefore SPWM technique
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Analytical Study and Hardware Implementation of Diode Clamped Multilevel Inverter for Electric Drive Applications
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can be implemented for producing low harmonic contents in the output, hence a high quality output voltage is obtained. It can be
inferred that as the number of levels increases the THD value decreases.
The simulation results shows that the proposed system effectively controls the motor speed and enhances the drive
performance through reduction in ripple content and total harmonic distortion (THD).
There are a number of applications for MLIs. These types of power converters can be used in STATCOM, FACTS, and
electric vehicles and can be used in numerous other areas.
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