A Comparative Study of Three Phase 2-Level VSI with 3

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International Journal of Emerging Technology and Advanced Engineering
Website: www.ijetae.com (ISSN 2250-2459,ISO 9001:2008Certified Journal, Volume 4, Issue 4, April 2014)
A Comparative Study of Three Phase 2-Level VSI with 3-Level
and 5-Level Diode Clamped Multilevel Inverter
Darshan Prajapati1, Vineetha Ravindran2, Jil Sutaria3, Pratik Patel4
1,4
Student
Assistant Professor
2,3
Abstract—Multilevel inverters offer several advantages
compared to the conventional 3-phase bridge inverter in
terms of lower dv/dt stresses, lower electromagnetic
compatibility, smaller rating and better output features. This
paper deals with study of Three Phase Two Level, Three Level
and Five Level Voltage Source Inverter (VSI). The Three
Level and Five Level are realized by Neutral point clamped
(NPC) or Diode clamped (DC) inverter using Sinusoidal pulse
width modulation (SPWM) technique. Similarly three phase
VSI (two level) is also simulated using SPWM technique.
SPWM technique is one of the most popular PWM
techniques. Now-a-days harmonic reduction using SPWM is
most popularly used in industries for a Variable Frequency
Drives (VFDs). All the circuits are implemented using
MATLAB software and their outputs are shown in figures
step by step. Finally, this paper compares all the three
inverters i.e., Two Level, Three Level and Five Level based on
the total harmonic distortion of the output voltage waveform.
The structure of multilevel inverter is such that lower
voltage rating devices can be used. The different topologies
of multilevel inverters can be categorized into Cascaded
multilevel inverter, Flying capacitor or Capacitor clamped
multilevel inverter and Diode Clamped or Neutral Point
Clamped Multilevel inverter. Number of single phase
inverter modules connected in series with separate DC
sources forms cascaded multilevel inverter. The drawback
of this topology is that isolated DC sources are required for
active power conversion. [1]Through manipulation of the
cascade inverter, with diodes blocking the sources, the
diode-clamped multilevel inverter was then derived [3] [4].
The structural design of the capacitor clamped MLI is
similar to that of the diode clamped multilevel inverter.
Main difference between these two is the capacitors are
used in place ofdiodes for clamping purpose.[7]
Keywords—Diode clamped (DC) inverter; multilevel
inverter (MLI); Sinusoidal pulse width modulation (SPWM);
Total harmonic distortion (THD).
II. DIODE CLAMPED INVERTER
I. INTRODUCTION
Nowadays multilevel inverters are most popularly used
in high power and high voltage applications like
transportation system and industrial motor drives.
Multilevel inverters are the better choice for the high power
end. The base behind the multilevel inverter is the fact that
the sine wave can be approximated to a stepped waveform
having large number of steps [1]. As the number of levels
increases, the steps in the output waveforms increases thus
it approaches nearer to the desired sine wave [2]. In a
single phase inverter there is a creation of problems due to
generated harmonics; advancements in development of
such techniques are required which can reduce the
generated harmonics. By using multilevel inverters such
harmonics can be reduced to a large extent. Different DC
levels are supported by connecting batteries or capacitors in
series.
Fig. I. Three level Diode Clamped Inverter
708
International Journal of Emerging Technology and Advanced Engineering
Website: www.ijetae.com (ISSN 2250-2459,ISO 9001:2008Certified Journal, Volume 4, Issue 4, April 2014)
The power circuit diagram of three level diode clamped
multilevel inverter is as shown in the figure. The Mid-level
voltage is defined as a neutral point. So it is also called as
Neutral Point Clamped Multilevel Inverter. The basic
operation of three level Diode clamped inverter is
explained by understanding the inverter shown in fig. 1. In
this circuit, the DC bus voltage is split into three levelsby
two series connected capacitor, C1 and C2.The mid-point of
two capacitors is called the neutral point n. The switches
S11 and S14 are called as main switches. Switches S12 and
S13 are called auxiliary switches which helps to clamp the
output voltage to the neutral point with the help of
clamping diodes D10 and D10’.It is called the three level
multilevel inverter because it has three output voltages 0,
+Vdc/2, -Vdc/2.
For output voltage Vdc/2, switches S11 and S12 needs to
be turned on; for –Vdc/2, switches S13 and S14 needs to be
turned on and for 0, switches S12 and S13 needs to be turned
on. The clamping diodes D10 and D10’ in this topology
distinguishes it from conventional two level inverter. These
two diodes clamp the switch voltage to half the level of
DC-bus voltage. When switch S11 and S12 turned on, the
voltage across a and n is Vdc/2, i.e, Van=Vdc/2.In this
case, the capacitor D10’ balances out the voltage sharing
between S13 and S14.S13 blocks the voltage across capacitor
C1 and S14 blocks the voltage across C2.When switches S12
and S13 turned on, Van=0; when switches S13 and S14
turned on, Van=-Vdc/2.
Fig. III. Comparison of Sine and triangular wave for Three Level
SPWM
Fig. IV.Comparison of Sine and triangular wave for Five Level
SPWM
III. SINUSOIDAL PULSE WIDTH MODULATION
Fig.V. Sinusoidal Pulse Width Modulation(SPWM) output
Sinusoidal Pulse Width Modulation technique is most
used effective technique to reduce the harmonic contents as
compared to any other PWM technique. In SPWM
technique the desired frequency sine wave is compared
with the high frequency triangle wave. Intersection of these
two waves determines the commutation of the modulated
pulse and switching instants of it. Comparison of
fundamental SINE wave and high frequency triangular
wave is as shown in figure. The compared triangular wave
is called as carrier waves and the desired sine wave is
termed as reference wave. Both these waves are compared
in a comparator and the output of the comparator is given
to the switching devices like TCRs, MOSFETs, IGBTs or
any other switching devices. The comparator output is high
when the magnitude of the sine wave is higher than the
magnitude of the triangular wave and vice-versa.
Fig.II. Comparison of Sine and triangular wave for Three phase VSI
SPWM
709
International Journal of Emerging Technology and Advanced Engineering
Website: www.ijetae.com (ISSN 2250-2459,ISO 9001:2008Certified Journal, Volume 4, Issue 4, April 2014)
TABLE I
The modulation index (MI) is:
SWITCHING STRATEGY FOR ONE LEG OF THREE LEVEL DCMLI
MI=
Where
=Magnitude of the reference sine wave
=Magnitude of the carrier triangular wave
The MI can never be more than unity i.e., 1.So the
outputvoltage can be controlled by varying Modulation
Index.
As the number of levels increases in multilevel
inverterthe switching devices required is increases. For
example,for a five level diode clamped multilevel inverter
of oneleg the switching devices used are 8, 4 for positive
halfcycle and other 4 for negative half cycle. So one
sinewave is compared with a four triangular wave and each
one’scompared output is given to the each switching
devices. For the next leg these waves are shifted 120° and
same for the third leg.
Period
S1
S2
S3
S4
Vo(pole
voltage)
0
0°60°
60°120°
120°180°
180°240°
240°300°
300°360°
0
1
1
0
1
1
0
0
0
1
1
0
0
0
1
1
0
0
0
0
1
1
0
1
1
0
0
The switching strategies of each switch for five level
output Voltage is shown in table II.
IV. SWITCHING STRATEGY
The switching strategies of each switch for three level
output voltage is shown in table I.
Fig. VI.Desired pole voltage for three level DCMLI
Fig.VIII. One Leg of Five Level Diode Clamped Inverter
Fig.VII. One Leg of Three Level Diode Clamped Inverter
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International Journal of Emerging Technology and Advanced Engineering
Website: www.ijetae.com (ISSN 2250-2459,ISO 9001:2008Certified Journal, Volume 4, Issue 4, April 2014)
Fig.X, Fig.XI, and Fig.XIIshows the Pole Voltage
waveforms of the three phase VSI, three level inverter and
the five level inverter respectively. And Fig. XIII, Fig.
XIV, Fig.XVshows the Line to Line Voltage waveforms of
the three phase VSI, three level inverter and the five level
inverter respectively. As the output is not connected to any
load, all the outputs obtained are on No-Load.
A. Pole voltage waveforms
Fig. IX. Desired pole voltage for five level DCMLI
TABLE II
SWITCHING STRATEGY FOR ONE LEG OF FIVE LEVEL DCMLI
Period
S1
S
2
S
3
S
4
S
5
S
6
S
7
S
8
Vo
(Pole
Voltag)
0
0°30°
30°60°
60°90°
90°120°
120°150°
150°180°
180°210°
210°240°
240°270°
270°300°
300°330°
330°360°
0
0
1
1
1
1
0
0
0
1
1
1
1
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
0
1
1
1
1
0
0
0
0
0
1
1
1
1
0
0
0
0
0
1
1
1
1
0
0
0
Fig.X. Pole Voltage of Three Phase Voltage Source Inverter
Fig.XI. Pole Voltage of Three Level Diode Clamped Inverter
0
0
0
1
1
1
1
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
1
1
1
1
0
0
0
1
1
1
1
0
0
0
Fig. XII. Pole Voltage of Five Level Diode Clamped Inverter
V. SIMULATION RESULTS
This simulation was done in the MATLAB R2010a
software with the DC input voltage of 200 volts.
711
International Journal of Emerging Technology and Advanced Engineering
Website: www.ijetae.com (ISSN 2250-2459,ISO 9001:2008Certified Journal, Volume 4, Issue 4, April 2014)
B. Line voltage waveforms
Fig. XIII. Line to Line Voltage for three phase VSI
Fig.XVI. FFT Analysis of Three Phase Voltage Source Inverter
Fig. XIV. Line to Line Voltage for three level DCMLI
Fig.XVII. FFT Analysis of Three Phase Three Level DCMLI
Fig. XV. Line to Line Voltage for fivelevel DCMLI
C. Comparison of total harmonic distortion
The total harmonic distortion (THD) any wave form is
defined as the closeness to the fundamental wave shape.
FFT analysis is done to determine the THD of the output
waveforms. The FFT analysis of the voltage waveforms
shown in Fig.XIII, Fig.XIV, and Fig.XV is done using the
power GUI block in the MATLAB software. The results
are shown in Fig.IX, Fig.X, and Fig.XI.
Fig.XVIII. FFT Analysis of Three Phase Five Level DCMLI
712
International Journal of Emerging Technology and Advanced Engineering
Website: www.ijetae.com (ISSN 2250-2459,ISO 9001:2008Certified Journal, Volume 4, Issue 4, April 2014)
TABLE III
This has been in fact proved by doing FFT analysis on
the voltage waveforms and it was found that the total
harmonic distortion decreases as the number of level
increases. This leads to decrease in the requirement of
filter. The number of level of the multilevel inverter to be
used for a particular application can thus be decided upon
the allowed THD of the system.
COMPARISON OF TOTAL HARMONIC DISTORTION
Inverter
Total Harmonic
Distortion(Line to Line)
3-Phase VSI(2 level)
50.67%
3-level DCMLI
34.88%
5-level DCMLI
16.55%
REFERENCES
[1]
[2]
As seen from the. Fig.X, Fig.XI, and Fig.XII the output
of five level inverter is more nearer to sine wave than the
output of three level inverter. Similarly the output of three
level inverter is more nearer to sine wave than the output of
two level inverter.
And as seen from the Fig.XVI, Fig.XVII, Fig.XVIII and
Table III, the total harmonic distortion (THD) reduces as
the number of levels increases.
[3]
[4]
[5]
VI. CONCLUSION
The simulation and analysis of three phase VSI, three
phase three level Diode Clamped inverter and five level
Diode clamped inverter has been done using MATLAB
software. The PWM technique used is SPWM which is
easier to implement in hardware. The output pole voltage
has been taken on no load. It has been observed from the
output voltage waveform that it appears more like sine
wave as the number of level increases.
[6]
[7]
[8]
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