nd
Proceedings of the 2 International Conference on Current Trends in Engineering and Management ICCTEM -2014
INTERNATIONAL
JOURNAL OF ELECTRICAL
ENGINEERING &
17 – 19, July 2014, Mysore, Karnataka, India
TECHNOLOGY (IJEET)
ISSN 0976 – 6545(Print)
ISSN 0976 – 6553(Online)
Volume 5, Issue 8, August (2014), pp. 199-210
© IAEME: www.iaeme.com/IJEET.asp
Journal Impact Factor (2014): 6.8310 (Calculated by GISI)
www.jifactor.com
IJEET
©IAEME
ENHANCEMENT OF BOOST FACTOR USING NEW Z-SOURCE INVERTER
TOPOLOGY
Shilpa A. S.1,
1
Dr. H. Vasanth Kumar Shetty2
PG student, Dept. Of Electrical & Electronics, Dayananda Sagar College of Eng., Bangalore, India
2
Prof., Dept. Of Electrical & Electronics, Dayananda Sagar College of Eng., Bangalore, India
ABSTRACT
The conventional Z-Source Inverter (ZSI) is well accepted all along due to their both buck
and boost capabilities. In fact their application in various domains such as UPS, ac drives, fuel cells
and hybrid electric vehicles are well known. But the conventional ZSI has low boost factor. In order
to overcome the above disadvantage, this paper presents a new topology for Z-source inverter with
the aim of achieving high step-up inversion and a lower voltage stress across the switching device.
The basis for the new topology is derived from Z-source inverter (ZSI) and Switched boost inverter
(SBI).
Keywords: Pulse width Modulation, Switched boost inverter, Z-source inverter
1. INTRODUCTION
The availability of power inverters can be classified as voltage source inverters (VSI) and
current source inverters (CSI). In VSI, the converter is fed from dc voltage supported by relatively
higher value capacitor connected in parallel. Large capacitor connected at the input terminals tends
to make the input dc voltage constant. The ac output voltage is limited and cannot exceed the dc
input voltage. Therefore, the VSI is a buck or step-down inverter. In CSI, the inverter is usually fed
from a dc voltage source in series with a large inductor. Presence of large inductor makes the input
appear as a current source to the inverter. In this case the ac output voltage is greater than the dc
input voltage. Therefore, CSI is a boost or step-up inverter.
Z-source inverter (ZSI) is virtually the combination of VSI and CSI. It makes use of an
unique impedance network consisting of two capacitors and two inductors connected in X shape,
between the converter circuit and the input source. Characteristically ZSI overcomes several
limitations of VSI and CSI, and it provides unique features and hence can be used for the
applications, which require both buck and boost power conversions. Z source concept can be applied
to all dc-ac, ac-dc, ac-ac, dc-dc power conversions.
199
Proceedings of the 2nd International Conference on Current Trends in Engineering and Management ICCTEM -2014
17 – 19, July 2014, Mysore, Karnataka, India
With the X shaped impedance network as explained above, ZSI can advantageously use the
shoot-through (both switches in one leg of the inverter are turned-on simultaneously) states to boost
input voltage [1]. By controlling the shoot-through duty cycle, ZSI can produce any desired ac output
voltage. This feature makes the ZSI suitable for various applications such as renewable power
system (solar panels and fuel cell), adjustable speed drive systems, uninterruptible power supplies
etc. [2]-[4]
Various conventional pulse-width modulation techniques can be modified strategically to
affect the operation of ZSI. The operation can be done continuously or discontinuously, while
retaining the entire unique harmonic performance features of the conventional modulation techniques
[5].
Choice of L and C of ZSI impedance network can be made from a series of trade-offs such as
proper quality factor and damping factor, smaller passive components (leading to lower costs and
sizes), sufficient phase margins for close loop control, satisfactory ripple performance, resonant
frequency far away from the network switching frequency for stability [6] etc.
The Z network mentioned as above, implements two capacitors and two inductors.
Introduction of these passive components adds weight and size to the whole inverter. In order to
reduce size and weight Switched Boost Inverter (SBI) topology has been proposed, which involves
lesser passive components. In this endeavor, an attempt is made to achieve similar state performance
[7].
Various Z-source inverter topologies have been reported which focused on improving its
boost factor [8], [9]. They add inductors, capacitors, and diodes to the Z-impendence network in
order to produce a high dc link voltage for the main power circuit from a very low input dc voltage.
Switched-inductor Z-source inverter (SL-ZSI) is one such inverter, which provides a very high boost
voltage inversion [8]. The embedded Z-source inverter developed in [10] provides a continuous input
current, without adding an input passive filter. Embedded switched-inductor Z source inverter is the
combination of switched-inductor structure and embedded-Z-source topology. They have both high
boost voltage inversion ability and have a continuous input current [11].
The proposed Inverter in this paper is derived from ZSI and SBI and it works similarly to
them. The switched-inductor structure is added to the embedded-Z-source topology in order to have
high boost voltage inversion and a continuous input current. In addition, there will be reduction in
the passive components by employing SBI topology.
2. PROPOSED INVERTER
Fig.1 shows the proposed inverter topology. It consists of five diodes Da, Db, Dc, Dd, Din,
two inductors L1, L2, one capacitor C and one active switch S. L2, S, Dd and C forms the switched
Boost network. Vg is the dc source which is directly connected to the switched-inductor structure L1,
L2, Da, Db, Dc. Combination of dc source and switched inductor structure forms embedded switched
inductor structure [11]. A First order low-pass filter is used at the output of the inverter bridge to
filter the switching frequency components in the inverter output voltage VAB. The resulting final
output voltage is VO. Similar to a ZSI; the proposed inverter also utilizes the shoot-through state of
the H-bridge inverter to boost the input voltage.
200
Proceedings of the 2nd International Conference on Current Trends in Engineering and Management ICCTEM -2014
17 – 19, July 2014, Mysore, Karnataka, India
Fig. 1: Proposed inverter
state analysis, the operating states are divided into shoot-through
shoot through and non
nonFor the of steady-state
shoot-through
through states. Initially, the inverter assumed to be in shoot-through
through zero state for duration
D.TS during switching cycle TS. The switch S is turned on during this interval. The inverter bridge is
shorted through upper and lower switching devices in the phase legs. Din, Dd and Dc are reverse
biased, whereas Da and Db are forward biased. Under this condition L1 and L2 are connected in
parallel.
lel. C discharges, whereas L1 and L2 store energy. The equivalent circuit diagram is shown in
Fig. 2 (a)
In the shoot-through
through state, the fallowing equations can be obtained
(1)
(2)
(3)
In the non-shoot-through
through state Din, Dd and Dc are forward biased, whereas Da and Db are reverse
biased.. In this condition L1 and L2 are connected in series. C charges, whereas L1 and L2 transfer
energy from the dc voltage source to the main circuit. The equivalent diagram is shown in Fig. 2(b
2(b)
In the non-shoot-through
through state, the fallowing equations can be obtained
(4)
(5)
(6)
201
Proceedings of the 2nd International Conference on Current Trends in Engineering and Management ICCTEM -2014
17 – 19, July 2014, Mysore, Karnataka, India
Fig. 2: Operating states of proposed inverter: (a) shoot-through
shoot
(b) non-shoot
shoot-through
Under steady-state,
state, the average voltage across the inductor and the average current through
the capacitor in one switching cycle should be zero. Provided that L1equals to L2, applying Volt
Volt–
second balance, we have
(7)
(8)
(9)
From (7), we can conclude that the conversion ratio, (VC/Vg) is unity when D=0 and it
becomes very high as D reaches 0.3. Note that the shoot-through
shoot through duty ratio of the proposed inverter
cannot exceed 0.3. From (9), it can be observed that the average dc link
link voltage of proposed inverter
is (1-D)
D) times that of that of ZSI [1]. The peak dc-link
dc link voltages across the inverter main circuit can
be given as:
(10)
3. PWM CONTROL STRATEGY FOR THE PROPOSED INVERTER
In conventional PWM technique [5], the gate control signal (GS) for switch S is obtained by
adding the two individual shoot-through
through periods ST1 and ST2. In this case, there are four shoot
shootthrough intervals, switch S has four switching cycles in TS. Therefore switching losses will be more.
Also, the switch S will have variable switching frequency. For the above reasons, the convention
method needs some strategic modifications for the proposed inverter, while the modification does not
202
Proceedings of the 2nd International Conference on Current Trends in Engineering and Management ICCTEM -2014
17 – 19, July 2014, Mysore, Karnataka, India
alter harmonic performance feature of the conventional PWM technique.
technique. Modified PWM control
strategy used for the proposed inverter is based on the traditional sine-triangle
sine triangle PWM with unipolar
voltage switching. Through the proper placement of shoot-through
shoot through states, inverter modulation can be
made to produce the desired performance features.
Fig. 3: A practical schematic layout of PWM control
This section describes modified PWM technique suitable for the proposed inverter. In this
scheme switch S will have only two switching cycles per TS. Therefore the switching lo
losses have
been reduced. Unlike the conventional method, here the switching frequency of S is always constant.
Fig. 3 shows the schematic of the control circuit to generate the PWM control signals for the
proposed inverter using the modified PWM control scheme.
scheme. The gate control signals for switches S1
and S2 are generated by comparing the sinusoidal modulation signals vm(t) and −vm(t) with a high
frequency triangular carrier vtri(t) of amplitude VP. The amplitude of the sinusoidal modulation signal
is M.VP (where M is the modulation index) and its frequency is fO. The frequency of the carrier
signal, fS is chosen such that it is much greater than the frequency of modulation signal.
(11)
Due to the above reason, vm is nearly constant during a switching cycle. The
he signals ST1 and
ST2 are generated by comparing vtri(t) with two constant voltages VST and −VST, respectively. The
purpose of ST1 and ST2 signals is to insert the required shoot-through
shoot through interval D.TS in the gate
control signals of the inverter bridge. GS1 and GS2 are the gate signals given to the switches S1 and S2
respectively. The gate control signals for switches S3, S4, and S can be obtained using the logical
expressions given as follows:
203
Proceedings of the 2nd International Conference on Current Trends in Engineering and Management ICCTEM -2014
17 – 19, July 2014, Mysore, Karnataka, India
Fig. 4: PWM control signals during positive half cycle of vm(t)
Fig. 4 shows the gate control signals for the different switches and the resulting voltage waveform at
the inverter input (Vi) using modified PWM technique.
4..
RELATION BETWEEN VARIOUS PARAMETERS UNDER MODIFIED PWM
TECHNIQUE
In this section the fallowing
lowing relations have been established for the proper operation of the
proposed inverter using modified PWM technique.
4.1 Relation between Constant voltage
oltage, VST and Shoot-through duty ratio, D
From Fig. 4 it can be observed that the duty cycle of the shoot-through
through state, D can be
adjusted by varying VST. Considering the Fig.4, we get
(12)
(13)
Substituting (13) in (12), t1 and t2 can be given as
204
Proceedings of the 2nd International Conference on Current Trends in Engineering and Management ICCTEM -2014
17 – 19, July 2014, Mysore, Karnataka, India
(14)
Substituting t1 and t2 in (13)
(15)
through duty ratio,
r
D and Modulation Index, M
4.2 Relation between Shoot-through
From Fig. 4 it can be observed that the voltage Vi has three zero intervals (when Vi = 0) and
two power intervals (when Vi = VC) in each switching cycle TS. In order to ensure that the shoot
shootthrough interval
val does not disturb the power intervals, D should be chosen such that the total width of
the shoot-through
through interval does not exceed the total available width of the zero intervals in any
switching cycle. This can be written as
(16)
(17)
Where, modulation index can be given as:
4.3. Relation between VST and M
From (15) and (17), it can be written as
(18)
5. SIMULATION RESULTS OF THE PROPOSED INVERTER
Matlab/Simulink software is used to verify the features of the proposed inverter as shown in
Fig. 5. The simulation parameters are L1=L2=5mH, C=100µF, Vg=100V and RL=100Ω. The
switching frequency is 10 kHz.. Modified PWM control technique is used in the simulation, all of the
components are assumed ideal. D is 0.14 and M is 0.725. The results pertained to basically capacitor
voltage and inverter output voltage waveform.
205
Proceedings of the 2nd International Conference on Current Trends in Engineering and Management ICCTEM -2014
17 – 19, July 2014, Mysore, Karnataka, India
Fig. 5: Simulation circuit of proposed circuit.
circuit
proposed inverter
Table 1: Calculation of various voltages in propos
Voltage
Proposed inverter
Formula
Value
125 V
78.125 W
172 V
172 V
100
206
Proceedings of the 2nd International Conference on Current Trends in Engineering and Management ICCTEM -2014
17 – 19, July 2014, Mysore, Karnataka, India
Fig. 6 and Fig. 7 show the simulation result of the proposed inverter. Fig. 6 shows the waveform of
Vc. Here the capacitor voltage is boosted to 172V in steady state.
Fig.7 shows the final output of the proposed inverter. The output of the proposed inverter boosted to
125V. The simulation results are satisfying the theoretical analysis made in Table 1
6. COMPARISON OF PROPOSED INVERTER WITH ZSI AND SBI
This section presents the comparison of proposed inverter with ZSI and SBI for the same
input voltage, capacitor voltage and output voltage. To produce the same output voltage as the
proposed inverter from the same input voltage, the modulation index and duty cycle of ZSI and SBI
are varied. For ZSI, D=0.3, M=0.56 and for SBI, D=0.35, M=0.64. Table 2 gives the calculations of
various voltages of ZSI and SBI.
207
Proceedings of the 2nd International Conference on Current Trends in Engineering and Management ICCTEM -2014
17 – 19, July 2014, Mysore, Karnataka, India
Table 2: Calculation of various voltages in ZSI and SBI
Voltage
ZSI
SBI
Formula
Value
Formula
Value
125
125
78.125
78.125
250
175
175
175
100
100
The various voltage values given in Table 2 are also verified using Matlab/Simulink software.
Using the calculation given in Table 2, the comparison between the proposed inverter, ZSI and SBI
can be made as follows:
6.1 Comparison of the Boost Ability
The peak dc-link
link voltage across the inverter circuit, to the dc input is termed as the boost
factor (B).
). The boost factor for the different inverter topologies can be given by
Fig. 8 shows the boost factor versus the duty cycle for the different topologies. The boost ability of
the proposed inverter is higher than that of ZSI [1] and SBI [7]
Fig. 8: Comparison of boost ability.
6.2 Comparison in terms of Voltage gain Versus Modulation Index
The voltage gain (G=M*B) for the different topologies can be given as:
208
Proceedings of the 2nd International Conference on Current Trends in Engineering and Management ICCTEM -2014
17 – 19, July 2014, Mysore, Karnataka, India
Fig. 9: Voltage conversion ratios versus modulation index
Fig. 9 shows the voltage gain versus the modulation indices of the different topologies.
Compared with the ZSI [1] and SBI [7], using the same modulation index, the proposed inverters
provide a higher voltage boost inversion. Therefore, for the same gain, the proposed inverters use a
higher modulation index in order to improve the inverter output quality.
Table 3: Comparison of maximum stress across the switches
No. of active switches
Proposed
ZSI
SBI
S1 to S4
172
250
175
S
72
-
75
6.3 Comparison of Maximum Voltage Stress
Table 3 lists the maximum voltage stress across the switches for different inverter topologies.
It shows that the proposed inverter provides a lower voltage stress across the active switches.
From Table 1, Table 2 and Table 3, it can also be observed that, for the same input voltage, capacitor
voltage, output voltage and output power, the proposed inverter operates at lower peak inverter input
voltage when compared to ZSI and SBI and it has reduced voltage stress on
on the capacitor.
6.4 Comparison of Number of Components
Comparison is done without considering the common components used in the inverter bridge
and output filter. The proposed inverter uses three passive components and six semiconductor
switches, while ZSI
SI uses four passive components and one semiconductor switch. Due to the lower
number of passive components, the proposed inverter may lead to reduction in the size and weight of
the overall power converter when compared to a ZSI. But increase in the number
number of semiconductor
devices, the proposed inverter requires a better protection circuit when compared to ZSI.
209
Proceedings of the 2nd International Conference on Current Trends in Engineering and Management ICCTEM -2014
17 – 19, July 2014, Mysore, Karnataka, India
7. CONCLUSION
This paper presented a new topology for Z-source inverter. For the same input and output
voltage, the proposed inverter offers reduced voltage stress on the capacitor and reduced voltage
stress across the active switching devices. It can be inferred that boost ability of the proposed
inverter is higher than the classical ZSI and SBI. Simulation result verified the performance of the
proposed inverter with respect to ZSI and SBI.
This paper also presented a modified PWM control strategy suitable for the proposed
inverter. It is also concluded that the shoot-through duty ratio D of proposed inverter cannot exceed
0.3. In this paper, the modulation index value and shoot-through duty ratio are considered as
variables because of obtaining bounded input and output voltage condition.
8. REFERENCES
] F. Z. Peng, “Z-source inverter,” IEEE Trans. Ind. Appl., vol. 39, no. 2, pp. 504–510,
Mar./Apr. 2003.
2.
Y. Huang, M. Shen, F. Z. Peng, and J. Wang, “Z-source inverter for residential photovoltaic
systems,” IEEE Trans. Power Electron., vol. 21, no. 6, pp. 1776–1782, Nov. 2006.
3. F. Z. Peng, “Z-source inverter for adjustable speed drives,” IEEE Power Electron. Lett., vol.
1, no. 2, pp. 33–35, Jun. 2003.
4. Z. J. Zhou, X. Zhang, P. Xu, andW. X. Shen, “Single-phase uninterruptible power supply
based on Z-source inverter,” IEEE Trans. Ind. Electron., vol. 55, no. 8, pp. 2997–3004, Aug.
2008.
5. P. C. Loh, D. Vilathgamuva, Y. S. Lai, G. Chua, and Y. Li, “Pulse-width modulation of Zsource inverters,” IEEE Trans. Power Electron., vol. 20, no. 6, pp. 1346–1355, Nov. 2005.
6. J. Liu, J. Hu, and L. Xu, “Dynamic modeling and analysis of Z source converter-derivation of
ac small-signal model and design-oriented analysis,” IEEE Trans. Power Electron., vol. 22,
no. 5, pp. 1786–1796, Sep. 2007.
7. Adda Ravindranath, Santanu K. Mishra, and Avinash Joshi. “Analysis and PWM Control of
Switched Boost Inverter”, IEEE Transactions on industrial electronics, vol. 60, no. 12,
December 2013
8. M. Zhu, K. Yu, and F. L. Luo, “Switched-inductor Z-source inverter,” IEEE Trans. Power
Electron., Vol. 25, No. 8, pp. 2150-2158, Aug. 2010.
9. C. J. Gajanayake, F. L. Luo, H. B. Gooi, P. L. So, and L.K. Siow, “Extended boost Z-source
inverters,” IEEETrans. Power Electron., Vol. 25, No. 10, pp. 2642 - 2652,Oct. 2010
10. P. C. Loh, F. Gao, and F. Blaabjerg, "Embedded EZ-source inverters", IEEE Trans. Ind.
Appl., Vol. 46, No.1, pp. 256-267, Jan./Feb. 2010.
11. Minh-Khai Nguyen, Young-Cheol Lim, Young-Hak Chang, and Chae-Joo Moon, "Embedded
Switched-Inductor Z-Source Inverters", Journal of Power Electronics, Vol. 13, No. 1, January
2013.
1.
210