PROGRAM & VENUE
ACCOMMMODATION
This short course will be conducted during 23-27 July 2012 in
the CCE lecture hall, IISc-Bangalore, India.
Accommodation will be arranged for a limited number of
participants in the Hoysala guest house inside IISc campus on
advanced request at a nominal fee of INR 100 per day.
Rooms will be given on first come first serve basis. Note that
accommodation charges are not included in the course fee
and should be paid by the participants directly. Preference for
accommodation will be given to participants coming from
outside Bangalore. The course will end around 2:00 PM on 27
July. Outstation participants are strongly advised to return only
on/after 27 July 2012 evening.
COURSE FEE (per participant, first come first
serve basis)
Registration up to 15 July 2012
INR
Government
Organizations/PSUs*
Private/MNCs
15,000
30,000
*Only 10 seats are reserved at the Govt./PSU rate .
** Registrations after July 15 (including spot registrations)
may be allowed depending on capacity.
The course fee includes course material, lunch and at least
two times coffee/tea during the lectures.
The course fee can be paid in the form of a Demand Draft
favouring “The Registrar, Indian Institute of
Science”, payable at Bangalore. Note that IISc is exempted
from Income Tax under section 10 (23C)(IIIab) of the Income
Tax Act (vide TAN/PAN - AAAT1 1501J). For group
registrations, the course fee can also be paid through
electronic money transfer facility using the following
information:
Bank Name: State Bank of India (IISc Campus Branch)
Bank Account No.: 10270575317 (Current Account)
MICR Code: 560002020
IFSC Code: SBIN0002215
SWIFT Code: SBININBB425 (required for international
transactions)
Full Address: Indian Institute of Science, Bangalore, 560 012
Pan No: TAN/PAN - AAAT1 1501J (Tax exempted under
section10(23C)(iiiab))
Program: RF Integrated Circuit Design @ CCE/IISc.
ADDRESS FOR
CORRESPONDENCE
Five-Day Short Course
On
Radio Frequency
Integrated Circuit Design
23-27 July 2012
The number of seats is limited, hence, early
registration is strongly recommended.
THE CHAIRMAN
CENTRE FOR CONTINUING EDUCATION (CCE)
INDIAN INSTITUTE OF SCIENCE
BANGALORE – 560 012, INDIA
Tel. No. : +91-80-2293-2491 (CCE office)
Email : office@cce.iisc.ernet.in
COURSE INSTRUCTOR
DR. GAURAB BANERJEE
Asst. Professor
Dept. of Electrical Communication Engineering
Indian Institute of Science
Bangalore, 560 012, INDIA
Email: banerjee@ece.iisc.ernet.in
Centre for Continuing
Education
Indian Institute of Science
Bangalore, INDIA
SUMMARY
REGISTRATION FORM
ABOUT THE INSTRUCTOR:
As of 2011, the annual global semiconductor market is worth more
than 300 billion dollars. A majority of semiconductor components are
used in consumer electronic devices, such as smart phones, tablets
and multimedia devices. All these products use a significant number
of Radio Frequency Integrated Circuits, which have become
increasingly important in the semiconductor IC design process.
This short course has been primarily designed for practicing
engineers in the industry, who need to work with advanced concepts
in analog/RF IC design. The topics covered in this course can serve
as introductory material to people with a basic exposure to analog
circuit or system design, and as a refresher to practicing engineers
working on advanced analog/RF integrated circuits.
The course will cover basic concepts in semiconductor process
technology and RLC networks, noise and linearity required in the
design of RFICs. Building blocks, such as low noise amplifiers,
mixers, oscillators and power amplifiers will be discussed, followed by
system level concepts such as the architecture of radios and testing.
The course will conclude with several case studies of RFIC products
and research test-chips, which are either in the market or are
expected to make a major impact to the state of the art in the next few
years.
RF CMOS Technology (1st half)
Key Concepts in RFIC Design (2nd half)
Low Noise Amplifiers (1st half)
Mixers (2nd half)
Dr. Banerjee is a National Talent Search Scholar of India, and a
Senior Member of IEEE.
Day 1
•
•
Day 3
•
•
July 23-27, 2012
DESIGNATION:
ORGANIZATION:
MAILING ADDRESS:
TELEPHONE:_____________ (O) _____________ (R)
FAX: _________________________________
MOBILE:______________________________
EMAIL: _______________________________________
Transceiver Architectures (1
RFIC Testing (2nd half)
IISc Hoysala Guest House accommodation required?* YES / NO
PAYMENT: D.D. No.:
Oscillators (1st half)
Power Amplifiers (2nd half)
Day 4
Radio Frequency Integrated
Circuit Design
QUALIFICATION : _________EXPERIENCE :_____ Yrs.
Day 2
Five Day Short Course on
NAME (PRINT):
In 1999, he joined Intel Corporation,
Hillsboro, OR, to design analog and
mixed-signal circuits for the first Pentium-4 microprocessor. Between
2001 and 2007, he was a research scientist with Intel Labs, working
on CMOS based analog, mixed-signal and RF circuits for wireless
and wire-line communication systems. Between 2007 and 2010, he
was a staff engineer with Qualcomm Inc., Austin, TX, working on
RFIC design for mobile broadcast video applications. Since May
2010, he has been an Assistant Professor in the Department of
Electrical Communication Engineering, Indian Institute of Science,
Bangalore, India.
His research interests are in analog and RF integrated circuits and
systems for communication and sensor applications. He has
published more than 20 papers on semiconductor devices and circuits
and has about 10 patents granted or pending. Between 2008 and
2010, Dr. Banerjee was an Associate Editor of IEEE
TRANSACTIONS ON CIRCUITS AND SYSTEMS I. He has also
served as a reviewer for many IEEE journals and on the technical
program committees of many conferences.
KEY TOPICS
•
Gaurab Banerjee received the B.Tech
(Hons.). degree in Electronics and
Electrical Communication Engineering
from the Indian Institute of Technology,
Kharagpur, India, and the Ph.D. degree
in Electrical Engineering from the
University of Washington, Seattle, in
1997 and 2006, respectively.
st
half)
Dt.
Rs.
The demand draft should be drawn in favour of "The Registrar, Indian
Institute of Science”, payable at Bangalore. Kindly note that
Electronic Money Transfer facility is also available for group
registration (see the details in the brochure).
Day 5
Design Examples (1st half)
PARTICIPANT BACKGROUND
This course assumes an undergraduate level exposure to concepts in
analog and VLSI circuits and communication systems.
Date:
Signature of Applicant
*Guest House bill should be paid directly by participants
(Use photocopies of this form, if needed)