4. Integrated circuits: Advanced concepts
The most common biasing technique in the discrete circuits is based on the
voltage divider resistance network. This technique is not very proper way for
integrated circuits because a resistance requires relatively large area on an IC
compared to transistors. Also, the resistor biasing technique uses coupling and
bypass capacitors extensively. Remember, on an IC, it is almost impossible to
fabricate capacitors in the microfarad range, as would be require for the coupling
capacitors in generally.
For all this reasons in IC (both BJT and FET integrated circuits) a different
biasing technique should be used.
Essentially, biasing integrated circuit amplifiers involves the use of constantcurrent sources.
Transistors are also used as load devices into IC, called active loads, replace the
discrete collector or drain resistance in BJT or FET circuits.
The active loads are essentially an “upside-down” constant-current source.
We will discuss in this course about most common bipolar (BJT) constant current
sources and active load circuits configuration. We will analyze a simple twotransistor current source and an improved version of this. After all we will discuss
about Wilson and Widlar current source configuration and finally about multi
transistor current source.
4.4 Two-transistor current source
The two-transistor current source, also called as current mirror, is the basic
building block in the IC current source circuits.
Basic current source circuit is shown in figure 4.1, which consists of two identical
transistors Q1 and Q2, operating at the same temperature, with base and emitter
terminals connected together. B-E voltage is therefore the same for both
transistors. The transistor Q1 is connected as a diode. When a voltage supply is
applied, the B-E junction of Q1 is forward biased and a reference current RI EF is
established. Although there is a specific relationship between IREF and VBE1, we
can say the VBE1 is a result of IREF current. Because VBE1=VBE2 the Q2 transistor
is biasing and generates the load current IO,, which can be used to bias a
transistor or a transistor circuit.
We can say that the Q1, Q2 and IREF establish load current IO.
Since the both transistors are identically (same current gain) and VBE is the same
then IB1=IB2 and IC1=IC2. We assumed transistor Q2 biased in the forward-active
region. If we sum the currents at the collector node of Q1, we have
IREF=IC1+IB1+IB2
This can be write, know also IB1=IB2 and IC1(=βIB1)=IC2(=βIB2) as:
IREF=IC2+2IC2/β = Ic2(1+2/β)
The output current is then
IC2=IO=
IREF
1+2/β
This equation gives the ideal output current of the mirror current source, taking in
account the finite current gain of transistors.
For large transistor current gain output current can be approximated with the
reference current. We also consider the Early voltage of the transistors to be
infinite (this means also we have infinite transistor output resistance).
The reference current in the mirror current source can be established by
connecting a resistor to positive voltage source and Q1 collector. The reference
current is then
V+ - VBE – VR1
IREF=
V+
IR E F
I C 2= I O
R1
IC 1
I B1
IB 2
Q2
Q1
V BE1 = V B E 2
V
-
Figure 4.1 Basic BJT current mirror source with reference resistor R1
The output resistance looking into collector of the output transistor Q2 is defined
as:
rO=
VA
IO
where VA is represent the Early voltage of transistor Q2. Therefore any change of
bias output current IO with a change in VCE2 is defined as:
dIO
dVCE2
=
1
rO2
In practice, transistors Q1 and Q2 may not be exactly identical. If β is large
enough we can neglect base current. For a transistor the current-voltage
relationship between collector current and base-emitter voltage is given by IC=
IS*exp(VBE/VT ). Therefore we can find relationship between output current and
reference current as:
IO=IREF(Is2/Is1)
Any deviation in bias current from ideal, as function of mismatch transistors, is
directly proportional with ratio of the reverse-saturation currents of transistors (IS1
and IS2). The parameter IS is strong function of temperature and is need to
consider that both transistors operate at the same temperature. Therefore both
transistors are chose very close on the semiconductor chip.
Also, the parameters IS1 and IS2 are functions of the cross-section area of B-E
junction. Therefore we can design, in our advantage, circuits with different sizes
of transistors such IO≠IREF.
The critical current source characteristics are the changes in bias current with
variations in β and with changes in the output transistor collector voltage (case by
finite Early voltage).
4.5 Improved current source circuits
An improved circuit of the current mirror is the tree transistor current source. The
circuit is show in figure 4.2 where all transistors are considered identically.
V+
IREF
R1
IC2=IO
Q3
IB3
IC1
IB1 IB2
Q2
Q1
VBE1 = VBE2
V-
Figure 4.2 Basic tree-transistor current source
Since B-E voltage is the same for Q1 and Q2 then IB1=IB2 and IC1=IC2. Transistor
Q3 supplies the base currents to Q1 and Q2, so these currents should be less
dependent of the reference current. The Q3 transistor is also substantially
smaller then the Q1 or Q2 from technologically point of view. Therefore the
current gain of Q3 is less then either Q1 or Q2. We will define current gain for Q1
and Q2 as β 1=β 2=β and for Q3 as β 3.
Summing the currents at collector node of Q1, we obtain
IREF=IC1+IB3
Since IB1+IB2=2IB2=IE3 and IE3 = (1+ β3)IB3 combining those equation we find:
IREF=IC1+
IE3
1+β 3
= IC1 +
2IB1
1+β 3
Replacing IC1 by IC2 and IB2 with IC2/β equation become
IREF=IC2+
2IC2
β (1+β 3)
The output or bias current is then
IREF
1+2/(β (1+β3))
IC2=IO=
The reference current is given by
IREF ≅
V+ - VBE3 - VBE – VR1
≅
V+ - 2VBE – VR1
The output resistance looking into collector of output transistor Q2 is the same as
mirror current source, that is:
dIO
dVCE2
=
1
rO2
4.6 Wilson current source
Another configuration of a tree-transistor current source called a Wilson current
source is shown in figure 4.3.
Using the same analysis as for basic tree-current source but considering now
also all transistors to have the same current gain noted with β we can write on
the Q1 collector node:
IREF=IC1+IB3
and
IE3 = IC2 + 2IB2 = IC2(1+ 2/β)
Using the relationship between the base, collector and emitter currents in Q3, we
can write the collector current IC2, as follows:
IC2=
IE3
(1+2/β)
= IC3
1+β
2+β
If we replace IC1 and IC2 the reference current becomes
IREF= IC2 + IB3 =
1+β
1+2β
IC3 +
IC3
β
We can rearrange last equation and solve after output current we find:
IC3= IO = IREF
1
1+2/(β(2+β))
So the current relationship is the same as that of tree transistor current source.
The difference between the two tree transistor current sources is the output
resistance. For the Wilson current source the output resistance looking into the
collector of Q3 is RO=βro3/2, witch is approximately a factor β/2 larger than of
either current mirror or the basic tree-transistor current source. This means that,
in Wilson current source, the change in bias of current IO with a change of the
output collector voltage is much smaller. Also the reference current can be
establish in the same way as basic tree-transistor current source.
V+
IC3=I O
R1
IREF
Q3
IB3
IE3
IC1
I B1
I B2
Q1
IC2
Q2
V BE1 = V BE2
-
V
Figure 4.3 Wilson current source
4.7 Widlar current source
In the current-source circuits presented so far, the load reference currents have
been nearly equal. Anyway for a output bias current for example IO=10µA, then,
for V+=5V and V-=-5V the required resistance value is about 930KΩ. In IC ,
resistors on the order of 1Mohm require large areas and are difficult to be
fabricate accurately. Therefore we need to replace that resistance with one into
kilohm range.
The Widlar current source shown in figure 4.4 meet that objective. A voltage
difference is produced across resistor RE, so that B-E voltage of Q2 is less then
B-E voltage of Q1. A smaller B-E voltage produce a smaller collector current,
which means thee load current IO is less then the reference current IREF.
V+
I REF
IC2=I O
R1
IC1
IB1
I B2
Q2
Q1
VBE1 V BE2
RE
V-
Figure 4.4 Widlar current source
Considering β large enough and Q1, Q2 identical then,
IREF=IC1=IS exp(UBE1 /VT)
and IO=IC2= IS exp(UBE2/VT)
solving for B-E voltage, we have
VBE1 = VT ln (IREF/IS) and VBE1 = VT ln (IO/IS)
then the difference between B-E voltage yiels
VBE1-VBE2 = VT ln (IREF/IO)
in the same time for the circuit we can see that
VBE1-VBE2 = IE2RE= Io RE
Therefore we can combine last two equations to obtain the relationship between
the reference current and the output bias current as:
Io RE = VT ln (IREF/Io )
Anyway because we used the exponential relationship between collector current
and B-E voltage, for a small change in B-E voltage produce a large change into
collector current. Also reverse current IS, which have a strong dependence with
temperature or the B-E voltage for a particular collector current must be known.
Maintaining equal temperatures is important for proper circuit operation.
The output resistance looking into the collector of Q2 for Widlar current source
can be demonstrated using small signal equivalent circuit and is a factor
(1+gm2(RE||rπ2)) (gm2 – transconductance of Q2 transistor) larger then current
mirror source.
4.8 Multitransistor current sources
Until now we presented only current source, which produce only one load current
output.
V+
I REF
IO1
IO2
I ON
R1
QR
Q1
Q2
QN
-
V
Figure 4.5 Multitransistor current mirror
The B-E voltage of reference transistor can be applied to additional transistors, to
generate multiple load currents. In figure 4.5 is shown a multi load current circuit.
Transistor QR, which is the reference transistor, is connected as a diode. The
resulting of B-E voltage of QR, established by reference current IREF, is applied
to N output transistors, creating N load currents. In case that all transistors are
identically and the Early voltage is considering infinite, the relationship between
reference current and each output current is basically given by mirror current
relation:
IO1=IO2=…=IOn = IREF(1+(1+N)/ β)
The collector output of multiple output transistors can be connected together,
changing the load current versus reference current relationship. For example if
we have tree output transistors with common collector we can obtain an
equivalent one output current tree times larger then reference current IO=IREF. In
IC fabrication B-E area would be doubled or tripled to provide a load current
twice or tree times the value of IREF.
However the multitransistor current source is in fact a mirror source circuit with
many output transistors. The multitransistor current source can be made using
both npn or pnp transistors. In figure 4.6 is presented an example that have only
one reference resistance but provide different output load currents produce by
both type of bipolar transistor.
The reference transistors (note as QR1 and QR2), resistor R1 and power supply
establish the reference current as:
IREF=
V+ - VEB(QR1) –VBE(QR2) – VR1
V+
V EB
Q3
Q4
QR1
I O3
I O4
I REF
R1
I O1
IO2
Q2
QR2
VBE
Q1
V-
Figure 4.6 Generalize current mirror
All transistors are considered identically. Q1 and Q3 is a single transistor and
therefore we output current will be equal with reference current IREF. Q2 is
effectively two transistor connected in parallel; then IO2=IREF. Transistor Q4 is tree
transistor equivalent circuit which provide an output current IO4=3IREF.
In above discussion we neglected the effect of base currents
transistor current gain very large. The real output current in case
gain factor will decrees the output current related with reference
with the real current mirror currents relationship. The effect
severe as more load transistors are added.
4.
and considered
of finite current
current similarly
becomes more
Integrated circuits: Advanced concepts .............................................................................................................. 1
4.4
Two-transistor current source...................................................................................................................... 1
4.5
Improved current source circuits ................................................................................................................. 4
4.6
Wilson current source.................................................................................................................................... 5
4.7
Widlar current source.................................................................................................................................... 7
4.8
Multitransistor current sources .................................................................................................................... 8